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If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/x230t/NEWS b/x230t/NEWS new file mode 100644 index 0000000..706df66 --- /dev/null +++ b/x230t/NEWS @@ -0,0 +1,166 @@ + +skulls-x230 0.1.9 - released 2020-03-24 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 4bd6927388 +* removed memtest secondary payload from SeaBIOS + +skulls-x230 0.1.8 - released 2020-01-03 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 6af55e583d +* update SeaBIOS to version 1.13.0 + +skulls-x230 0.1.7 - released 2019-10-22 +--------------------------------------- +This release includes the following changes: +* update coreboot-sdk to version d70f5fae1c +* based on coreboot commit 4357a82076 +* updated ifdtool +* create sha256 has for backup images +* documentation updates + +skulls-x230 0.1.6 - released 2019-06-07 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 555419f356 + (parent in master branch 55c5777170) +* simplified and improved scripts: + * before_first_install.sh is included in x230_skulls.sh + * upgrade.sh is now x230_skulls.sh -U + * only the executable scripts are in the top directory + +skulls-x230 0.1.5 - released 2019-05-02 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 139b3cef03 + (parent in master branch d32a493091) +* update SeaBIOS to version 1.12.1 + +skulls-x230 0.1.4 - released 2019-05-02 +--------------------------------------- +This release includes the following changes: +* Fixed chip detection for "external" scripts + +skulls-x230 0.1.3 - released 2019-04-03 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 8f0576f420 + (parent in master branch 622a28d22b) +* update Intel's microcode revision from 0x20 to 0x21 + +skulls-x230 0.1.2 - released 2019-03-08 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 9276fe4089 +* update coreboot-sdk to version 1.53 +* increase RPi spi speed for flashing +* add -d option to me_cleaner + +skulls-x230 0.1.1 - released 2019-01-18 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit cd97982e2e +* updates and bugfixes in the scripts +* bootsplash logo added to the nonfree image + +skulls-x230 0.1.0 - released 2018-12-19 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 2ca2acc51f + (parent in master branch 47d6663bba) +* add an optional second image that includes SeaVGABIOS + +skulls-x230 0.0.12 - released 2018-11-23 +---------------------------------------- +This release includes the following changes: +* based on coreboot commit 717f4d5e14 + (parent in master branch 3032d76778) +* updates SeaBIOS to version 1.12.0 +* simplify unpacking the release archive by including a directory + +skulls-x230 0.0.11 - released 2018-11-05 +---------------------------------------- +This release includes the following changes: +* based on coreboot commit 27ffa4c790 + (parent in master branch 715cb40963) +* -b option for external scripts for RPi SPI speed + +skulls-x230 0.0.10 - released 2018-09-06 +---------------------------------------- +This release includes the following changes: +* based on coreboot commit 8823037d50 + (parent in master branch fb758d420b) +* updated latest original Lenovo BIOS version + +skulls-x230 0.0.9 - released 2018-08-06 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit 4591bb6f7b + (parent in master branch 9ea7762e79) +* brightness level is remembered now +* added script to check for new releases +* improved installation scripts +* update coreboot-sdk to version 1.52 + +skulls-x230 0.0.8 - released 2018-07-06 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit e49ac56808 + (parent in master branch cf243657e7) +* update SeaBIOS to version 1.11.2 +* update Intel's microcode revision from 1f to 20 + (this includes Spectre Variant 3a and 4 mitigations) + +skulls-x230 0.0.7 - released 2018-06-18 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit a7835c462e +* reproducible builds +* improved installation scripts +* keep the TPM active + +skulls-x230 0.0.6 - released 2018-05-16 +--------------------------------------- +This release includes the following changes: +* based on coreboot commit d8ec973fd2 +* faster booting (unneeded driver init removed) +* documentation improvements + +coreboot-x230 0.0.5 - released 2018-04-18 +----------------------------------------- +This release includes the following changes: +* based on coreboot commit 92263853ad +* update SeaBIOS to version 1.11.1 +* new release packaging +* scripts to simplify flashing + +coreboot-x230 0.0.4 - released 2018-03-15 +----------------------------------------- +This release includes the following changes: +* based on coreboot commit cb9f55ec38 +* update Intel's microcode revision from 1c to 1f + (this includes Spectre/Meltdown mitigations) + +coreboot-x230 0.0.3 - released 2018-02-20 +----------------------------------------- +This release includes the following changes: +* based on coreboot commit 35972def1d +* include the nvramcui graphical CMOS settings payload +* include Intel's stable microcode revision 1c +* support for all X230 models (from now on) + +coreboot-x230 0.0.2 - released 2018-01-17 +----------------------------------------- +This release includes the following changes: +* based on coreboot commit 533ea7adb5 +* Intel microcode 20180108 included (in CBFS) +* only the i5-3320M CPU model is supported now +* VGA BIOS rom (proprietary binary) executed in secure mode + +coreboot-x230 0.0.1 - released 2018-01-02 +----------------------------------------- +This release is the initial first working release. +It includes and runs the proprietary VGA BIOS in +direct mode and should work on any X230 model. +Based on coreboot commit 75b154334d diff --git a/x230t/README.md b/x230t/README.md new file mode 100644 index 0000000..8ddbc52 --- /dev/null +++ b/x230t/README.md @@ -0,0 +1,272 @@ +# Skulls - [Thinkpad X230](https://pcsupport.lenovo.com/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x230) and X230T + +![seabios_bootmenu](front.jpg) + +## Latest release +Get it from our [release page](https://github.com/merge/coreboot-x230/releases) +* __coreboot__: We take coreboot's master branch at the time we build a release image. +* __microcode update__: revision `0x21` from 2019-02-13 +* __SeaBIOS__: version [1.12.1](https://seabios.org/Releases) from 2019-02-04 + +### release images to choose from +We release multiple different, but _very similar_ images you can choose from. +They all should work on all versions of the X230/X230T. These are the +differences; (xxxxxxxxxx stands for random characters in the filename): +* `x230_coreboot_seabios_xxxxxxxxxx_top.rom` includes the _proprietary_ +[VGA BIOS](https://en.wikipedia.org/wiki/Video_BIOS) from [Intel](https://www.intel.com/content/www/us/en/intelligent-systems/intel-embedded-graphics-drivers/faq-bios-firmware.html) +which is non-free software. It is executed in "secure" mode. +* `x230_coreboot_seabios_free_xxxxxxxxxx_top.rom` includes the +[VGA BIOS](https://en.wikipedia.org/wiki/Video_BIOS) +[SeaVGABIOS](https://www.seabios.org/SeaVGABIOS) which is free software. +While technically more interesting, visually this is currently not as +beautiful: + * The [bootspash image is not shown](https://github.com/merge/skulls/issues/59). + * Early boot console messages (after your HDD's bootloader has started a kernel) might be [missing](https://github.com/merge/skulls/issues/46). + + +## table of contents +* [TL;DR](#tldr) +* [First-time installation](#first-time-installation) +* [Updating](#updating) +* [Moving to Heads](#moving-to-heads) +* [Why does this work](#why-does-this-work) +* [How to rebuild](#how-to-reproduce-the-release-images) + +## TL;DR +1. run `sudo ./x230_skulls.sh` on your current X230 Linux system +2. Power down, remove the battery. Remove the keyboard and palmrest. Connect +a hardware flasher to an external PC (or a Raspberry Pi with a SPI 8-pin chip clip +can directly be used), and run +`sudo ./external_install_bottom.sh` on the lower chip +and `sudo ./external_install_top.sh` on the top chip of the two. +3. For updating later, run `./x230_skulls.sh`. No need to disassemble. + +And always use the latest [released](https://github.com/merge/coreboot-x230/releases) +package. This will be tested. The git master +branch is _not_ meant to be stable. Use it for testing only. + +## First-time installation +#### before you begin +Run Linux on your X230, install `dmidecode` and run +`sudo ./x230_skulls.sh`. It simply prints system information and +helps you to be up to date. + +Make sure you have the latest skulls-x230 package release by running +`./x230_skulls.sh -U`. + +#### original BIOS update / EC firmware (optional) +If the script, `sudo ./x230_skulls.sh` says "The installed original BIOS is very +old.", it means that you have a BIOS version that may include an EC version +older than 1.14. + +If that's the case, consider doing one original Lenovo upgrade process. This is not +supported anymore, once you're running coreboot (You'd have to manually +flash back your backup images first, see later chapters). + +This updates the BIOS _and_ Embedded Controller (EC) firmware. The EC +is not updated anymore, when running coreboot. Since official BIOS release 2.77 and +its EC version 1.15 Lenovo includes a digital signature check, which prevents +further firmware patching. + + +You have 2 options: + +* use [the latest original CD](https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x230/downloads/ds029187) and burn it, or +* use the same, only with a patched EC firmware that allows using any aftermarket-battery: +(this is only possible up to EC Firmware 1.14) +By default, only original Lenovo batteries are allowed. +Thanks to [this](http://zmatt.net/unlocking-my-lenovo-laptop-part-3/) +[project](https://github.com/eigenmatt/mec-tools) we can use Lenovo's bootable +upgrade image, change it and create a bootable _USB_ image (even with EC updates +that allows one to use 3rd party aftermarket batteries). For this, follow instructions +at [github.com/hamishcoleman/thinkpad-ec](https://github.com/hamishcoleman/thinkpad-ec). + +#### preparation: required hardware +* An 8 Pin SOIC Clip, for example from +[Pomona electronics](https://www.pomonaelectronics.com/products/test-clips/soic-clip-8-pin) +(for availability, check +[aliexpress](https://de.aliexpress.com/item/POMONA-SOIC-CLIP-5250-8pin-eeprom-for-tacho-8pin-cable-for-pomana-soic-8pin/32814247676.html) or +[elsewhere](https://geizhals.eu/?fs=pomona+test+clip+5250)) +or alternatively hooks like +[E-Z-Hook XKM](https://e-z-hook.com/test-hooks/micro-hook/xkm/) +* 6 [female](https://electronics.stackexchange.com/questions/37783/how-can-i-create-a-female-jumper-wire-connector) +[jumper wires](https://en.wikipedia.org/wiki/Jump_wire) like +[these](https://geizhals.eu/jumper-cable-female-female-20cm-a1471094.html) +to connect the clip to a hardware flasher (if not included with the clip) +* a hardware flasher +[supported by flashrom](https://www.flashrom.org/Flashrom/0.9.9/Supported_Hardware#USB_Devices), see below for the examples we support + +#### open up the X230 +Remove the 7 screws of your X230 to remove the keyboard (by pushing it towards the +screen before lifting) and the palmrest. You'll find the chips using the photo +below. This is how the SPI connection looks like on both of the X230's chips: + + + Screen (furthest from you) +![ ______ + MOSI 5 --| |-- 4 GND + CLK 6 --| |-- 3 N/C + N/C 7 --| |-- 2 MISO + VCC 8 --|______|-- 1 CS](soic8.png) + + Edge (closest to you) + + +... choose __one of the following__ supported flashing hardware examples: + +#### Hardware Example: Raspberry Pi 3 +A Raspberry Pi can directly be a flasher through it's I/O pins, see below. +Use a test clip or hooks, see [required hardware](#preparation-required-hardware). + +On the RPi we run [Raspbian](https://www.raspberrypi.org/downloads/raspbian/) +and have the following setup: +* Connect to the console: Either + * connect a screen and a keyboard, or + * Use the [Serial connection](https://elinux.org/RPi_Serial_Connection) using a +USB-to-serial cable (like [Adafruit 954](http://www.adafruit.com/products/954), +[FTDI TTL-232R-RPI](http://www.ftdichip.com/Products/Cables/RPi.htm) or +[others](https://geizhals.eu/usb-to-ttl-serial-adapter-cable-a1461312.html)) and +picocom (`picocom -b 115200 /dev/ttyUSB0`) or minicom +* in the SD Cards's `/boot/config.txt` file `enable_uart=1` and `dtparam=spi=on` +* [For flashrom](https://www.flashrom.org/RaspberryPi) we put `spi_bcm2835` +and `spidev` in /etc/modules +* [Connect to a wifi](https://www.raspberrypi.org/documentation/configuration/wireless/wireless-cli.md) +or ethernet to `sudo apt-get install flashrom` +* connect the Clip to the Raspberry Pi 3 (there are +[prettier images](https://github.com/splitbrain/rpibplusleaf) too): + + + Edge of pi (furthest from you) + (UART) + L GND TX RX CS + E | | | | + F +---------------------------------------------------------------------------------+ + T | x x x x x x x x x x x x x x x x x x x x | + | x x x x x x x x x x x x x x x x x x x x | + E +----------------------------------^---^---^---^-------------------------------^--+ + D | | | | | + G 3.3V MOSIMISO| GND + E (VCC) CLK + Body of Pi (closest to you) + + +![Raspberry Pi at work](rpi_clip.jpg) + +Now copy the Skulls release tarball over to the Rasperry Pi and +[continue](#unpack-the-skulls-release-archive) on the Pi. + +#### Hardware Example: CH341A based +The CH341A from [Winchiphead](http://www.wch.cn/), a USB interface chip, +is used by some cheap memory programmers. +The one we describe can be bought at +[aliexpress](http://www.aliexpress.com/item/Free-Shipping-CH341A-24-25-Series-EEPROM-Flash-BIOS-DVD-USB-Programmer-DVD-programmer-router-Nine/32583059603.html), +but it's available [elsewhere](https://geizhals.eu/?fs=ch341a) too. +This means you need a different computer running a Linux based system here. +Also, we don't use the included 3,3V power output (provides too little power), +but a separate power supply. If you don't have any, consider getting a AMS1117 +based supply for a second USB port (like [this](https://de.aliexpress.com/item/1PCS-AMS1117-3-3V-Mini-USB-5V-3-3V-DC-Perfect-Power-Supply-Module/32785334595.html) or [this](https://www.ebay.com/sch/i.html?_nkw=ams1117+usb)). + +* Leave the P/S Jumper connected (programmer mode, 1a86:5512 USB device) +* Connect 3,3V from your external supply to the Pomona clip's (or hook) VCC +* Connect GND from your external supply to GND on your CH341A programmer +* Connect your clip or hooks to the rest of the programmer's SPI pins +* Connect the programmer (and power supply, if USB) to your PC's USB port + +![ch341a programmer with extra USB power supply](ch341a.jpg) + +#### unpack the Skulls release archive + + + tar -xf skulls-x230-.tar.xz + cd skulls-x230- + + +#### ifd unlock and me_cleaner: the 8MB chip + +Flashing the bottom chip (closer to you) is optional. It has the same pinout +than the upper chip. This allows you to enable/disable in-system flashing +(without disassembling the Thinkpad) and/or to neuter the +[Intel Management Engine](https://en.wikipedia.org/wiki/Intel_Management_Engine) +for [security reasons](https://en.wikipedia.org/wiki/Intel_Management_Engine#Security_vulnerabilities). + + + sudo ./external_install_bottom.sh -m -k + + +That's it. Keep the backup safe. Here are the options (just so you know): + +* The `-m` option applies `me_cleaner -S -d` before flashing back, see +[me_cleaner](https://github.com/corna/me_cleaner). +* The `-l` option will (re-)lock your flash ROM, in case you want to force +yourself (and others) to hardware-flashing, see [updating](#updating). + +#### Your BIOS choice: the 4MB chip +Now it's time to make your choice! Choose one of the images included in our +release and select it during running: + + + sudo ./external_install_top.sh -k + + +This selects and flashes it and that's it. +Keep the backup safe, assemble and +turn on the X230. coreboot will do hardware init and start SeaBIOS. + +## Updating +If you have locked your flash (i.e. `./external_install_bottom -l`) you can +flash externally using `external_install_top.sh` just like the +first time, see above. Only the "upper" 4MB chip has to be written. + +It is recommended to do the the update directly on your X230 using Linux +though. This is considered more safe for your hardware and is very convenient - +just install the "flashrom" program and run `./x230_skulls.sh`, see below. + +1. boot Linux with the `iomem=relaxed` boot parameter (for example in /etc/default/grub `GRUB_CMDLINE_LINUX_DEFAULT`) +2. [download](https://github.com/merge/skulls/releases) the latest Skulls release tarball and unpack it or check for updates by running `./x230_skulls.sh -U`. +3. run `sudo ./x230_skulls.sh` and choose the image to flash. + +Hint: In case your Linux distribution's GRUB bootloader doesn't use the full +screen, put the line `GRUB_GFXMODE=1366x768x32` in your `/etc/default/grub` file +(and run `update_grub`). + +## Moving to Heads +[Heads](http://osresearch.net/) is an alternative BIOS system with advanced +security features. It's more complicated to use though. When having Skulls +installed, installing Heads is as easy as updating Skulls. You can directly +start using it: + +* [build Heads](https://github.com/osresearch/heads) +* boot Linux with the `iomem=relaxed` boot parameter +* copy Heads' 12M image file `build/x230/coreboot.rom` to Skulls' x230 directory +* run `sudo ./x230_heads.sh` + +That's it. Heads is a completely different project. Please read the +[documentation](http://osresearch.net/) for how to use it and report bugs +[over there](https://github.com/osresearch/heads/issues) + +Switching back to Skulls is the same as [updating](#updating). Just run +`./x230_skulls.sh`. + +## Why does this work? +On the X230, there are 2 physical "BIOS" chips. The "upper" 4MB +one holds the actual bios we can generate using coreboot, and the "lower" 8MB +one holds the rest that you can [modify yourself once](#first-time-installation), +if you like, but strictly speaking, you +[don't need to touch it at all](https://www.coreboot.org/Board:lenovo/x230#Building_Firmware). +What's this "rest"? +Mainly a tiny binary used by the Ethernet card and the Intel Management Engine. +Read the [coreboot documentation](https://doc.coreboot.org/mainboard/lenovo/xx30_series.html) +for more details. + +## how to reproduce the release images +* `git clone https://github.com/merge/skulls` +* `cd skulls/x230` +* `git checkout 0.1.5` for the release you want to build. In this example 0.1.5. +* `./build.sh` and choose the configuration you want to build + +### replace the splashscreen image +In order to create your own splashscreen image, before building, +overwrite the `splashscreen.jpg` with your own JPEG, using +* "Progressive" turned off, and +* "4:2:0 (chroma quartered)" Subsampling + diff --git a/x230t/bootsplash.jpg b/x230t/bootsplash.jpg new file mode 100644 index 0000000..41d2b91 Binary files /dev/null and b/x230t/bootsplash.jpg differ diff --git a/x230t/bootsplash.xcf b/x230t/bootsplash.xcf new file mode 100644 index 0000000..7ebc56a Binary files /dev/null and b/x230t/bootsplash.xcf differ diff --git a/x230t/build.sh b/x230t/build.sh new file mode 100755 index 0000000..cdedeae --- /dev/null +++ b/x230t/build.sh @@ -0,0 +1,81 @@ +#!/bin/bash +source "util/functions.sh" + +warn_not_root + +have_config=0 + +usage() +{ + echo "Skulls for the X230 Tablet" + echo " Run this script to rebuild a released image" + echo "" + echo "Usage: $0 [-c ]" + echo "" + echo " -c to use for flashrom" +} + +args=$(getopt -o c:h -- "$@") +if [ $? -ne 0 ] ; then + usage + exit 1 +fi + +eval set -- "$args" +while [ $# -gt 0 ] +do + case "$1" in + -c) + CONFIGFILE=$2 + have_config=1 + shift + ;; + -h) + usage + exit 1 + ;; + --) + shift + break + ;; + *) + echo "Invalid option: $1" + exit 1 + ;; + esac + shift +done + +if [ ! "$have_config" -gt 0 ] ; then + configs_available=$(ls -1 | grep config || true) + if [ -z "${configs_available}" ] ; then + echo "No config file found. Please add -c " + echo "" + usage + exit 1 + fi + + prompt="Please select a configuration to use for building or start with the -c option to use a different one:" + options=( $(find -maxdepth 1 -name "*config*" -print0 | xargs -0) ) + + PS3="$prompt " + select CONFIGFILE in "${options[@]}" "Quit" ; do + if (( REPLY == 1 + ${#options[@]} )) ; then + exit + + elif (( REPLY > 0 && REPLY <= ${#options[@]} )) ; then + break + + else + echo "Invalid option. Try another one." + fi + done +fi + +rm -f defconfig-* +CONFIGFILE_READY=$(echo $CONFIGFILE | cut -d'-' -f2-) +cp $CONFIGFILE $CONFIGFILE_READY + +cd .. +./build.sh --clean-slate --commit $(ls -1 x230t/defconfig-* | cut -d'-' -f2-) x230t +rm -f x230t/defconfig-* diff --git a/x230t/ch341a.jpg b/x230t/ch341a.jpg new file mode 100644 index 0000000..8d3ff55 Binary files /dev/null and b/x230t/ch341a.jpg differ diff --git a/x230t/compile.sh b/x230t/compile.sh new file mode 100755 index 0000000..51c0486 --- /dev/null +++ b/x230t/compile.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2018, Tom Hiller + +# shellcheck disable=SC1091 +source /home/coreboot/common_scripts/variables.sh +source /home/coreboot/common_scripts/download_coreboot.sh +source /home/coreboot/common_scripts/config_and_make.sh + +################################################################################ +## MODEL VARIABLES +################################################################################ +MAINBOARD="lenovo" +MODEL="x230t" + +################################################################################ + +############################################### +## download/git clone/git pull Coreboot ## +############################################### +downloadOrUpdateCoreboot + +############################## +## Copy config and make ## +############################## +configAndMake + +##################### +## Post build ## +##################### +if [ ! -f "$DOCKER_COREBOOT_DIR/build/coreboot.rom" ]; then + echo "Uh oh. Things did not go according to plan." + exit 1; +else + #split out top BIOS + if [ ! -z "$COREBOOT_COMMIT" ]; then + RELEASEFILE="${MODEL}_coreboot_seabios_$(echo ${COREBOOT_COMMIT} | cut -c 1-10)_top.rom" + else + RELEASEFILE="coreboot_$MAINBOARD-$MODEL-top.rom" + fi + dd if="$DOCKER_COREBOOT_DIR/build/coreboot.rom" of="$DOCKER_COREBOOT_DIR/$RELEASEFILE" bs=1M skip=8 + sha256sum "$DOCKER_COREBOOT_DIR/$RELEASEFILE" > "$DOCKER_COREBOOT_DIR/${RELEASEFILE}".sha256 + echo "==================== result: ======================" + echo "$DOCKER_COREBOOT_DIR/$RELEASEFILE" + echo "===================================================" +fi diff --git a/x230t/external_install_bottom.sh b/x230t/external_install_bottom.sh new file mode 100755 index 0000000..5dda2e2 --- /dev/null +++ b/x230t/external_install_bottom.sh @@ -0,0 +1,265 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2018, Martin Kepplinger +RED='\033[0;31m' +GREEN='\033[0;32m' +NC='\033[0m' + +set -e + +cd "$(dirname "$0")" + +IFDTOOL=./util/ifdtool/ifdtool +ME_CLEANER_PATH=./util/me_cleaner/me_cleaner.py +have_chipname=0 +have_backupname=0 +me_clean=0 +lock=0 +have_flasher=0 +rpi_frequency=0 + +usage() +{ + echo "Skulls for the X230 Tablet" + echo " Run this script on an external computer with a flasher" + echo " connected to the X230T's bottom chip (farther away from" + echo " the display, closer to you)." + echo "" + echo "Usage: $0 [-m] [-k ] [-l] [-f ] [-b ] [-c ]" + echo "" + echo " -f supported flashers: rpi, ch341a" + echo " -c flashrom chip name to use" + echo " -m apply me_cleaner -S -d" + echo " -l lock the flash instead of unlocking it" + echo " -k save the current image as" + echo " -b frequency of the RPi SPI bus in Hz. default: 128" +} + +args=$(getopt -o f:mlc:k:hb: -- "$@") +if [ $? -ne 0 ] ; then + usage + exit 1 +fi + +eval set -- "$args" +while [ $# -gt 0 ] +do + case "$1" in + -f) + FLASHER=$2 + have_flasher=1 + shift + ;; + -m) + me_clean=1 + ;; + -l) + lock=1 + ;; + -c) + CHIPNAME=$2 + have_chipname=1 + shift + ;; + -k) + BACKUPNAME=$2 + have_backupname=1 + shift + ;; + -b) + rpi_frequency=$2 + shift + ;; + -h) + usage + exit 1 + ;; + --) + shift + break + ;; + *) + echo "Invalid option: $1" + usage + exit 1 + ;; + esac + shift +done + +command -v flashrom >/dev/null 2>&1 || { echo -e >&2 "${RED}Please install flashrom and run as root${NC}."; exit 1; } +command -v make >/dev/null 2>&1 || { echo -e >&2 "${RED}Please install make and a C compiler${NC}."; exit 1; } +command -v mktemp >/dev/null 2>&1 || { echo -e >&2 "${RED}Please install mktemp (coreutils)${NC}."; exit 1; } + +if [ ! "$have_flasher" -gt 0 ] ; then + echo "Skulls for the X230 Tablet" + echo "" + echo "Please select the hardware you use:" + PS3='Please select the hardware flasher: ' + options=("Raspberry Pi" "CH341A" "Exit") + select opt in "${options[@]}" + do + case $opt in + "Raspberry Pi") + FLASHER="rpi" + break + ;; + "CH341A") + FLASHER="ch341a" + break + ;; + "Exit") + exit 0 + ;; + *) echo invalid option;; + esac + done +fi + +if [ ! "${rpi_frequency}" -gt 0 ] ; then + rpi_frequency=512 +fi + +programmer="" +if [ "${FLASHER}" = "rpi" ] ; then + echo "Ok. Run this on a Rasperry Pi." + programmer="linux_spi:dev=/dev/spidev0.0,spispeed=${rpi_frequency}" +elif [ "${FLASHER}" = "ch341a" ] ; then + echo "Ok. Connect a CH341A programmer" + programmer="ch341a_spi" +else + echo "invalid flashrom programmer" + usage + exit 1 +fi + +TEMP_DIR=$(mktemp -d) +if [ ! -d "$TEMP_DIR" ]; then + echo -e "${RED}Error:${NC} Could not create temp dir" + rm -rf "${TEMP_DIR}" + exit 1 +fi + +if [ ! "$have_chipname" -gt 0 ] ; then + echo "trying to detect the chip..." + flashrom -p ${programmer} &> "${TEMP_DIR}"/chips || true + flashrom_error="" + flashrom_error=$(cat "${TEMP_DIR}"/chips | grep -i error || true) + if [ ! -z "${flashrom_error}" ] ; then + usage + echo "-------------- flashrom error: ---------------" + cat "${TEMP_DIR}"/chips + rm -rf "${TEMP_DIR}" + exit 1 + fi + + CHIPNAME="" + chip_found=0 + if [ ! "$chip_found" -gt 0 ] ; then + CHIPNAME=$(cat "${TEMP_DIR}"/chips | grep Found | grep "MX25L6406E/MX25L6408E" | grep -oP '"\K[^"\047]+(?=["\047])' || true) + if [ ! -z "${CHIPNAME}" ] ; then + chip_found=1 + fi + fi + + if [ ! "$chip_found" -gt 0 ] ; then + CHIPNAME=$(cat "${TEMP_DIR}"/chips | grep Found | grep "EN25QH64" | grep -o '".*"' | grep -oP '"\K[^"\047]+(?=["\047])' || true) + if [ ! -z "${CHIPNAME}" ] ; then + chip_found=1 + fi + fi + + if [ ! "$chip_found" -gt 0 ] ; then + CHIPNAME=$(cat "${TEMP_DIR}"/chips | grep Found | grep "W25Q64.V" | grep -o '".*"' | grep -oP '"\K[^"\047]+(?=["\047])' || true) + if [ ! -z "${CHIPNAME}" ] ; then + chip_found=1 + fi + fi + + if [ ! "$chip_found" -gt 0 ] ; then + echo "chip not detected." + flashrom -p ${programmer} || true + rm -rf "${TEMP_DIR}" + echo "chip not detected. Please find it manually and rerun with the -c parameter." + exit 1 + else + echo -e "Detected ${GREEN}${CHIPNAME}${NC}." + fi +fi + +make -C util/ifdtool +if [ ! -e ${IFDTOOL} ] ; then + echo "ifdtool not found at ${IFDTOOL}" + exit 1 +fi + +if [ ! "$me_clean" -gt 0 ] ; then + echo -e "Intel ME will ${RED}not${NC} be cleaned. Use -m if it should be." +else + echo -e "Intel ME will be ${GREEN}cleaned${NC}." +fi + +if [ ! "$lock" -gt 0 ] ; then + echo -e "The flash ROM will be ${GREEN}unlocked${NC}." +else + echo -e "The flash ROM will be ${RED}locked${NC}." +fi + +if [ "$me_clean" -gt 0 ] ; then + if [ ! -e ${ME_CLEANER_PATH} ] ; then + echo "me_cleaner not found at ${ME_CLEANER_PATH}" + rm -rf "${TEMP_DIR}" + exit 1 + fi +fi + +echo "Start reading 2 times. Please be patient..." +flashrom -p ${programmer} -c ${CHIPNAME} -r "${TEMP_DIR}"/test1.rom +flashrom -p ${programmer} -c ${CHIPNAME} -r "${TEMP_DIR}"/test2.rom +cmp --silent "${TEMP_DIR}"/test1.rom "${TEMP_DIR}"/test2.rom +if [ "$have_backupname" -gt 0 ] ; then + cp "${TEMP_DIR}"/test1.rom "${BACKUPNAME}" + sha256sum "${TEMP_DIR}"/test1.rom > "${BACKUPNAME}".sha256 + echo "current image saved as ${BACKUPNAME}" +fi + +reference_size=8388608 +TEMP_SIZE=$(wc -c <"$TEMP_DIR/test1.rom") +if [ ! "$reference_size" -eq "$TEMP_SIZE" ] ; then + echo -e "${RED}Error:${NC} didn't read 8M. You might be at the wrong chip." + rm -rf "${TEMP_DIR}" + exit 1 +fi + +echo -e "${GREEN}connection ok${NC}" + +echo "start unlocking ..." +if [ "$me_clean" -gt 0 ] ; then + ${ME_CLEANER_PATH} -d -S -O "${TEMP_DIR}"/work.rom "${TEMP_DIR}"/test1.rom +else + cp "${TEMP_DIR}"/test1.rom "${TEMP_DIR}"/work.rom +fi + +if [ ! "$lock" -gt 0 ] ; then + ${IFDTOOL} -u "${TEMP_DIR}"/work.rom +else + ${IFDTOOL} -l "${TEMP_DIR}"/work.rom +fi + +if [ ! -e "${TEMP_DIR}"/work.rom.new ] ; then + echo -e "${RED}Error:${NC} ifdtool failed. ${TEMP_DIR}/work.rom.new not found." + rm -rf "${TEMP_DIR}" + exit 1 +fi +if [ "$me_clean" -gt 0 ] ; then + echo -e "${GREEN}ifdtool and me_cleaner ok${NC}" +else + echo -e "${GREEN}ifdtool ok${NC}" +fi +make clean -C util/ifdtool + +echo "start writing..." + +flashrom -p ${programmer} -c "${CHIPNAME}" -w "${TEMP_DIR}"/work.rom.new +rm -rf "${TEMP_DIR}" +echo -e "${GREEN}DONE${NC}" diff --git a/x230t/external_install_top.sh b/x230t/external_install_top.sh new file mode 100755 index 0000000..c53f111 --- /dev/null +++ b/x230t/external_install_top.sh @@ -0,0 +1,219 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2018, Martin Kepplinger +RED='\033[0;31m' +GREEN='\033[0;32m' +NC='\033[0m' + +set -e + +have_input_image=0 +have_chipname=0 +have_backupname=0 +have_flasher=0 +rpi_frequency=0 + +usage() +{ + echo "Skulls for the X230 Tablet" + echo " Run this script on an external computer with a flasher" + echo " connected to the X230T's top chip (closer to the display" + echo " and farther from you)" + echo "" + echo "Usage: $0 [-i ] [-c ] [-k ] [-f ] [-b ]" + echo "" + echo " -f supported flashers: rpi, ch341a" + echo " -i path to image to flash" + echo " -c to use for flashrom" + echo " -k save the current image as" + echo " -b frequency of the RPi SPI bus in Hz. default: 128" +} + +args=$(getopt -o f:i:c:k:hb: -- "$@") +if [ $? -ne 0 ] ; then + usage + exit 1 +fi + +eval set -- "$args" +while [ $# -gt 0 ] +do + case "$1" in + -f) + FLASHER=$2 + have_flasher=1 + shift + ;; + -i) + INPUT_IMAGE_PATH=$2 + have_input_image=1 + shift + ;; + -c) + CHIPNAME=$2 + have_chipname=1 + shift + ;; + -k) + BACKUPNAME=$2 + have_backupname=1 + shift + ;; + -b) + rpi_frequency=$2 + shift + ;; + -h) + usage + exit 1 + ;; + --) + shift + break + ;; + *) + echo "Invalid option: $1" + exit 1 + ;; + esac + shift +done + +command -v flashrom >/dev/null 2>&1 || { echo -e >&2 "${RED}Please install flashrom and run as root${NC}."; exit 1; } +command -v mktemp >/dev/null 2>&1 || { echo -e >&2 "${RED}Please install mktemp (coreutils)${NC}."; exit 1; } + +if [ ! "$have_input_image" -gt 0 ] ; then + image_available=$(ls -1 | grep x230t_coreboot_seabios || true) + if [ -z "${image_available}" ] ; then + echo "No image file found. Please add -i " + echo "" + usage + exit 1 + fi + + prompt="Please select a file to flash or start with the -i option to use a different one:" + options=( $(find -maxdepth 1 -name "*rom" -print0 | xargs -0) ) + + PS3="$prompt " + select INPUT_IMAGE_PATH in "${options[@]}" "Quit" ; do + if (( REPLY == 1 + ${#options[@]} )) ; then + exit + + elif (( REPLY > 0 && REPLY <= ${#options[@]} )) ; then + break + + else + echo "Invalid option. Try another one." + fi + done +fi + +if [ ! "$have_flasher" -gt 0 ] ; then + echo "Please select the hardware you use:" + PS3='Please select the hardware flasher: ' + options=("Raspberry Pi" "CH341A" "Quit") + select opt in "${options[@]}" + do + case $opt in + "Raspberry Pi") + FLASHER="rpi" + break + ;; + "CH341A") + FLASHER="ch341a" + break + ;; + "Quit") + exit 0 + ;; + *) echo invalid option;; + esac + done +fi + +if [ ! "${rpi_frequency}" -gt 0 ] ; then + rpi_frequency=512 +fi + +programmer="" +if [ "${FLASHER}" = "rpi" ] ; then + programmer="linux_spi:dev=/dev/spidev0.0,spispeed=${rpi_frequency}" +elif [ "${FLASHER}" = "ch341a" ] ; then + programmer="ch341a_spi" +else + echo "invalid flashrom programmer" + usage + exit 1 +fi + +TEMP_DIR=$(mktemp -d) +if [ ! -d "$TEMP_DIR" ]; then + echo "${RED}Error:${NC} Could not create temp dir" + exit 1 +fi + +if [ ! "$have_chipname" -gt 0 ] ; then + echo "trying to detect the chip..." + flashrom -p ${programmer} &> "${TEMP_DIR}"/chips || true + flashrom_error="" + flashrom_error=$(cat "${TEMP_DIR}"/chips | grep -i error || true) + if [ ! -z "${flashrom_error}" ] ; then + cat "${TEMP_DIR}"/chips + rm -rf "${TEMP_DIR}" + exit 1 + fi + + CHIPNAME="" + chip_found=0 + if [ ! "$chip_found" -gt 0 ] ; then + CHIPNAME=$(cat "${TEMP_DIR}"/chips | grep Found | grep MX25L3206E | grep -oP '"\K[^"\047]+(?=["\047])' || true) + if [ ! -z "${CHIPNAME}" ] ; then + chip_found=1 + fi + fi + + if [ ! "$chip_found" -gt 0 ] ; then + CHIPNAME=$(cat "${TEMP_DIR}"/chips | grep Found | grep EN25QH32 | grep -oP '"\K[^"\047]+(?=["\047])' || true) + if [ ! -z "${CHIPNAME}" ] ; then + chip_found=1 + fi + fi + + if [ ! "$chip_found" -gt 0 ] ; then + echo "chip not detected." + flashrom -p ${programmer} || true + rm -rf "${TEMP_DIR}" + echo "Please find it manually in the list above and rerun with the -c parameter." + exit 1 + else + echo -e "Detected ${GREEN}${CHIPNAME}${NC}." + fi +fi + +INPUT_IMAGE_NAME=$(basename "${INPUT_IMAGE_PATH}") +INPUT_IMAGE_SIZE=$(wc -c < "$INPUT_IMAGE_PATH") +reference_filesize=4194304 +if [ ! "$INPUT_IMAGE_SIZE" -eq "$reference_filesize" ] ; then + echo -e "${RED}Error:${NC} input file must be 4MB of size" + exit 1 +fi + +echo "verifying SPI connection by reading 2 times. please wait." +flashrom -p ${programmer} -c ${CHIPNAME} -r ${TEMP_DIR}/test1.rom +flashrom -p ${programmer} -c ${CHIPNAME} -r ${TEMP_DIR}/test2.rom +cmp --silent "${TEMP_DIR}"/test1.rom "${TEMP_DIR}"/test2.rom +if [ "$have_backupname" -gt 0 ] ; then + cp "${TEMP_DIR}"/test1.rom "${BACKUPNAME}" + sha256sum "${TEMP_DIR}"/test1.rom > "${BACKUPNAME}".sha256 + echo "current image saved as ${BACKUPNAME}" +fi +TEMP_SIZE=$(wc -c < "$TEMP_DIR/test1.rom") +if [ ! "$INPUT_IMAGE_SIZE" -eq "$TEMP_SIZE" ] ; then + echo -e "${RED}Error:${NC} read image (${TEMP_SIZE}) has different size that new image $INPUT_IMAGE_NAME (${INPUT_IMAGE_SIZE})" + exit 1 +fi +rm -rf "${TEMP_DIR}" + +echo -e "${GREEN}connection ok${NC}. flashing ${INPUT_IMAGE_NAME}" +flashrom -p ${programmer} -c "${CHIPNAME}" -w "${INPUT_IMAGE_PATH}" +echo -e "${GREEN}DONE${NC}" diff --git a/x230t/free-defconfig-4bd6927388 b/x230t/free-defconfig-4bd6927388 new file mode 100644 index 0000000..d5ea041 --- /dev/null +++ b/x230t/free-defconfig-4bd6927388 @@ -0,0 +1,744 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_COREBOOT_BUILD=y +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_STATIC_OPTION_TABLE is not set +CONFIG_COMPRESS_RAMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_RELOCATABLE_RAMSTAGE=y +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="bootsplash.jpg" + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ADLINK is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BAP is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_ELMEX is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GIZMOSPHERE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_JETWAY is not set +# CONFIG_VENDOR_KONTRON is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_LIPPERT is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SCALEWAY is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_UP is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_FAMILY="ThinkPad X230t" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/x230" +CONFIG_MAX_CPUS=8 +CONFIG_VGA_BIOS_ID="8086,0166" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +CONFIG_NO_POST=y +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_VGA_BIOS=y +CONFIG_VGA_BIOS_FILE="pci8086,0166.rom" +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_DEVICETREE="devicetree.cb" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_CBFS_SIZE=0x400000 +CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_PAYLOAD_CONFIGFILE="" +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set +# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set +# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set +# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set +# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set +# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set +# CONFIG_VBOOT is not set +CONFIG_VBOOT_VBNV_OFFSET=0x2a +CONFIG_DCACHE_RAM_BASE=0xfefe0000 +CONFIG_DCACHE_RAM_SIZE=0x20000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x10000 +CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_TPM_INIT=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_TPM_PIRQ=0x0 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" +# CONFIG_HAVE_IFD_BIN is not set +# CONFIG_BOARD_LENOVO_G505S is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +CONFIG_BOARD_LENOVO_X230T=y +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_VBOOT_SLOTS_RW_AB=y +CONFIG_DRIVER_LENOVO_SERIALS=y +# CONFIG_BOARD_LENOVO_BASEBOARD_T520 is not set +# CONFIG_BOARD_LENOVO_BASEBOARD_T530 is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09 +CONFIG_HEAP_SIZE=0x4000 +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_BOARD_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +CONFIG_SYSTEM_TYPE_LAPTOP=y +# CONFIG_SYSTEM_TYPE_TABLET is not set +# CONFIG_SYSTEM_TYPE_DETACHABLE is not set +# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set +# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set + +# +# Chipset +# + +# +# SoC +# +CONFIG_CPU_SPECIFIC_OPTIONS=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_CPU_ADDR_BITS=36 +CONFIG_EHCI_BAR=0xfef00000 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d" +# CONFIG_SOC_CAVIUM_CN81XX is not set +CONFIG_ARCH_ARMV8_EXTENSION=0 +CONFIG_STACK_SIZE=0x1000 +# CONFIG_SOC_CAVIUM_COMMON is not set +# CONFIG_SOC_INTEL_GLK is not set +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_UART_PCI_ADDR=0x0 +# CONFIG_SOC_MEDIATEK_MT8173 is not set +# CONFIG_SOC_MEDIATEK_MT8183 is not set +# CONFIG_SOC_NVIDIA_TEGRA124 is not set +# CONFIG_SOC_NVIDIA_TEGRA210 is not set +# CONFIG_SOC_QUALCOMM_COMMON is not set +# CONFIG_SOC_QC_IPQ40XX is not set +# CONFIG_SOC_QC_IPQ806X is not set +# CONFIG_SOC_QUALCOMM_QCS405 is not set +# CONFIG_SOC_QUALCOMM_SC7180 is not set +# CONFIG_SOC_QUALCOMM_SDM845 is not set +# CONFIG_SOC_ROCKCHIP_RK3288 is not set +# CONFIG_SOC_ROCKCHIP_RK3399 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set +# CONFIG_SOC_UCB_RISCV is not set + +# +# CPU +# +# CONFIG_CPU_AMD_AGESA is not set +# CONFIG_CPU_AMD_PI is not set +# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set +CONFIG_CPU_INTEL_MODEL_206AX=y +CONFIG_SSE2=y +# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set +# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_MICROCODE_UPDATE_PRE_RAM=y +# CONFIG_CPU_TI_AM335X is not set +# CONFIG_PARALLEL_CPU_INIT is not set +CONFIG_PARALLEL_MP=y +# CONFIG_PARALLEL_MP_AP_WORK is not set +# CONFIG_UDELAY_LAPIC is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +# CONFIG_TSC_SYNC_LFENCE is not set +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_NO_FIXED_XIP_ROM_SIZE=y +CONFIG_LOGICAL_CPUS=y +CONFIG_HAVE_SMI_HANDLER=y +# CONFIG_NO_SMM is not set +# CONFIG_SMM_ASEG is not set +CONFIG_SMM_TSEG=y +CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 +CONFIG_SMM_STUB_STACK_SIZE=0x400 +# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set +# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set +# CONFIG_X86_AMD_FIXED_MTRRS is not set +# CONFIG_X86_AMD_INIT_SIPI is not set +# CONFIG_SOC_SETS_MSRS is not set +CONFIG_SMP=y +CONFIG_MMX=y +CONFIG_SSE=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_USES_MICROCODE_HEADER_FILES is not set +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +# CONFIG_NORTHBRIDGE_AMD_AGESA is not set +# CONFIG_NORTHBRIDGE_AMD_PI is not set +CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y +# CONFIG_SANDYBRIDGE_VBOOT_IN_ROMSTAGE is not set +CONFIG_USE_NATIVE_RAMINIT=y +# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set + +# +# Southbridge +# +# CONFIG_AMD_SB_CIMX is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set +CONFIG_SOUTHBRIDGE_INTEL_C216=y +CONFIG_SOUTH_BRIDGE_OPTIONS=y +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_LOCK_SPI_FLASH_NONE=y +# CONFIG_LOCK_SPI_FLASH_RO is not set +# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set + +# +# Super I/O +# +# CONFIG_SUPERIO_ASPEED_AST2400 is not set +# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set +# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set +# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +# CONFIG_EC_51NB_NPCE985LA0DX is not set +# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set +# CONFIG_EC_GOOGLE_WILCO is not set +CONFIG_EC_LENOVO_H8=y +CONFIG_SEABIOS_PS2_TIMEOUT=5000 +# CONFIG_H8_BEEP_ON_DEATH is not set +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_HAS_BAT_TRESHOLDS_IMPL=y +# CONFIG_H8_HAS_PRIMARY_FN_KEYS is not set +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +# CONFIG_CAVIUM_BDK is not set +# CONFIG_MAINBOARD_HAS_CHROMEOS is not set +# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set +# CONFIG_UEFI_2_4_BINDING is not set +# CONFIG_UDK_2015_BINDING is not set +# CONFIG_UDK_2017_BINDING is not set +# CONFIG_USE_SIEMENS_HWILIB is not set +# CONFIG_ARM_LPAE is not set +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +# CONFIG_ARCH_POSTCAR_X86_64 is not set +# CONFIG_USE_MARCH_586 is not set +# CONFIG_AP_IN_SIPI_WAIT is not set +CONFIG_X86_RESET_VECTOR=0xfffffff0 +# CONFIG_SIPI_VECTOR_IN_ROM is not set +CONFIG_RAMBASE=0xe00000 +CONFIG_RAMTOP=0x1000000 +CONFIG_NUM_IPI_STARTS=2 +# CONFIG_CBMEM_TOP_BACKUP is not set +CONFIG_PC80_SYSTEM=y +# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y +# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set +# CONFIG_HPET_ADDRESS_OVERRIDE is not set +CONFIG_HPET_ADDRESS=0xfed00000 +CONFIG_ID_SECTION_OFFSET=0x80 +CONFIG_POSTCAR_STAGE=y +# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set +# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_ACPI_HAVE_PCAT_8259=y +# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +# CONFIG_PAGING_IN_CACHE_AS_RAM is not set +# CONFIG_IDT_IN_EVERY_STAGE is not set +CONFIG_HAVE_CF9_RESET=y +# CONFIG_PIRQ_ROUTE is not set + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set +# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +# CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +# CONFIG_MULTIPLE_VGA_ADAPTERS is not set + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_PCI=y +# CONFIG_NO_MMCONF_SUPPORT is not set +CONFIG_MMCONF_SUPPORT=y +# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set +CONFIG_HT_CHAIN_UNITID_BASE=0 +CONFIG_HT_CHAIN_END_UNITID_BASE=0 +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +# CONFIG_AZALIA_PLUGIN_SUPPORT is not set +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +# CONFIG_PCIEXP_HOTPLUG is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +# CONFIG_VGA_BIOS_DGPU is not set +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set + +# +# Generic Drivers +# +# CONFIG_DRIVERS_AS3722_RTC is not set +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_MAINBOARD_HAS_CRB_TPM is not set +# CONFIG_ELOG is not set +# CONFIG_GIC is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_DRIVERS_LENOVO_WACOM is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_HAS_RECOVERY_MRC_CACHE is not set +# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set +# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set +# CONFIG_MRC_WRITE_NV_LATE is not set +# CONFIG_RT8168_GET_MAC_FROM_VPD is not set +# CONFIG_RT8168_SET_LED_MODE is not set +# CONFIG_SMMSTORE is not set +# CONFIG_SMMSTORE_IN_CBFS is not set +CONFIG_SPI_FLASH=y +# CONFIG_SPI_SDCARD is not set +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set +# CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS is not set +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set +# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set +CONFIG_NO_UART_ON_SUPERIO=y +# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set +# CONFIG_UART_OVERRIDE_REFCLK is not set +# CONFIG_DRIVERS_UART_8250MEM is not set +# CONFIG_DRIVERS_UART_8250MEM_32 is not set +# CONFIG_HAVE_UART_SPECIAL is not set +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_DRIVERS_UART_PL011 is not set +# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +CONFIG_DRIVERS_GENERIC_WIFI=y +# CONFIG_USE_SAR is not set +# CONFIG_DRIVERS_AMD_PI is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GFX_GENERIC is not set +# CONFIG_DRIVERS_I2C_MAX98373 is not set +# CONFIG_DRIVERS_I2C_MAX98927 is not set +# CONFIG_DRIVERS_I2C_PCA9538 is not set +# CONFIG_DRIVERS_I2C_PCF8523 is not set +# CONFIG_DRIVERS_I2C_PTN3460 is not set +# CONFIG_DRIVERS_I2C_RT1011 is not set +# CONFIG_DRIVERS_I2C_RT5663 is not set +# CONFIG_DRIVERS_I2C_RTD2132 is not set +# CONFIG_DRIVERS_I2C_RX6110SA is not set +# CONFIG_DRIVERS_I2C_SX9310 is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set +# CONFIG_PLATFORM_USES_FSP2_0 is not set +# CONFIG_PLATFORM_USES_FSP2_1 is not set +# CONFIG_INTEL_DDI is not set +# CONFIG_INTEL_EDID is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set +# CONFIG_INTEL_GMA_SWSMISCI is not set +CONFIG_GFX_GMA=y +# CONFIG_GFX_GMA_PANEL_1_ON_EDP is not set +CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Ironlake" +CONFIG_GFX_GMA_PANEL_1_PORT="LVDS" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVER_INTEL_I210 is not set +# CONFIG_DRIVERS_INTEL_ISH is not set +# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set +# CONFIG_HAVE_INTEL_PTT is not set +# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_DRIVER_PARADE_PS8640 is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_LPC_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_MAINBOARD_HAS_LPC_TPM=y +CONFIG_VGA=y +CONFIG_DRIVERS_RICOH_RCE822=y +# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set +# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +# CONFIG_DRIVERS_TI_TPS65913 is not set +# CONFIG_DRIVERS_TI_TPS65913_RTC is not set +# CONFIG_DRIVERS_USB_ACPI is not set +# CONFIG_COMMONLIB_STORAGE is not set + +# +# Security +# + +# +# Verified Boot (vboot) +# + +# +# Trusted Platform Module +# +CONFIG_TPM1=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_RDRESP_NEED_DELAY is not set + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# CONFIG_STM is not set +CONFIG_ACPI_SATA_GENERATOR=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set +# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set +# CONFIG_CONSOLE_SPI_FLASH is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_DEFAULT_POST_ON_LPC is not set +# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set +CONFIG_HWBASE_DEBUG_CB=y +CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_DISABLE_ACPI_HIBERNATE is not set +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +# CONFIG_NO_MONOTONIC_TIMER is not set +CONFIG_HAVE_MONOTONIC_TIMER=y +# CONFIG_TIMER_QUEUE is not set +CONFIG_HAVE_OPTION_TABLE=y +# CONFIG_PCI_IO_CFG_EXT is not set +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y +# CONFIG_GFXUMA is not set +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_COMMON_FADT=y +# CONFIG_ACPI_NHLT is not set + +# +# System tables +# +# CONFIG_GENERATE_MP_TABLE is not set +# CONFIG_GENERATE_PIRQ_TABLE is not set +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_SMBIOS_PROVIDED_BY_MOBO=y +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" + +# +# Payload +# +# CONFIG_PAYLOAD_NONE is not set +# CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_FILO is not set +# CONFIG_PAYLOAD_GRUB2 is not set +# CONFIG_PAYLOAD_LINUXBOOT is not set +CONFIG_PAYLOAD_SEABIOS=y +# CONFIG_PAYLOAD_UBOOT is not set +# CONFIG_PAYLOAD_YABITS is not set +# CONFIG_PAYLOAD_LINUX is not set +# CONFIG_PAYLOAD_TIANOCORE is not set +CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf" +CONFIG_SEABIOS_STABLE=y +# CONFIG_SEABIOS_MASTER is not set +# CONFIG_SEABIOS_REVISION is not set +# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set +CONFIG_SEABIOS_VGA_COREBOOT=y +CONFIG_SEABIOS_BOOTORDER_FILE="" +# CONFIG_SEABIOS_ADD_SERCON_PORT_FILE is not set +CONFIG_PAYLOAD_VGABIOS_FILE="payloads/external/SeaBIOS/seabios/out/vgabios.bin" +CONFIG_SEABIOS_DEBUG_LEVEL=-1 + +# +# Using default SeaBIOS log level +# +CONFIG_PAYLOAD_OPTIONS="" +# CONFIG_PXE is not set +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set +# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set +CONFIG_COMPRESS_SECONDARY_PAYLOAD=y + +# +# Secondary Payloads +# +CONFIG_COREINFO_SECONDARY_PAYLOAD=y +# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set +CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y +# CONFIG_TINT_SECONDARY_PAYLOAD is not set + +# +# Debugging +# + +# +# CPU Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_FATAL_ASSERTS is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_SMI is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_TRACE is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +# CONFIG_HAVE_EM100_SUPPORT is not set +CONFIG_NO_EDID_FILL_FB=y +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_WARNINGS_ARE_ERRORS=y +# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set +# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set +# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set +# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set +# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set +# CONFIG_REG_SCRIPT is not set +CONFIG_MAX_REBOOT_CNT=3 +# CONFIG_NO_XIP_EARLY_STAGES is not set +# CONFIG_EARLY_CBMEM_LIST is not set +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/x230t/front.jpg b/x230t/front.jpg new file mode 100644 index 0000000..15f3259 Binary files /dev/null and b/x230t/front.jpg differ diff --git a/x230t/nonfree-defconfig-4bd6927388 b/x230t/nonfree-defconfig-4bd6927388 new file mode 100644 index 0000000..86d5338 --- /dev/null +++ b/x230t/nonfree-defconfig-4bd6927388 @@ -0,0 +1,769 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_COREBOOT_BUILD=y +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_STATIC_OPTION_TABLE is not set +CONFIG_COMPRESS_RAMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_RELOCATABLE_RAMSTAGE=y +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="bootsplash.jpg" + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ADLINK is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BAP is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_ELMEX is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GIZMOSPHERE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_JETWAY is not set +# CONFIG_VENDOR_KONTRON is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_LIPPERT is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SCALEWAY is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_UP is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_FAMILY="ThinkPad X230t" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/x230" +CONFIG_MAX_CPUS=8 +CONFIG_VGA_BIOS_ID="8086,0166" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +CONFIG_NO_POST=y +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_VGA_BIOS=y +CONFIG_VGA_BIOS_FILE="pci8086,0166.rom" +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_DEVICETREE="devicetree.cb" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_CBFS_SIZE=0x400000 +CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_PAYLOAD_CONFIGFILE="" +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set +# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set +# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set +# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set +# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set +# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set +# CONFIG_VBOOT is not set +CONFIG_VBOOT_VBNV_OFFSET=0x2a +CONFIG_DCACHE_RAM_BASE=0xfefe0000 +CONFIG_DCACHE_RAM_SIZE=0x20000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x10000 +CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_TPM_INIT=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_TPM_PIRQ=0x0 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" +# CONFIG_HAVE_IFD_BIN is not set +# CONFIG_BOARD_LENOVO_G505S is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +CONFIG_BOARD_LENOVO_X230T=y +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_VBOOT_SLOTS_RW_AB=y +CONFIG_DRIVER_LENOVO_SERIALS=y +# CONFIG_BOARD_LENOVO_BASEBOARD_T520 is not set +# CONFIG_BOARD_LENOVO_BASEBOARD_T530 is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09 +CONFIG_HEAP_SIZE=0x4000 +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_BOARD_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +CONFIG_SYSTEM_TYPE_LAPTOP=y +# CONFIG_SYSTEM_TYPE_TABLET is not set +# CONFIG_SYSTEM_TYPE_DETACHABLE is not set +# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set +# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set + +# +# Chipset +# + +# +# SoC +# +CONFIG_CPU_SPECIFIC_OPTIONS=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_CPU_ADDR_BITS=36 +# CONFIG_S3_VGA_ROM_RUN is not set +CONFIG_EHCI_BAR=0xfef00000 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d" +# CONFIG_SOC_CAVIUM_CN81XX is not set +CONFIG_ARCH_ARMV8_EXTENSION=0 +CONFIG_STACK_SIZE=0x1000 +# CONFIG_SOC_CAVIUM_COMMON is not set +# CONFIG_SOC_INTEL_GLK is not set +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_UART_PCI_ADDR=0x0 +# CONFIG_SOC_MEDIATEK_MT8173 is not set +# CONFIG_SOC_MEDIATEK_MT8183 is not set +# CONFIG_SOC_NVIDIA_TEGRA124 is not set +# CONFIG_SOC_NVIDIA_TEGRA210 is not set +# CONFIG_SOC_QUALCOMM_COMMON is not set +# CONFIG_SOC_QC_IPQ40XX is not set +# CONFIG_SOC_QC_IPQ806X is not set +# CONFIG_SOC_QUALCOMM_QCS405 is not set +# CONFIG_SOC_QUALCOMM_SC7180 is not set +# CONFIG_SOC_QUALCOMM_SDM845 is not set +# CONFIG_SOC_ROCKCHIP_RK3288 is not set +# CONFIG_SOC_ROCKCHIP_RK3399 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set +# CONFIG_SOC_UCB_RISCV is not set + +# +# CPU +# +# CONFIG_CPU_AMD_AGESA is not set +# CONFIG_CPU_AMD_PI is not set +# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set +CONFIG_CPU_INTEL_MODEL_206AX=y +CONFIG_SSE2=y +# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set +# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_MICROCODE_UPDATE_PRE_RAM=y +# CONFIG_CPU_TI_AM335X is not set +# CONFIG_PARALLEL_CPU_INIT is not set +CONFIG_PARALLEL_MP=y +# CONFIG_PARALLEL_MP_AP_WORK is not set +# CONFIG_UDELAY_LAPIC is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +# CONFIG_TSC_SYNC_LFENCE is not set +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_NO_FIXED_XIP_ROM_SIZE=y +CONFIG_LOGICAL_CPUS=y +CONFIG_HAVE_SMI_HANDLER=y +# CONFIG_NO_SMM is not set +# CONFIG_SMM_ASEG is not set +CONFIG_SMM_TSEG=y +CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 +CONFIG_SMM_STUB_STACK_SIZE=0x400 +# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set +# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set +# CONFIG_X86_AMD_FIXED_MTRRS is not set +# CONFIG_X86_AMD_INIT_SIPI is not set +# CONFIG_SOC_SETS_MSRS is not set +CONFIG_SMP=y +CONFIG_MMX=y +CONFIG_SSE=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_USES_MICROCODE_HEADER_FILES is not set +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +# CONFIG_NORTHBRIDGE_AMD_AGESA is not set +# CONFIG_NORTHBRIDGE_AMD_PI is not set +CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y +# CONFIG_SANDYBRIDGE_VBOOT_IN_ROMSTAGE is not set +CONFIG_USE_NATIVE_RAMINIT=y +# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set + +# +# Southbridge +# +# CONFIG_AMD_SB_CIMX is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set +CONFIG_SOUTHBRIDGE_INTEL_C216=y +CONFIG_SOUTH_BRIDGE_OPTIONS=y +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_LOCK_SPI_FLASH_NONE=y +# CONFIG_LOCK_SPI_FLASH_RO is not set +# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set + +# +# Super I/O +# +# CONFIG_SUPERIO_ASPEED_AST2400 is not set +# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set +# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set +# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +# CONFIG_EC_51NB_NPCE985LA0DX is not set +# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set +# CONFIG_EC_GOOGLE_WILCO is not set +CONFIG_EC_LENOVO_H8=y +CONFIG_SEABIOS_PS2_TIMEOUT=5000 +# CONFIG_H8_BEEP_ON_DEATH is not set +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_HAS_BAT_TRESHOLDS_IMPL=y +# CONFIG_H8_HAS_PRIMARY_FN_KEYS is not set +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +# CONFIG_CAVIUM_BDK is not set +# CONFIG_MAINBOARD_HAS_CHROMEOS is not set +# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set +# CONFIG_UEFI_2_4_BINDING is not set +# CONFIG_UDK_2015_BINDING is not set +# CONFIG_UDK_2017_BINDING is not set +# CONFIG_USE_SIEMENS_HWILIB is not set +# CONFIG_ARM_LPAE is not set +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +# CONFIG_ARCH_POSTCAR_X86_64 is not set +# CONFIG_USE_MARCH_586 is not set +# CONFIG_AP_IN_SIPI_WAIT is not set +CONFIG_X86_RESET_VECTOR=0xfffffff0 +# CONFIG_SIPI_VECTOR_IN_ROM is not set +CONFIG_RAMBASE=0xe00000 +CONFIG_RAMTOP=0x1000000 +CONFIG_NUM_IPI_STARTS=2 +# CONFIG_CBMEM_TOP_BACKUP is not set +CONFIG_PC80_SYSTEM=y +# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y +# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set +# CONFIG_HPET_ADDRESS_OVERRIDE is not set +CONFIG_HPET_ADDRESS=0xfed00000 +CONFIG_ID_SECTION_OFFSET=0x80 +CONFIG_POSTCAR_STAGE=y +# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set +# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_ACPI_HAVE_PCAT_8259=y +# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +# CONFIG_PAGING_IN_CACHE_AS_RAM is not set +# CONFIG_IDT_IN_EVERY_STAGE is not set +CONFIG_HAVE_CF9_RESET=y +# CONFIG_PIRQ_ROUTE is not set + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_VBE_LINEAR_FRAMEBUFFER=y +# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set +# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +# CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set +# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set +CONFIG_VGA_ROM_RUN=y +# CONFIG_NO_GFX_INIT is not set +# CONFIG_ALWAYS_LOAD_OPROM is not set +# CONFIG_ON_DEVICE_ROM_LOAD is not set +CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y +# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set +# CONFIG_MULTIPLE_VGA_ADAPTERS is not set + +# +# Display +# +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +# CONFIG_FRAMEBUFFER_VESA_MODE_100 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_101 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_102 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_103 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_104 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_105 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_106 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_107 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_108 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_109 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_10A is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_10B is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_10C is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_10D is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_10E is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_10F is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_110 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_111 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_112 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_113 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_114 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_115 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_116 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_117 is not set +CONFIG_FRAMEBUFFER_VESA_MODE_118=y +# CONFIG_FRAMEBUFFER_VESA_MODE_119 is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_11A is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_11B is not set +# CONFIG_FRAMEBUFFER_VESA_MODE_USER is not set +CONFIG_FRAMEBUFFER_VESA_MODE=0x118 +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_VBE_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_PCI=y +# CONFIG_NO_MMCONF_SUPPORT is not set +CONFIG_MMCONF_SUPPORT=y +# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set +CONFIG_HT_CHAIN_UNITID_BASE=0 +CONFIG_HT_CHAIN_END_UNITID_BASE=0 +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +# CONFIG_AZALIA_PLUGIN_SUPPORT is not set +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +# CONFIG_PCIEXP_HOTPLUG is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +# CONFIG_VGA_BIOS_DGPU is not set +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set + +# +# Generic Drivers +# +# CONFIG_DRIVERS_AS3722_RTC is not set +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_MAINBOARD_HAS_CRB_TPM is not set +# CONFIG_ELOG is not set +# CONFIG_GIC is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_DRIVERS_LENOVO_WACOM is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_HAS_RECOVERY_MRC_CACHE is not set +# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set +# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set +# CONFIG_MRC_WRITE_NV_LATE is not set +# CONFIG_RT8168_GET_MAC_FROM_VPD is not set +# CONFIG_RT8168_SET_LED_MODE is not set +# CONFIG_SMMSTORE is not set +# CONFIG_SMMSTORE_IN_CBFS is not set +CONFIG_SPI_FLASH=y +# CONFIG_SPI_SDCARD is not set +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set +# CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS is not set +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set +# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set +CONFIG_NO_UART_ON_SUPERIO=y +# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set +# CONFIG_UART_OVERRIDE_REFCLK is not set +# CONFIG_DRIVERS_UART_8250MEM is not set +# CONFIG_DRIVERS_UART_8250MEM_32 is not set +# CONFIG_HAVE_UART_SPECIAL is not set +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_DRIVERS_UART_PL011 is not set +# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +CONFIG_DRIVERS_GENERIC_WIFI=y +# CONFIG_USE_SAR is not set +# CONFIG_DRIVERS_AMD_PI is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GFX_GENERIC is not set +# CONFIG_DRIVERS_I2C_MAX98373 is not set +# CONFIG_DRIVERS_I2C_MAX98927 is not set +# CONFIG_DRIVERS_I2C_PCA9538 is not set +# CONFIG_DRIVERS_I2C_PCF8523 is not set +# CONFIG_DRIVERS_I2C_PTN3460 is not set +# CONFIG_DRIVERS_I2C_RT1011 is not set +# CONFIG_DRIVERS_I2C_RT5663 is not set +# CONFIG_DRIVERS_I2C_RTD2132 is not set +# CONFIG_DRIVERS_I2C_RX6110SA is not set +# CONFIG_DRIVERS_I2C_SX9310 is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set +# CONFIG_PLATFORM_USES_FSP2_0 is not set +# CONFIG_PLATFORM_USES_FSP2_1 is not set +# CONFIG_INTEL_DDI is not set +# CONFIG_INTEL_EDID is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set +# CONFIG_INTEL_GMA_SWSMISCI is not set +# CONFIG_GFX_GMA_PANEL_1_ON_EDP is not set +CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y +# CONFIG_DRIVER_INTEL_I210 is not set +# CONFIG_DRIVERS_INTEL_ISH is not set +# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set +# CONFIG_HAVE_INTEL_PTT is not set +# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_DRIVER_PARADE_PS8640 is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_LPC_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_MAINBOARD_HAS_LPC_TPM=y +CONFIG_DRIVERS_RICOH_RCE822=y +# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set +# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +# CONFIG_DRIVERS_TI_TPS65913 is not set +# CONFIG_DRIVERS_TI_TPS65913_RTC is not set +# CONFIG_DRIVERS_USB_ACPI is not set +# CONFIG_COMMONLIB_STORAGE is not set + +# +# Security +# + +# +# Verified Boot (vboot) +# + +# +# Trusted Platform Module +# +CONFIG_TPM1=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_RDRESP_NEED_DELAY is not set + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# CONFIG_STM is not set +CONFIG_ACPI_SATA_GENERATOR=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set +# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set +# CONFIG_CONSOLE_SPI_FLASH is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_DEFAULT_POST_ON_LPC is not set +# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set +CONFIG_HWBASE_DEBUG_CB=y +CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_DISABLE_ACPI_HIBERNATE is not set +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +# CONFIG_NO_MONOTONIC_TIMER is not set +CONFIG_HAVE_MONOTONIC_TIMER=y +# CONFIG_TIMER_QUEUE is not set +CONFIG_HAVE_OPTION_TABLE=y +# CONFIG_PCI_IO_CFG_EXT is not set +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y +# CONFIG_GFXUMA is not set +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_COMMON_FADT=y +# CONFIG_ACPI_NHLT is not set + +# +# System tables +# +# CONFIG_GENERATE_MP_TABLE is not set +# CONFIG_GENERATE_PIRQ_TABLE is not set +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_SMBIOS_PROVIDED_BY_MOBO=y +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" + +# +# Payload +# +# CONFIG_PAYLOAD_NONE is not set +# CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_FILO is not set +# CONFIG_PAYLOAD_GRUB2 is not set +# CONFIG_PAYLOAD_LINUXBOOT is not set +CONFIG_PAYLOAD_SEABIOS=y +# CONFIG_PAYLOAD_UBOOT is not set +# CONFIG_PAYLOAD_YABITS is not set +# CONFIG_PAYLOAD_LINUX is not set +# CONFIG_PAYLOAD_TIANOCORE is not set +CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf" +CONFIG_SEABIOS_STABLE=y +# CONFIG_SEABIOS_MASTER is not set +# CONFIG_SEABIOS_REVISION is not set +# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set +CONFIG_SEABIOS_BOOTORDER_FILE="" +# CONFIG_SEABIOS_ADD_SERCON_PORT_FILE is not set +CONFIG_SEABIOS_DEBUG_LEVEL=-1 + +# +# Using default SeaBIOS log level +# +CONFIG_PAYLOAD_OPTIONS="" +# CONFIG_PXE is not set +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set +# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set +CONFIG_COMPRESS_SECONDARY_PAYLOAD=y + +# +# Secondary Payloads +# +CONFIG_COREINFO_SECONDARY_PAYLOAD=y +# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set +CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y +# CONFIG_TINT_SECONDARY_PAYLOAD is not set + +# +# Debugging +# + +# +# CPU Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_FATAL_ASSERTS is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_SMI is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_REALMODE_DEBUG is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_TRACE is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +# CONFIG_HAVE_EM100_SUPPORT is not set +CONFIG_NO_EDID_FILL_FB=y +CONFIG_WARNINGS_ARE_ERRORS=y +# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set +# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set +# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set +# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set +# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set +# CONFIG_REG_SCRIPT is not set +CONFIG_MAX_REBOOT_CNT=3 +# CONFIG_NO_XIP_EARLY_STAGES is not set +# CONFIG_EARLY_CBMEM_LIST is not set +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/x230t/pci8086,0166.rom b/x230t/pci8086,0166.rom new file mode 100644 index 0000000..83223da Binary files /dev/null and b/x230t/pci8086,0166.rom differ diff --git a/x230t/release.sh b/x230t/release.sh new file mode 100755 index 0000000..e9e530c --- /dev/null +++ b/x230t/release.sh @@ -0,0 +1,150 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2018, Martin Kepplinger +# +# Script to build release-archives with. This requires a checkout from git. +# WARNING: This script is very dangerous! It may delete any untracked files. +set -e +have_version=0 +have_image=0 +have_image_2=0 + +usage() +{ + echo "Usage: $0 -v version -i release_image -f second_release_image" +} + +args=$(getopt -o v:i:f: -- "$@") +if [ $? -ne 0 ] ; then + usage + exit 1 +fi +eval set -- "$args" +while [ $# -gt 0 ] +do + case "$1" in + -i) + RELEASE_IMAGE=$2 + have_image=1 + shift + ;; + -f) + RELEASE_IMAGE_2=$2 + have_image_2=1 + shift + ;; + -v) + version=$2 + have_version=1 + shift + ;; + --) + shift + break + ;; + *) + echo "Invalid option: $1" + usage + exit 1 + ;; + esac + shift +done + +if [ ! "$have_image" -gt 0 ] ; then + echo "we currently need 2 release images" + usage + exit 1 +fi +if [ ! "$have_image_2" -gt 0 ] ; then + echo "we currently need 2 release images" + usage + exit 1 +fi + +# Do we have a desired version number? +if [ "$have_version" -gt 0 ] ; then + echo "trying to build version $version" +else + echo "please specify a version" + usage + exit 1 +fi + +# Version number sanity check +if grep "${version}" NEWS +then + echo "configurations seems ok" +else + echo "please check the NEWS file" + exit 1 +fi + +# Check that we are on master +branch=$(git rev-parse --abbrev-ref HEAD) +echo "we are on branch $branch" + +if [ ! "${branch}" = "master" ] ; then + echo "you don't seem to be on the master branch" + exit 1 +fi + +if git diff-index --quiet HEAD --; then + # no changes + echo "there are no uncommitted changes (version bump)" + exit 1 +fi +echo "======================================================" +echo " are you fine with the following version bump?" +echo "======================================================" +git diff +echo "======================================================" +read -r -p " Press enter to continue" +echo "======================================================" + +filesize=$(wc -c <"${RELEASE_IMAGE}") +reference_filesize=4194304 +if [ ! "$filesize" -eq "$reference_filesize" ] ; then + echo "filesize of release image is wrong" + exit 1 +fi +filesize=$(wc -c <"${RELEASE_IMAGE_2}") +reference_filesize=4194304 +if [ ! "$filesize" -eq "$reference_filesize" ] ; then + echo "filesize of release image is wrong" + exit 1 +fi + +RELEASE_DIR="skulls-x230-${version}" +rm -rf "$RELEASE_DIR" +mkdir -p "$RELEASE_DIR" + +# copy-in the ROMs +cp "${RELEASE_IMAGE}" "$RELEASE_DIR" +cp "${RELEASE_IMAGE_2}" "$RELEASE_DIR" + +RELEASE_IMAGE_FILE=$(basename "${RELEASE_IMAGE}") +sha256sum ${RELEASE_DIR}/${RELEASE_IMAGE_FILE} > "${RELEASE_DIR}/${RELEASE_IMAGE_FILE}.sha256" +RELEASE_IMAGE_FILE_2=$(basename "${RELEASE_IMAGE_2}") +sha256sum ${RELEASE_DIR}/${RELEASE_IMAGE_FILE_2} > "${RELEASE_DIR}/${RELEASE_IMAGE_FILE_2}.sha256" + +# copy in device independent stuff +cp ../SOURCE.md "$RELEASE_DIR" +cp -a ../util "$RELEASE_DIR" + +# copy in x230 stuff +cp -a README.md NEWS LICENSE* \ + x230_skulls.sh x230_heads.sh \ + external_install_bottom.sh external_install_top.sh \ + "$RELEASE_DIR" + +tar -cJf "$RELEASE_DIR".tar.xz "$RELEASE_DIR" + +rm -rf "$RELEASE_DIR" + +git commit -a -m "update to ${version}" +git tag -s "${version}" -m "skulls-x230 ${version}" + +sha256sum "$RELEASE_DIR".tar.xz > "$RELEASE_DIR".tar.xz.sha256 +sha512sum "$RELEASE_DIR".tar.xz > "$RELEASE_DIR".tar.xz.sha512 +gpg -b -a "$RELEASE_DIR".tar.xz diff --git a/x230t/rpi_clip.jpg b/x230t/rpi_clip.jpg new file mode 100644 index 0000000..44d3b07 Binary files /dev/null and b/x230t/rpi_clip.jpg differ diff --git a/x230t/soic8.png b/x230t/soic8.png new file mode 100644 index 0000000..f4e52c5 Binary files /dev/null and b/x230t/soic8.png differ diff --git a/x230t/util b/x230t/util new file mode 120000 index 0000000..40c3fc5 --- /dev/null +++ b/x230t/util @@ -0,0 +1 @@ +../util \ No newline at end of file diff --git a/x230t/x230_heads.sh b/x230t/x230_heads.sh new file mode 100755 index 0000000..7c06b38 --- /dev/null +++ b/x230t/x230_heads.sh @@ -0,0 +1,162 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2018, Martin Kepplinger + +set -e + +cd "$(dirname "$0")" + +source "util/functions.sh" + +have_input_image=0 +extended_mode=0 + +usage() +{ + echo "Skulls for the X230" + echo " Run this script on the X230 directly." + echo "" + echo " This flashes Heads to your BIOS, see http://osresearch.net" + echo " Heads is a different project. No image is included." + echo " Read https://github.com/osresearch/heads for how to build it" + echo " Make sure you booted Linux with iomem=relaxed" + echo "" + echo "Usage: $0 -i .rom" + echo "" + echo " (EXPERIMENTAL) Extended Bios:" + echo " -x use extended mode" + echo "" + echo "Usage example:" + echo "Flash an extended Heads image: $0 -x -i .rom" +} + +args=$(getopt -o xi:h -- "$@") +if [ $? -ne 0 ] ; then + usage + exit 1 +fi + +eval set -- "$args" +while [ $# -gt 0 ] +do + case "$1" in + -i) + INPUT_IMAGE_PATH=$2 + have_input_image=1 + shift + ;; + -x) + extended_mode=1 + ;; + -h) + usage + exit 1 + ;; + --) + shift + break + ;; + *) + echo "Invalid option: $1" + exit 1 + ;; + esac + shift +done + +force_x230_and_root + +if [ ! "$have_input_image" -gt 0 ] ; then + image_available=$(ls -1 | grep rom || true) + if [ -z "${image_available}" ] ; then + echo "No image file found. Please add -i " + echo "" + usage + exit 1 + fi + + prompt="file not specified. Please select a file to flash:" + options=( $(find -maxdepth 1 -name "*rom" -print0 | xargs -0) ) + + PS3="$prompt " + select INPUT_IMAGE_PATH in "${options[@]}" "Quit" ; do + if (( REPLY == 1 + ${#options[@]} )) ; then + exit + + elif (( REPLY > 0 && REPLY <= ${#options[@]} )) ; then + break + + else + echo "Invalid option. Try another one." + fi + done +fi + +OUTPUT_PATH=output +INPUT_IMAGE_NAME=$(basename "${INPUT_IMAGE_PATH}") +OUTPUT_IMAGE_NAME=${INPUT_IMAGE_NAME%%.*}_prepared.rom + +echo -e "input: ${INPUT_IMAGE_NAME}" +echo -e "output: ${OUTPUT_PATH}/${OUTPUT_IMAGE_NAME}" + +input_filesize=$(wc -c <"$INPUT_IMAGE_PATH") +reference_filesize=12582912 +if [ ! "$input_filesize" -eq "$reference_filesize" ] ; then + echo "Error: input file must be 12MB of size" + exit 1 +fi + +rm -rf ${OUTPUT_PATH} +mkdir ${OUTPUT_PATH} + +cp "${INPUT_IMAGE_PATH}" "${OUTPUT_PATH}/${OUTPUT_IMAGE_NAME}" +LAYOUT_FILENAME="x230-layout-heads.txt" + +if [ ! "$extended_mode" -gt 0 ] ; then + echo "0x00000000:0x00000fff ifd" > ${OUTPUT_PATH}/${LAYOUT_FILENAME} + echo "0x00001000:0x00002fff gbe" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} + echo "0x00003000:0x004fffff me" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} + echo "0x00500000:0x00bfffff bios" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} +else + echo -e "${YELLOW}EXPERIMENTAL: extended flash image${NC}" + echo "0x00000000:0x00000fff ifd" > ${OUTPUT_PATH}/${LAYOUT_FILENAME} + echo "0x00001000:0x00002fff gbe" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} + echo "0x00003000:0x0001afff me" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} + echo "0x0001b000:0x00bfffff bios" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} +fi + +echo -e "${YELLOW}WARNING${NC}: Make sure not to power off your computer or interrupt this process in any way!" +echo -e " Interrupting this process may result in irreparable damage to your computer!" +check_battery +while true; do + read -r -p "Flash the BIOS now? y/N: " yn + case $yn in + [Yy]* ) + if [ ! "$extended_mode" -gt 0 ] ; then + cd ${OUTPUT_PATH} && ${FLASHROM} --force --noverify-all -p internal --layout ${LAYOUT_FILENAME} --image bios -w "${OUTPUT_IMAGE_NAME}" + else + cd ${OUTPUT_PATH} && ${FLASHROM} -p internal --layout ${LAYOUT_FILENAME} --image ifd -w "${OUTPUT_IMAGE_NAME}" + ${FLASHROM} -p internal --layout ${LAYOUT_FILENAME} --image me -w "${OUTPUT_IMAGE_NAME}" + ${FLASHROM} -p internal --layout ${LAYOUT_FILENAME} --image bios -w "${OUTPUT_IMAGE_NAME}" + fi + break + ;; + [Nn]* ) + exit + ;; + * ) + exit + ;; + esac +done + +rm -rf ${OUTPUT_PATH} + +while true; do + read -r -p "Power off now? (please do!) Y/n: " yn + case $yn in + [Yy]* ) systemctl poweroff ;; + [Nn]* ) exit;; + * ) systemctl poweroff ;; + esac +done diff --git a/x230t/x230_heads_extract_blobs.sh b/x230t/x230_heads_extract_blobs.sh new file mode 100755 index 0000000..65d2704 --- /dev/null +++ b/x230t/x230_heads_extract_blobs.sh @@ -0,0 +1,127 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2019, Martin Kepplinger + +set -e + +cd "$(dirname "$0")" + +IFDTOOL=./util/ifdtool/ifdtool +ME_CLEANER=./util/me_cleaner/me_cleaner.py +have_input_image=0 + +usage() +{ + echo "EXPERIMENTAL" + echo "" + echo "This generates files for building Heads from your original 12M backup:" + echo " (cat bottom.bin top.bin > full_backup_image.rom)" + echo " ifd/me will be shrinked by me_cleaner and unlocked" + echo "" + echo " http://osresearch.net" + echo "" + echo "Usage: $0 -f .rom -i (optional) -m " + echo "" + usage + exit 1 +fi + +if [ ! -e ${IFDTOOL} ] ; then + if [ ! -d util/ifdtool ] ; then + echo "Please specify -i " + exit 1 + fi + make -C util/ifdtool + if [ ! -e ${IFDTOOL} ] ; then + echo "Failed to build ifdtool" + exit 1 + fi +fi +if [ ! -e ${ME_CLEANER} ] ; then + mkdir -p util/me_cleaner + curl -L https://raw.githubusercontent.com/corna/me_cleaner/v1.2/me_cleaner.py -o util/me_cleaner/me_cleaner.py + if [ ! -e ${ME_CLEANER} ] ; then + echo "Failed to download me_cleaner" + exit 1 + fi +fi + +OUTPUT_PATH=output +INPUT_IMAGE_NAME=$(basename "${INPUT_IMAGE_PATH}") +WORK_IMAGE_NAME=${INPUT_IMAGE_NAME%%.*}_prepared.rom + +input_filesize=$(wc -c <"$INPUT_IMAGE_PATH") +reference_filesize=12582912 +if [ ! "$input_filesize" -eq "$reference_filesize" ] ; then + echo "Error: input file must be 12MB of size" + exit 1 +fi + +rm -rf ${OUTPUT_PATH} +mkdir ${OUTPUT_PATH} +cp "${INPUT_IMAGE_PATH}" "${OUTPUT_PATH}/${WORK_IMAGE_NAME}" + +${IFDTOOL} -x "${OUTPUT_PATH}/${WORK_IMAGE_NAME}" +mv flashregion*bin "${OUTPUT_PATH}/" +cp "${OUTPUT_PATH}/flashregion_3_gbe.bin" "${OUTPUT_PATH}/gbe.bin" +rm ${OUTPUT_PATH}/flashregion*bin + +python ${ME_CLEANER} -r -t -d -S -O "${OUTPUT_PATH}/unneeded_cleaned_image.bin" -D "${OUTPUT_PATH}/ifd_shrinked.bin" -M "${OUTPUT_PATH}/me.bin" "${OUTPUT_PATH}/${WORK_IMAGE_NAME}" +rm "${OUTPUT_PATH}/unneeded_cleaned_image.bin" + +${IFDTOOL} -u "${OUTPUT_PATH}/ifd_shrinked.bin" +mv "${OUTPUT_PATH}/ifd_shrinked.bin.new" "${OUTPUT_PATH}/descriptor.bin" +rm "${OUTPUT_PATH}/ifd_shrinked.bin" + +rm "${OUTPUT_PATH}/${WORK_IMAGE_NAME}" + +echo "done. this is what a layout file should look like:" +echo "0x00000000:0x00000fff ifd" +echo "0x00001000:0x00002fff gbe" +echo "0x00003000:0x0001afff me" +echo "0x0001b000:0x00bfffff bios" + +mv ${OUTPUT_PATH}/* . && rm -rf ${OUTPUT_PATH} diff --git a/x230t/x230_skulls.sh b/x230t/x230_skulls.sh new file mode 100755 index 0000000..f3d52e1 --- /dev/null +++ b/x230t/x230_skulls.sh @@ -0,0 +1,224 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-3.0+ +# Copyright (C) 2019, Martin Kepplinger + +set -e + +cd "$(dirname "$0")" + +source "util/functions.sh" + +have_input_image=0 +request_update=0 +verbose=0 + +usage() +{ + echo "Skulls for the X230 Tablet" + echo " Run this script on the X230 Tablet directly." + echo "" + echo " This flashes the BIOS with the given image." + echo " Make sure you booted Linux with iomem=relaxed" + echo "" + echo "Usage: $0 [-i <4mb_top_image>.rom] [-U] [-h]" + echo "Options:" + echo " -i path to the image to flash" + echo " -U update: check for a new Skulls package online" + echo " -v verbose output. prints more information" + echo " -h print this help text" +} + +args=$(getopt -o i:hUv -- "$@") +if [ $? -ne 0 ] ; then + usage + exit 1 +fi + +eval set -- "$args" +while [ $# -gt 0 ] +do + case "$1" in + -i) + INPUT_IMAGE_PATH=$2 + have_input_image=1 + shift + ;; + -h) + usage + exit 1 + ;; + -U) + request_update=1 + ;; + -v) + verbose=1 + ;; + --) + shift + break + ;; + *) + echo "Invalid option: $1" + exit 1 + ;; + esac + shift +done + +if [ "$request_update" -gt 0 ] ; then + warn_not_root + + command -v curl >/dev/null 2>&1 || { echo -e >&2 "${RED}Please install curl.${NC}"; exit 1; } + + CURRENT_VERSION=$(head -2 NEWS | egrep -o "([0-9]{1,}\.)+[0-9]{1,}") + + UPSTREAM_FILE=$(curl -s https://api.github.com/repos/merge/skulls/releases/latest | grep browser_download_url | cut -d'"' -f4 | cut -d'/' -f9 | head -n 1) + + UPSTREAM_VERSION=$(curl -s https://api.github.com/repos/merge/skulls/releases/latest | grep browser_download_url | cut -d'"' -f4 | cut -d'/' -f9 | head -n 1 | egrep -o "([0-9]{1,}\.)+[0-9]{1,}") + + UPSTREAM_X230=$(echo ${UPSTREAM_FILE} | grep x230) + if [[ -z "$UPSTREAM_X230" ]] ; then + echo "The latest release didn't include the X230" + exit 0 + fi + + if [[ $verbose -gt 0 ]] ; then + echo "This is v$CURRENT_VERSION and latest is v$UPSTREAM_VERSION" + fi + + if [[ "$CURRENT_VERSION" = "$UPSTREAM_VERSION" ]] ; then + echo -e "${GREEN}You are using the latest version of Skulls for the X230${NC}" + exit 0 + elif [[ "$CURRENT_VERSION" < "$UPSTREAM_VERSION" ]] ; then + echo -e "${RED}You have ${CURRENT_VERSION} but there is version ${UPSTREAM_VERSION} available for the X230. Please update.${NC}" + read -r -p "Download it to the parent directory now? [y/N] " response + case "$response" in + [yY][eE][sS]|[yY]) + UPSTREAM_URL=$(curl -s https://api.github.com/repos/merge/skulls/releases/latest | grep browser_download_url | cut -d'"' -f4 | head -n 1) + UPSTREAM_URL_SHA256=$(curl -s https://api.github.com/repos/merge/skulls/releases/latest | grep browser_download_url | cut -d'"' -f4 | head -n 3 | tail -n 1) + cd .. + curl -LO ${UPSTREAM_URL} + curl -LO ${UPSTREAM_URL_SHA256} + sha256sum -c ${UPSTREAM_FILE}.sha256 + mkdir skulls-x230-${UPSTREAM_VERSION} + tar -xf ${UPSTREAM_FILE} -C skulls-x230-${UPSTREAM_VERSION}/ + echo "Version ${UPSTREAM_VERSION} extracted to ../skulls-x230-${UPSTREAM_VERSION}/" + echo "Please continue in the new directory." + ;; + *) + exit 0 + ;; + esac + else + echo "You seem to use a development version. Please use release package skulls-x230 ${UPSTREAM_VERSION} for flashing." + fi + + exit 0 +fi + +force_x230_and_root + +BIOS_VENDOR=$(${DMIDECODE} -t bios | grep Vendor | cut -d':' -f2) +if [[ $BIOS_VENDOR != *"coreboot"* ]] ; then + BIOS_VERSION=$(${DMIDECODE} -s bios-version | grep -o '[1-2].[0-7][0-9]') + bios_major=$(echo "$BIOS_VERSION" | cut -d. -f1) + bios_minor=$(echo "$BIOS_VERSION" | cut -d. -f2) + + if [ "${bios_minor}" -ge "61" ] ; then + echo "Ready to use external_install_bottom.sh and external_install_top.sh" + echo "Please run both scripts from a different computer with a" + echo "hardware SPI flasher." + else + echo -e "The installed original BIOS is very old." + echo -e "${RED}Please upgrade${NC} from lenovo.com before installing coreboot." + fi + exit 0 +fi + +if [[ "$verbose" -gt 0 ]] ; then + if [ -d "/sys/class/power_supply/BAT0" ] ; then + bat_last_full=$(cat /sys/class/power_supply/BAT0/charge_full) + bat_design_cap=$(cat /sys/class/power_supply/BAT0/charge_full_design) + bat_health=$(echo "scale=2 ; $bat_last_full/$bat_design_cap" | bc | sed 's/^\./0./') + echo "INFO: Battery hardware health is $bat_health%" + fi +fi + +if [ ! "$have_input_image" -gt 0 ] ; then + image_available=$(ls -1 | grep x230_coreboot_seabios || true) + if [ -z "${image_available}" ] ; then + echo "No image file found. Please add -i " + echo "" + usage + exit 1 + fi + + prompt="file not specified. Please select a file to flash. Please read the README for details about the differences:" + options=( $(find -maxdepth 1 -name "x230_coreboot_seabios*rom" -print0 | xargs -0) ) + + PS3="$prompt " + select INPUT_IMAGE_PATH in "${options[@]}" "Quit" ; do + if (( REPLY == 1 + ${#options[@]} )) ; then + exit + + elif (( REPLY > 0 && REPLY <= ${#options[@]} )) ; then + break + + else + echo "Invalid option. Try another one." + fi + done +fi + + +OUTPUT_PATH=output +INPUT_IMAGE_NAME=$(basename "${INPUT_IMAGE_PATH}") +OUTPUT_IMAGE_NAME=${INPUT_IMAGE_NAME%%.*}_prepared_12mb.rom +OUTPUT_IMAGE_PATH=${OUTPUT_PATH}/${OUTPUT_IMAGE_NAME} + +echo -e "input: ${INPUT_IMAGE_NAME}" +echo -e "output: ${OUTPUT_IMAGE_PATH}" + +input_filesize=$(wc -c <"$INPUT_IMAGE_PATH") +reference_filesize=4194304 +if [ ! "$input_filesize" -eq "$reference_filesize" ] ; then + echo "Error: input file must be 4MB of size" + exit 1 +fi + +rm -rf ${OUTPUT_PATH} +mkdir ${OUTPUT_PATH} + +dd if=/dev/zero of="${OUTPUT_IMAGE_PATH}" bs=4M count=2 status=none +dd if="${INPUT_IMAGE_PATH}" oflag=append conv=notrunc of="${OUTPUT_IMAGE_PATH}" bs=4M status=none + +LAYOUT_FILENAME="x230-layout.txt" + +echo "0x00000000:0x00000fff ifd" > ${OUTPUT_PATH}/${LAYOUT_FILENAME} +echo "0x00001000:0x00002fff gbe" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} +echo "0x00003000:0x004fffff me" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} +echo "0x00500000:0x007fffff unused" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} +echo "0x00800000:0x00bfffff bios" >> ${OUTPUT_PATH}/${LAYOUT_FILENAME} + +echo -e "${YELLOW}WARNING${NC}: Make sure not to power off your computer or interrupt this process in any way!" +echo -e " Interrupting this process may result in irreparable damage to your computer!" +check_battery +while true; do + read -r -p "Flash the BIOS now? y/N: " yn + case $yn in + [Yy]* ) cd ${OUTPUT_PATH} && ${FLASHROM} --force --noverify-all -p internal --layout ${LAYOUT_FILENAME} --image bios -w "${OUTPUT_IMAGE_NAME}"; break;; + [Nn]* ) exit;; + * ) exit;; + esac +done + +rm -rf ${OUTPUT_PATH} + +while true; do + read -r -p "Power off now? (please do!) Y/n: " yn + case $yn in + [Yy]* ) systemctl poweroff ;; + [Nn]* ) exit;; + * ) systemctl poweroff ;; + esac +done diff --git a/x230t/x230t_coreboot_seabios_free_4bd6927388_top.rom b/x230t/x230t_coreboot_seabios_free_4bd6927388_top.rom new file mode 100644 index 0000000..302c2fe --- /dev/null +++ b/x230t/x230t_coreboot_seabios_free_4bd6927388_top.rom @@ -0,0 +1,2853 @@ +__FMAP__@FLASH@BIOSRW_MRC_CACHEFMAP>COREBOOTLARCHIVE 8cbfs master headerORBC1112@LARCHIVE4dfallback/romstage4410)}0fUWVSl$0t$4|$8T$t@WWVj+D$< jjPy7|$(VVh}j i:D$ D$ zxĉt$V6t h$( D$ P;t h$HD$u h$݋RjjP6Y[Vj +* j?V 34$D$<6@[^_S\$jS t h SH$^\$ [o1VSrXp9w[^UWVS|8"MUƊ@׈À1ۀ@>€3F)€ \$.^d$.$u^L$C|$(t$$L$+T$$;T$(L$HL$\$+T$$9T$(u \$+\$T$|$$ҍ<|$ y.+t$Q9GVt$t$9bt$9|$l$ L$|$0|$PL$;L$|$;|$  щ|$ L$/9LKx1E9ZD$#t$ |NL$ 499L$Q9*ډ^)9t$PT$u-T$j9-CSсtlLPL$VWVWVt0WPjVGPr+t$$9l$ D$ D$D$ 9;|$sL$DD$)|$9wrڀ|$/L$Q9sjCKȁu9wrQE9|$ r?9t$u9RPSU+|$.VWD뇉{Ӌ|$)Ox$|$D$%D$|$.1ۃ|[^_]ST$ D$L$\$v +\$[l[1ËUWVS1ۃ,l$Dt$@|$HtRREPV,U\?;^ svjSl$UVugPjh-U1t@ˍD$D$D$~D$PSVWu#t$\$ SVWu +,[^_]S\$jj St$-u 1҉[UWVS0l$L\$D|$PUh6j1VSPt$PQC PjSStsVVUPD$7XZT$RSut(QQD$$PSDu6D$t9t냉{RRSt$PWPhKjr PUhnj\,[^_]ËD$@D$1S \$ SD$@D$ Pt$ 3[W1VS|$\$9r 1SsO94[^_Ë +RPZYVS\$ t$ D˅Dƃ9uFPCPZYtV+S[^SD$$T$\$ D$D$(D$ C1t!DӋB1tPt$t$Rу[ËT$D‹PRtD$SD$(T$\$ D$D$,D$ CƒtDËPt$ t$ t$,PR[VSD$$T$t$ \$D$D$(D$ Ft CD1҉D$CD$ C [^S \$jjS-D$$CD$(C[D$D$à D$RPt$j&=0t |$~1à 0PPjhLhihlhj,D$D$w +t h<  D$D$Bh8p 8+<4WVS\$t$z +u1U t$0~~OujVSh_djVSh1R& +tq[^_à D$RPt$t$wà 4~-RPhjUW%VS$@D‰D$$D$t$D$ $D$d$D$01$tGy޻-$.$t$+$t $ $ D$t%$u +$$u$ uD$>0D$iD$$D$T$ D$( Pt$t$WV D$L$L$(D$ D$;$T$$ L=D$ r +t$ |$$믋D$;$$L$1D$)$u&~ROR$j ՃIN)tPGP$SՃ|$t^$uPGP$j0A$u:PP$j0Ճ$@t PP$jX PP$jxՃ|$u4\$~D$PP$SՋD$ HIN)։D$)9D$}QCQ$j0Ճߋ|$OtRR$D$CNFvVuCf fCTPjzPCVgPy jVSm,[^_]UWVS|$,t$(WV8 u Jtw|$(u($t1&$t1ǀdÈ^Rfkf^P$f^P$if^PAljFAQ%fFAljFAljF AljF$AljF(AljF,A Q +%ljF0A Q %ljF4AQljF8AljF<AljF@AQ%ljFDAljFHAf~L [^_]UWVS(D$<|$Hl$DD$D$@D$hMEMIuCPjhhMEMI + Phj2VhjSvQh(hjG1Ʌk7 BD$fBfjB +GB D$ T$ B GVRjPD L$PT$GTfB2GL$H w9$4k7D40k7D4&k7D4k7D4k7D4k7D4k7gD35PjWD P;1[^_]W1VS\$PCPh\jC PhvjC Phj shjsXZhjtPGPhjGuQQhzjS SS S$&S(=S,TS0kS4S8SjD$PUt$T$ yVVhjC$@u׉몍C$jVUt$mxDU=uJuS$S$uCfC fC"RjRt$t$Vkt C$1kjjC PVyPPhjZYh0K C"9r PQh*K 9vQPh`jC$<[^_]à T$z$~J B")PQRt$  Ãhhjo@ST$L$ t/f:u(zu"QBYZR Q)1Y [ËT$tJQ ;Q$t+Q1ËT$t RB+BUWVS\$4L$0 SRSrs PQhj S9tUs RPCkp+p +xWVhjDD$C;l$ 3Ht&)΃ u QPVhj M >̋P(W@,))PjVC jp3,1[^_]S\$Cthh$h6jT$B؋D$%D$C[UWVSL\$`Cuxtjjp D$,PVeu؍D$ PD$ Pt$DhT 1҉ŋD$ RP3t t$HUCphdj/t$,t$HUt$LjV[ dRRt$VULPPVD$P0D$pCt$ hhP4$C4$SBJ L[^_]ShRSTGu>PjjhRSTG1tPjjSSShjDD$1[ÃhRSTG1҅tЃ ËT$1<t ;D$s@S1ҋD$\$ )uBu[S1\$ 0 wQk +D[à  Su2- wj3hh6jo [UWVSSjh hEMITu QQhj@f@@ KuRRhjy~1VS;n s^SC T$9sIWO$PL$k S T$ $؉HL$PHL$ 9L$uPPh jhE F [^_]UWVSD$4T$8\$0D$T$ wtmu +D$4*FH p9sO8QP k h<$|$l$ȋl$ +<$Xl$9։xhuD$4 D$0[^_][^_]à QRPt$SVSt$\$VjPS VjQS[^ShÃttRPhjD[à  4 4PPP=@u0% @0%? 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PFPh.j:D$$zD$  [^_]`:VRomstage stack size limited to 0x%x! +Smashed stack detected in romstage! +CPU not supported +FSB not found +fdMSdt +Mddsrc/cpu/x86/smm/tseg_region.cASSERTION ERROR: file '%s', line %d +ERROR: No cache SMM subregion. +SMM Memory Map +SMRAM : 0x%lx 0x%zx + Subregion %d: 0x%lx 0x%zx +Unknown device type: %d +""!!!!!!!!!!!!!%s%3u.%.3u ns +CBMEM entry for DIMM info: %p +BUG: Too many DIMM infos for %s. +)))))))))) Row addr bits : %u + Column addr bits : %u + Number of ranks : %u + DIMM Capacity : %u MB + CAS latencies : %u tCKmin : tAAmin : tWRmin : tRCDmin : tRRDmin : tRPmin : tRASmin : tRCmin : tRFCmin : tWTRmin : tRTPmin : tFAWmin : tCWLmin : tCMDmin : %3u +spd_add_smbios17fMRC: failed to add to cbmem for type %d. +MRC: failed to add '%s' to cbmem. +MRC: failed to locate region type %d. +MRC: region file invalid in '%s' +MRC: no data in '%s' +MRC: couldn't read metadata +MRC: invalid header signature +MRC: header checksum mismatch: %x vs %x +MRC: size exceeds rdev size: %zx vs %zx +MRC: invalid header in '%s' +MRC: mmap failure on data verification. +MRC: data checksum mismatch: %x vs %x +MRC: invalid data in '%s' +MRC: version mismatch: %x vs %x +xdRW_VAR_MRC_CACHERW_MRC_CACHERECOVERY_MRC_CACHEf0ECRMADCRMNDCRMcmos_layout.binCOREBOOTRTC: cmos_layout.bin could not be found. Options are disabled +RTC: cmos_layout.bin could not be mapped. Options are disabled +No CMOS option '%s'. +Timeout while sending command 0x%02x to EC! +Timeout while sending data 0x%02x to EC! +f CBFS: %s region not found while looking for %s + +*** Pre-CBMEM romstage console overflowed, log truncated! *** +Unable to recover external stage cache. +External stage cache: +Could not limit stage cache size. +Error: Can't add %x metadata to imd +Error: Can't add stage_cache %x to imd +Error: Can't find %x metadata in imd +Error: Can't find stage_cache %x in imd +FMAP: Found "%s" version %d.%d at %#x. +FMAP: base = %#llx size = %#x #areas = %d +__FMAP__ERROR: FMAP cache corrupted?! +No FMAP found at %zx offset. +ERROR: Failed to allocate CBMEM +ERROR: Failed to read FMAP into CBMEM +FMAP: area %s found @ %x (%d bytes) +src/lib/imd.cIMD: root @ %p %u entries. +CBMEM: +failed. +fRAM INIT FAILURE! +REGF fail reading first metadata block. +REGF fail locating latest metadata block. +REGF failed to read data boundaries. +REGF fail locating data boundaries. +REGF data boundaries wrong. [%zd,%zd) Need to empty. +REGF data exceeds region %zd > %zd +board_resetLoading module at %p with entry %p. filesize: 0x%x memsize: 0x%x +Processing %zu relocs. Offset value of 0x%08lx +Adjusting %p: 0x%08lx -> 0x%08lx +src/lib/rmodule.cERROR: BUG ENCOUNTERED at file '%s', line %d +Decompressing stage %s @ %p (%d bytes) +Romstage handoff structure not added! +src/lib/timestamp.cERROR: No timestamp table allocated +ERROR: No timestamp cache found +ERROR: Timestamp table full +ERROR: No timestamp table found +Tue Mar 24 00:40:10 UTC 2020f4.11-1765-g4bd6927388-dirtyfffffffffffffffffffffffffCGB ~fjb9WARN: Unknown platform id 0x%x +DMI: Running at X%x @ %dMT/s +Setting up static northbridge registers... done +Graphics not supported by this CPU/chipset. +Initializing Graphics... +gfx_uma_sizeSPD probe channel%d, slot%d +channel[%d] rankmap = 0x%x +No DIMMs were foundStarting native Platform init +CPUID %x differs from stored CPUID %x, CPU was replaced! +Stored timings CRC16 mismatch. +Trying stored timings. +Stored timings are invalid ! +RAM training failed, trying fallback. +raminit failedRAMINIT: Failed to add SMBIOS17 +OTHP Workaround [%x] = %x +OTHP [%x] = %x +Unsupported DIMM combination. DIMMS do not support common CAS latencyNo valid DIMMs foundfhhhhhh>iUpdate PCI-E configuration space: +PCI(0, 0, 0)[%x] = %x +timB discovery failed: %d, %d, %d +timC discovery failed: %d, %d, %d +timC recovery failed +edge discovery failed: %d, %d, %d +edge write discovery failed: %d, %d, %d +402x discovery failed (1): %d, %d +402x discovery failed (2): %d, %d +c320c discovery failed +timC write discovery failed: %d, %d, %d +Mini channel test failed (1): %d +Mini channel test failed (2): %d, %d, %d +t123: %d, %d, %d +ffffffffffnoyesStarting Ivybridge RAM training (%d). +DRAM frequency is under lowest supported frequency (400 MHz). Increasing to 400 MHz as last resort100MHz reference clock support: %s +Couldn't find compatible clock / CAS settings +Trying CAS %u, tCK %u. +Found compatible clock, CAS pair. +Selected DRAM frequency: %u MHz +Selected CAS latency : %uT +PLL busy... done in %d us +MCU frequency is set at : %d MHz +PLL didn't lock. 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Exiting. +lowmemAttempting to allocate %u bytes %s via pmm call to %04x:%04x +VGA stack allocated at %x +Hooking hardware timer irq (old=%x new=%x) +SeaBIOS VBE(C) 2011SeaBIOS DevelopersSeaBIOS VBE AdapterRev. 1VBE mode info request: %x +VBE mode %x not found +VBE mode set: %x +VBE current mode=%x +Set active page %02x address %04x +Get font info BH(%02x) was discarded +Select vert res (%02x) was discarded +Alternate Display code (%02x) was discarded +fvbe_104fXXvbe_104f0ahandle_10XXhandle_101aXXfhandle_1012XXfhandle_101236fhandle_101235fhandle_1011XXfhandle_1010XXfhandle_100bXXfhandle_1004vga_postfffffffffffffL X X @@@ X X X@@@@@@ A B C X D E F@G@ H`I`J`K`L` uvw x y z  {|} ~ xxx    +@ +@ +@  888 @@@  + + + ~~~~l|88||8<<<<~~<<<><~~<fffffffff{|`8ll8 |<~~<~<~~< 0``0$ff$88||||88<<<fff$lllllll||| 0`Ɔ8ll8vv000` 000000 0 0f<l8l||||`0||0xv`0v~ x|||~~8ld`````f<ff|bfofff~p0`x |v 08<0`||0`vvffffffv~8ll8|0000`|0`Λ 0fΖ><<<6ll6l6lDDDDDDDDUUUUUUUUwwwwwwww66666666666666666666666666666666666666666666666666666666666666666666666666666667666666666666670??07666666666666666666666666667076666666666666666666666666666666666666666666??66666666666666666666666vvxlllllll`00`~pfffff|``v~ffff<~~~~`0``|```0|~0  0~ 0`0 ~p~vv8ll8 ll<lllllp0`|||||||~~~~l|88||8<<<<~~<<<><~~<ffffffff{|`8ll8 |<~~<~<~~< 0``0(ll(88||||88<<<fff$lllllll||| 0f8ll8vv000` 00000 0 0f<l8l||||`0||0xv`0v~ x8ll8|~8ll8|0000`|0`܆ >0fΞ><<<6ll6l6lDDDDDDDUUUUUUUwwwwwww66666666666666666666666666666666666666666666666666666666666666666666676666666666670??0766666666666666666666667076666666666666666666666666666666666666??6666666666666666666vv|@llllll`00`~pffff|``v~fff<~~~~`0``|``0|~0  0~ 0`0 ~p~vv8ll8 l<lllllp0`||||||~~~~l|88||88|8|8|8||8|<<><~~<ffffff{>c8ll8x~~~<~~<<~~< 0``0$ff$<~~<0xx000llllllll0|x 00f8l8vv``0```0`00`f<x00000x xflxlf```bf8ll8ff|``xxff|lfxpx0000xx0l88lx00xƌ2fx`````x`0 xx8l00x |v``|ffxx |vxx8l```v| `lvff0p000x x`flxlp00000xxxff|`v| vf`|x 0|004vx0ll8l| 0d00000000v8lxx x~xx~<>f?x |~x |~00x |~xx 8~lxxxxxxxx~~| ~8ll8|00`x 3f7o3ff3f3f""""UUUUww66666666666666666666666666666666666676666670??0766666666667076666666666666666666??6666666666vvxlllll`0`~pffff|`v0xx08ll88lll0|x~~ ~~`8``8x0000`00`0`0p0000vv8ll8 l<xllllp0`x<<<< PCIRffffffgcc: (coreboot toolchain vd70f5fae1c 2019-05-26) 8.3.0 binutils: (GNU Binutils) 2.32rel-1.13.0-0-gf21b5a4LARCHIVEP(8configBCZL# This image was built using coreboot 4.11-1765-g4bd6927388-dirty +CONFIG_USE_OPTION_TABLE=y +CONFIG_USE_BLOBS=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_VENDOR_LENOVO=y +CONFIG_NO_POST=y +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_VGA_BIOS=y +CONFIG_CBFS_SIZE=0x400000 +CONFIG_BOARD_LENOVO_X230T=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +# CONFIG_H8_BEEP_ON_DEATH is not set +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +CONFIG_COREINFO_SECONDARY_PAYLOAD=y +CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y +LARCHIVEP(8revisionBCZL/* build system definitions (autogenerated) */ +#ifndef __BUILD_H +#define __BUILD_H + +#define COREBOOT_VERSION "4.11-1765-g4bd6927388-dirty" +/* timesource: git */ +#define COREBOOT_VERSION_TIMESTAMP 1585010410 +#define COREBOOT_ORIGIN_GIT_REVISION "4bd6927388" +#define COREBOOT_EXTRA_VERSION "" +#define COREBOOT_MAJOR_VERSION 4 +#define COREBOOT_MINOR_VERSION 11 +#define COREBOOT_BUILD "Tue Mar 24 00:40:10 UTC 2020" +#define COREBOOT_BUILD_YEAR_BCD 0x20 +#define COREBOOT_BUILD_MONTH_BCD 0x03 +#define COREBOOT_BUILD_DAY_BCD 0x24 +#define COREBOOT_BUILD_WEEKDAY_BCD 0x2 +#define COREBOOT_DMI_DATE "03/24/2020" + +#define COREBOOT_COMPILE_TIME "00:40:10" +#define ASL_VERSION 0x20190703 +#endif +LARCHIVE9@(8bootsplash.jpgBCZL9JFIF,,Created with GIMPC + + +    C   "  +I ! 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Options are disabled +RTC: cmos_layout.bin could not be mapped. Options are disabled +No CMOS option '%s'. +CBFS: %s region not found while looking for %s + +*** Pre-CBMEM postcar console overflowed, log truncated! *** +Unable to recover external stage cache. +External stage cache: +Could not limit stage cache size. +Error: Can't add %x metadata to imd +Error: Can't add stage_cache %x to imd +Error: Can't find %x metadata in imd +Error: Can't find stage_cache %x in imd +WARNING: Post-RAM FMAP access too early for cache! +__FMAP__No FMAP found at %zx offset. +FMAP: Found "%s" version %d.%d at %#x. +FMAP: base = %#llx size = %#x #areas = %d +FMAP: area %s found @ %x (%d bytes) +src/lib/imd.cIMD: root @ %p %u entries. +lzma: Input too small. +lzma: Incorrect stream properties. +lzma: Decoder scratchpad too small! +lzma: Decoding error = %d +fallback/ramstageJumping to image. +ramstage cache invalid. +Ramstage was not loaded! +f?board_resetLoading module at %p with entry %p. filesize: 0x%x memsize: 0x%x +Processing %zu relocs. Offset value of 0x%08lx +Adjusting %p: 0x%08lx -> 0x%08lx +src/lib/rmodule.cERROR: BUG ENCOUNTERED at file '%s', line %d +Decompressing stage %s @ %p (%d bytes) +ERROR: No timestamp table allocated +ERROR: No timestamp table found +ERROR: Timestamp table full +Tue Mar 24 00:40:10 UTC 2020f4.11-1765-g4bd6927388-dirtyff +"vPo* + +     *6AFKPU5Fr8x0Efnv!&  *[agq%*/BY`R(2}EO~, 8 K f r      !N!a!r!!!!!""%"G"""""""#.#L#i#y###2$%%%%O&7)H)`)))))**,*C*d****+ 9F9_99H:M::9;q;;;<===>3>?>>>>>>>h????HELARCHIVE:P8Hfallback/dsdt.amlBCZL:DSDT:\COREv4COREBOOT% INTL E\NVSA\._TZ_SKIN\._SB_CNOT\/_SB_CP00_PSS\/_SB_PCI0GFX0LCD0\PPKG\HBDC\HWAN\HKBL\HUWB[APMP + +[APMPAPMCAPMS[POST +[ POSTDBG0TRAP phSMIFpTRP0SMIF _PICphPICMGGOS_p OSYSG[_OSI_OSI Windows 2001p OSYS_OSI Windows 2001 SP1p OSYS_OSI Windows 2001.1p OSYS!_OSI Windows 2001.1 SP1p OSYS_OSI Windows 2001 SP2p OSYS_OSI Windows 2006p OSYS_OSI Windows 2006 SP1p OSYS_OSI Windows 2006.1p OSYS_OSI Windows 2009p OSYS_OSI Windows 2012p OSYSO_PTS\/_SB_PCI0LPCBEC__MUTE\/_SB_PCI0LPCBEC__USBP\/_SB_PCI0LPCBEC__RADIA_WAKp\._TZ_MEB1p\._TZ_MEB2\/_SB_PCI0LPCBEC__HKEYWAKEhPICMDSEN[GNVSNVSA [A-GNVSOSYSSMIFPRM0PRM1SCIFPRM2PRM3LCKFPRM4PRM5P80D LIDSPWRSTLVLFLVLTCRTTPSVTMAXF0OFF0ONF0PWF1OFF1ONF1PWF2OFF2ONF2PWF3OFF3ONF3PWF4OFF4ONF4PWTMPSAPICMPENPCP0PCP1PPCMPCNT NATPS5U0S5U1S3U0S3U1S33GCMEM IGDSTLSTCADLPADLCSTENSTESSTENDIDDID1 DID2 DID3 DID4 DID5 HBLCSBRTLODDS8ALSEALAFLLOWLHIH0EMAEEMAPEMAL(MEFEHTPMPTPME@GTF08GTF18GTF28IDEMIDET(XHCIASLB IBTTIPATITVFITVMIPSCIBLCIBIAISSCI409I509I609I709IDMMIDMSIF1EHVCONXD1 NXD2 NXD3 NXD4 NXD5 NXD6 NXD7 NXD8 ISCIPAVPOSCCNPCEPLFLBREVDPBMDPCMDPDMALFPIMONMMIOTPIQ@VBT0 VBT1 VBT2 VBT3VBT4@VBT5@ VBT6@ VBT7 VBT8 VBT9 CHVDVBTA MEHH@RMOB RMOL ROVP ROVL RWVP RWVL S3UEpS3U0pS3U1S3UDpS3U0pS3U1S5UEpS5U0pS5U1S5UDpS5U0pS5U1 S3GEpS33G S3GDpS33G XHCEpXHCI XHCDpXHCI"TZUP[\._TZ_SKIN\._TZ_SKIN +F0UTphF0OFpiF0ONTZUPF1UTphF1OFpiF1ONTZUPF2UTphF2OFpiF2ONTZUPF3UTphF3OFpiF3ONTZUPF4UTphF4OFpiF4ONTZUPTMPUphTMPSTZUPPNOT\._SB_CNOT +PPCN\._SB_CNOT +TNOT\._SB_CNOT +6_SB_[5PCI0_HID A +_CID A +_BBN[F-MCHC_ADR[MCHP [F MCHP@ EPEN EPBRMHENMHBR9DVEN @PXENPXSZPXBR DMEN DMBRMEBA@@PM0HPM1LPM1HPM2LPM2HPM3LPM3HPM4LPM4HPM5LPM5HPM6LPM6HH TOM_@@ +TLUD [CTCMCTCCCTCNCTCDCTCU +[MCHByMHBR + [@MCHB,CTDNA7PL1VPL1EPL1CPL1TPL2VPL2EPL2CPL2TTARNCTDDTARD(CTDUTARU(CTCSTARSEPSSSp`p^^^.CP00_PSSa)`az^^^.CP00_PSS` + +b bht`u`DSTND [#CTCMdCTCDCTCC['CTCMp Set TDP Down[1pCTCDCTCSpTARDTARSpPSSSTARDPPCMPPCNxwCTDD +} +dPL2VpCTDDPL1VpCTCDCTCC['CTCMGSTDN [#CTCMdCTCNCTCC['CTCMp Set TDP Nominal[1pCTDNPL1VxwCTDN +} +dPL2VpPSSSTARNPPCMPPCNpTARNTARSpCTCNCTCSpCTCNCTCC['CTCMMCRSC     G     +   ? @ @  @  @  @  ? @ @  @  @  @ ?@ @@ @ @   OPyI_CRSMCRS PMINMCRS PMAXMCRS PLENp^.MCHCTLUD`p^.MCHCMEBAa`ap^.MCHCTOM_`p`PMINp PMAXrtPMAXPMINPLENMCRS[HPEGP_ADR _STAw{z^^.MCHCDVEN + +[ DEV0_ADR _PRTIRQM[IPEG1_ADR _STAw{z^^.MCHCDVEN + +[ DEV0_ADR _PRTIRQM +[HPEG2_ADR _STAw{z^^.MCHCDVEN +[ DEV0_ADR _PRTIRQM +[IPEG6_ADR _STAw{z^^.MCHCDVEN +  +[ DEV0_ADR _PRTIRQM +[KPDRC_HID A _UIDPDRSN +z @      P P  @ y@ +_CRSPDRS +MBR0y^^.MCHCMHBR +MBR0PDRS +DBR0y^^.MCHCDMBR + DBR0PDRS +(EBR0y^^.MCHCEPBR + EBR0PDRS +4XBR0y^^.MCHCPXBR +XBR0PDRS +8XSZ0z ^^.MCHCPXSZXSZ0PDRS[O3GFX0_ADR [GFXC [GFXC@BAR0@@fASLE @ +ASLS [GFRG{BAR0 @[GFRG*ABCLVBCLM[@BOX3_ADR[OPRGASLS [7OPRG@,MBOX RARDYASLC TCHE ALSI BCLP PFIT CBLV LXBCM ASLS {MBOX +pxwh + +da a +p +ap}a BCLP ARDYp +ASLCpASLEp + `,`[""{ASLC +{zASLC + +aav`[C +LEGA_ADRDRCLxrhxi +iXBCMpDRCLwhBCLM +dBCLVHXBQC BCLMpDRCLwBCLV +dBCLM`p +a>atBRIGpBRIGabpBRIGrac`c`bt`btc`bcuac XBCM^.BOX3XBCMh^.LEGAXBCMhXBQC^.LEGAXBQCBRCT#BRIDpBRIGh +` `tBRIG`XBCLpBRCTBRIG_DOSp{h +DSEN4DECB BRCTLCD0 + pBRIDXBQC`` +v`XBCMBRIG`:INCB BRCTLCD0 +&pBRIDXBQC``tBRIGu`XBCMBRIG`XDCSTRAP{CSTEyh + +XDGS {NSTEyhXDSS{h pNSTECSTEK;\[IO_T  +[IO_T@TRP0[PMIO  +[J PMIO@GS00GS01GS02GS03GS04GS05GS06GS07GS08GS09GS10GS11GS12GS13GS14GS15 GE00GE01GE02GE03GE04GE05GE06GE07GE08GE09GE10GE11GE12GE13GE14GE15@ GPEC[GPIO  +l[M!GPIOGU00GU01GU02GU03GIO0GIO1GIO2GIO3 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H#Apju3r21.П=nBSvMjD\+k3^#!=>h֏Ad{{-JhdrEFab@?5)e9qU"؋dдR!O(j)^ȧXOC9*禗Pv Vm;B7;W>n4T*@0_lU3'/L٬9q7шKsl}z>#zi +Z:O F$Sц0>dL5VNnK16=5WG6K#:tN) a oOmV5\ +gD|}-|)sg:>?'5e⸋ + W_D}fO3  `Ȟ/_JŖ]R  @ OR#X5/mh:E.S"/T0;ѫpj/Z!X D1R=eQ_\RNZ)cb 4]YN,Jm.'@ +60bWv%Ĺtsߚ=w%hpMدwz-—>5=#/-w%;ўNA``0l6wTq䌄'O A2*jdYڡn?Z9„7##>ݡ0m8s/C 3*&Hh+(e}Jkiq"g_S?;a-P!et^mɷh`{ث;Bc!*ydKcI,w(֞dz[ ,(TI{G7Ψ@0( ZwS~|n 4(tW +ͼÔ@!zg) +MD:jTa@ɮ {칥U=Hǰ1~[D:[*@,5ˠH큔Ë}ZZ;Sf8ʹeˣ%bL"Bz#$Vw:vv荊[I6+0;Slx{ ;dm;ucXֵH-r"rD1D#r+pM.{"ɾN6 t oTCH.#zXRk# )8E_|I~{B'D2TSr(?ґQw>wbG7#_&Rn%^/LOB}{i:sj(8`.kcaK\VERV<jքl5@Z߇jQ[3v+on\"30bDB5a EZ*9'~Js +OםWgP tƙl>%q}+y;>P+e&A\(332E[cIzw⸽SmPޫp=a#YvIw|v``׍nPaW@t֑7`LAl3y#2@ՙtvf%Hpخ  b. zcʊh}L΁Qc|&2<Ĺo<ӿ9Fx5\@ExN-m=?N[8^#|fAPT= 8Kbm]_%fH 1iz&c~r(nЎ mLH%'ڦaEƲha +XړWA|{ss"$f+Xx4*>QGF;~E +׺Nn&W3RpGA +[h 3Ċ'4CN9`pSgݠ]kzcN Ѓ,:^[t~K^!&{#ܾq]{26zlҮFwL`<]f#$1\.Z~z$+ WqzkZ: v&QKuR\rPwUlq+36(ւY<{1TgWl}_a47d{U{!lOx UQ`v -_*5E0gW+Keb~YD?Q {{ MЮ5$ b_C<͞'HZ5 G V쵼.9T222Ưw}&а(n.D[384g\[wM} [OлyT>' @F׊Q'dKe<\AegJ?Df^{%5ju#Y} ;n{hIpOM& ,5O'F27=jyF{]Ӱ,ޕ0W="2\"LARCHIVEP(8payload_configBCZL# +# Automatically generated file; DO NOT EDIT. +# SeaBIOS Configuration +# + +# +# General Features +# +CONFIG_COREBOOT=y +# CONFIG_QEMU is not set +# CONFIG_CSM is not set +# CONFIG_QEMU_HARDWARE is not set +CONFIG_THREADS=y +CONFIG_RELOCATE_INIT=y +CONFIG_BOOTMENU=y +CONFIG_BOOTSPLASH=y +CONFIG_BOOTORDER=y +CONFIG_HOST_BIOS_GEOMETRY=y +CONFIG_COREBOOT_FLASH=y +CONFIG_LZMA=y +CONFIG_CBFS_LOCATION=0 +CONFIG_MULTIBOOT=y +CONFIG_ENTRY_EXTRASTACK=y +CONFIG_MALLOC_UPPERMEMORY=y +CONFIG_ROM_SIZE=0 + +# +# Hardware support +# +CONFIG_ATA=y +# CONFIG_ATA_DMA is not set +# CONFIG_ATA_PIO32 is not set +CONFIG_AHCI=y +CONFIG_SDCARD=y +CONFIG_MEGASAS=y +CONFIG_FLOPPY=y +CONFIG_FLASH_FLOPPY=y +CONFIG_NVME=y +CONFIG_PS2PORT=y +CONFIG_USB=y +CONFIG_USB_UHCI=y +CONFIG_USB_OHCI=y +CONFIG_USB_EHCI=y +CONFIG_USB_XHCI=y +CONFIG_USB_MSC=y +CONFIG_USB_UAS=y +CONFIG_USB_HUB=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_MOUSE=y +CONFIG_SERIAL=y +CONFIG_SERCON=y +CONFIG_LPT=y +CONFIG_RTC_TIMER=y +CONFIG_HARDWARE_IRQ=y +CONFIG_PMTIMER=y +CONFIG_TSC_TIMER=y + +# +# BIOS interfaces +# +CONFIG_DRIVES=y +CONFIG_CDROM_BOOT=y +CONFIG_CDROM_EMU=y +CONFIG_PCIBIOS=y +CONFIG_APMBIOS=y +CONFIG_PNPBIOS=y +CONFIG_OPTIONROMS=y +CONFIG_PMM=y +CONFIG_BOOT=y +CONFIG_KEYBOARD=y +CONFIG_KBD_CALL_INT15_4F=y +CONFIG_MOUSE=y +CONFIG_S3_RESUME=y +CONFIG_VGAHOOKS=y +# CONFIG_DISABLE_A20 is not set +CONFIG_TCGBIOS=y + +# +# VGA ROM +# +# CONFIG_NO_VGABIOS is not set +# CONFIG_VGA_GEODEGX2 is not set +# CONFIG_VGA_GEODELX is not set +CONFIG_VGA_COREBOOT=y +CONFIG_BUILD_VGABIOS=y +CONFIG_VGA_EMULATE_TEXT=y +CONFIG_VGA_FIXUP_ASM=y +CONFIG_VGA_ALLOCATE_EXTRA_STACK=y +CONFIG_VGA_EXTRA_STACK_SIZE=512 +CONFIG_VGA_VBE=y + +# +# Debugging +# +CONFIG_DEBUG_LEVEL=1 +# CONFIG_DEBUG_SERIAL is not set +# CONFIG_DEBUG_SERIAL_MMIO is not set +CONFIG_DEBUG_COREBOOT=y +LARCHIVEP8Hpayload_revisionBCZL +/* DO NOT EDIT! This is an autogenerated file. See scripts/buildversion.py. */ +#define BUILD_VERSION "rel-1.13.0-0-gf21b5a4" +#define BUILD_TOOLS "gcc: (coreboot toolchain vd70f5fae1c 2019-05-26) 8.3.0 binutils: (GNU Binutils) 2.32" +LARCHIVEP8etc/ps2-keyboard-spinupLARCHIVE5mX(LARCHIVE(@bootblockBCZLff1"،H).@).f f%f `"ffXfXf.Pf؎ЎÉn1nn f "Hɻ)ˋH˸<0t;9=HuV{9=LuK߃u)߃)Kً{?9vˋ I у9v@LARCHIVEZ3E  r11011҃0u2%ǹ110Ou 10010201Ҹ0202 0 %"4 @"2%0 %"20120 @"2 0 %"~P~P~P +PXYhijklmno5vԃt}XÉދx211ҹ0ù2>t5;^ unt;V}&01ҹy0F u9wcpu_microcode_blob.bin2% uf fUWVSl$0t$4|$8T$0D$iD$$D$T$ D$( Pt$t$WV D$L$L$(D$ D$;$T$$ L=D$ r +t$ |$$믋D$;$$L$1D$)$u&~ROR$j ՃIN)tPGP$SՃ|$t^$uPGP$j0A$u:PP$j0Ճ$@t PP$jX PP$jxՃ|$u4\$~D$PP$SՋD$ HIN)։D$)9D$}QCQ$j0Ճߋ|$OtRR$D;j7 x[xÃ=tWVSuzPjjhitZhhhP=u;Pjhi;hu"PhhhdttPjhhW2tJPj8hSt3Pjhi;V%t#Rhhr;j%Y_VS$PPVShhSW [^_UWV8St,qRRt$8@Pt$P*PUSgQj*VSu뿃 uut$Dh;jyET$TEBUS[^_]S \$St$,UƒuPPt$,S[S1ҋL$19T$tu\$ B)[1WVS,\$BIST failed: %08xCPU not supported +FSB not found +dMSdt +MddUnknown device type: %d +fcmos.defaultsrc/lib/cbfs.cASSERTION ERROR: file '%s', line %d +COREBOOTFMAP: Found "%s" version %d.%d at %#x. +FMAP: base = %#llx size = %#x #areas = %d +__FMAP__No FMAP found at %zx offset. +FMAP: area %s found @ %x (%d bytes) +fallback/romstageCouldn't load romstage. +L9src/lib/timestamp.cERROR: BUG ENCOUNTERED at file '%s', line %d +ERROR: No timestamp table found +ERROR: Timestamp table full +ERROR: No timestamp cache to init +Tue Mar 24 00:40:10 UTC 2020f4.11-1765-g4bd6927388-dirtyffffff8=4=0=,=(=$= ====fCGB ~fjb9src/southbridge/intel/common/pmbase.cfff4.11-1765-g4bd6927388-dirtyLENOVOThinkPad X230t ffff8 \ No newline at end of file diff --git a/x230t/x230t_coreboot_seabios_nonfree_4bd6927388_top.rom b/x230t/x230t_coreboot_seabios_nonfree_4bd6927388_top.rom new file mode 100644 index 0000000..69939cd --- /dev/null +++ b/x230t/x230t_coreboot_seabios_nonfree_4bd6927388_top.rom @@ -0,0 +1,2734 @@ +__FMAP__@FLASH@BIOSRW_MRC_CACHEFMAP>COREBOOTLARCHIVE 8cbfs master headerORBC1112@LARCHIVE4dfallback/romstage4410)}0fUWVSl$0t$4|$8T$t@WWVj+D$< jjPy7|$(VVh}j i:D$ D$ zxĉt$V6t h$( D$ P;t h$HD$u h$݋RjjP6Y[Vj +* j?V 34$D$<6@[^_S\$jS t h SH$^\$ [o1VSrXp9w[^UWVS|8"MUƊ@׈À1ۀ@>€3F)€ \$.^d$.$u^L$C|$(t$$L$+T$$;T$(L$HL$\$+T$$9T$(u \$+\$T$|$$ҍ<|$ y.+t$Q9GVt$t$9bt$9|$l$ L$|$0|$PL$;L$|$;|$  щ|$ L$/9LKx1E9ZD$#t$ |NL$ 499L$Q9*ډ^)9t$PT$u-T$j9-CSсtlLPL$VWVWVt0WPjVGPr+t$$9l$ D$ D$D$ 9;|$sL$DD$)|$9wrڀ|$/L$Q9sjCKȁu9wrQE9|$ r?9t$u9RPSU+|$.VWD뇉{Ӌ|$)Ox$|$D$%D$|$.1ۃ|[^_]ST$ D$L$\$v +\$[l[1ËUWVS1ۃ,l$Dt$@|$HtRREPV,U\?;^ svjSl$UVugPjh-U1t@ˍD$D$D$~D$PSVWu#t$\$ SVWu +,[^_]S\$jj St$-u 1҉[UWVS0l$L\$D|$PUh6j1VSPt$PQC PjSStsVVUPD$7XZT$RSut(QQD$$PSDu6D$t9t냉{RRSt$PWPhKjr PUhnj\,[^_]ËD$@D$1S \$ SD$@D$ Pt$ 3[W1VS|$\$9r 1SsO94[^_Ë +RPZYVS\$ t$ D˅Dƃ9uFPCPZYtV+S[^SD$$T$\$ D$D$(D$ C1t!DӋB1tPt$t$Rу[ËT$D‹PRtD$SD$(T$\$ D$D$,D$ CƒtDËPt$ t$ t$,PR[VSD$$T$t$ \$D$D$(D$ Ft CD1҉D$CD$ C [^S \$jjS-D$$CD$(C[D$D$à D$RPt$j&=0t |$~1à 0PPjhLhihlhj,D$D$w +t h<  D$D$Bh8p 8+<4WVS\$t$z +u1U t$0~~OujVSh_djVSh1R& +tq[^_à D$RPt$t$wà 4~-RPhjUW%VS$@D‰D$$D$t$D$ $D$d$D$01$tGy޻-$.$t$+$t $ $ D$t%$u +$$u$ uD$>0D$iD$$D$T$ D$( Pt$t$WV D$L$L$(D$ D$;$T$$ L=D$ r +t$ |$$믋D$;$$L$1D$)$u&~ROR$j ՃIN)tPGP$SՃ|$t^$uPGP$j0A$u:PP$j0Ճ$@t PP$jX PP$jxՃ|$u4\$~D$PP$SՋD$ HIN)։D$)9D$}QCQ$j0Ճߋ|$OtRR$D$CNFvVuCf fCTPjzPCVgPy jVSm,[^_]UWVS|$,t$(WV8 u Jtw|$(u($t1&$t1ǀdÈ^Rfkf^P$f^P$if^PAljFAQ%fFAljFAljF AljF$AljF(AljF,A Q +%ljF0A Q %ljF4AQljF8AljF<AljF@AQ%ljFDAljFHAf~L [^_]UWVS(D$<|$Hl$DD$D$@D$hMEMIuCPjhhMEMI + Phj2VhjSvQh(hjG1Ʌk7 BD$fBfjB +GB D$ T$ B GVRjPD L$PT$GTfB2GL$H w9$4k7D40k7D4&k7D4k7D4k7D4k7D4k7gD35PjWD P;1[^_]W1VS\$PCPh\jC PhvjC Phj shjsXZhjtPGPhjGuQQhzjS SS S$&S(=S,TS0kS4S8SjD$PUt$T$ yVVhjC$@u׉몍C$jVUt$mxDU=uJuS$S$uCfC fC"RjRt$t$Vkt C$1kjjC PVyPPhjZYh0K C"9r PQh*K 9vQPh`jC$<[^_]à T$z$~J B")PQRt$  Ãhhjo@ST$L$ t/f:u(zu"QBYZR Q)1Y [ËT$tJQ ;Q$t+Q1ËT$t RB+BUWVS\$4L$0 SRSrs PQhj S9tUs RPCkp+p +xWVhjDD$C;l$ 3Ht&)΃ u QPVhj M >̋P(W@,))PjVC jp3,1[^_]S\$Cthh$h6jT$B؋D$%D$C[UWVSL\$`Cuxtjjp D$,PVeu؍D$ PD$ Pt$DhT 1҉ŋD$ RP3t t$HUCphdj/t$,t$HUt$LjV[ dRRt$VULPPVD$P0D$pCt$ hhP4$C4$SBJ L[^_]ShRSTGu>PjjhRSTG1tPjjSSShjDD$1[ÃhRSTG1҅tЃ ËT$1<t ;D$s@S1ҋD$\$ )uBu[S1\$ 0 wQk +D[à  Su2- wj3hh6jo [UWVSSjh hEMITu QQhj@f@@ KuRRhjy~1VS;n s^SC T$9sIWO$PL$k S T$ $؉HL$PHL$ 9L$uPPh jhE F [^_]UWVSD$4T$8\$0D$T$ wtmu +D$4*FH p9sO8QP k h<$|$l$ȋl$ +<$Xl$9։xhuD$4 D$0[^_][^_]à QRPt$SVSt$\$VjPS VjQS[^ShÃttRPhjD[à  4 4PPP=@u0% @0%? % $%?$,%, % ,%,Bz  ($$Bz,,(F  Fh.B:$$B:C00C     00  p)  $$ 44 P  PQ((Q     00 F  FF:$$F:     00 Q((Q p)  43F  3F3E  3E;E  ;EE  EE  E!44!!44! $ $   $00 $XX`F* $$F*44 ,,<@~%   fu fuffi RPhjV ",D8 *~fuf&uf2uf>u S< +siuPPhjC@CDCHCLChClXZh%jwƃ0ƃ3ƃ3ƃ3ƃ3ƃ3ƃ3rjTTTTPPjjrt@8t  +CTCT="tiw%= +t`w=tW=8=tI=*=Vt;w=&t2=R=ft$=jt=btPPh,jUPPhYj?ZYhsD$PNtD$fSPD$ %fCPb$ b____] ] a aT0TfCPPuhSTt$% $t$% $t$% $ s$ % $ [ËD$f]ʉD$<á uFR;D$|f~Pt RRWVPPhWTL$T$> fQtFF V1D$ D$(T$ ǀkD$lD$,A T$FB|A $!A $!NL$H +D+jD+jPUhj达 lD$|$t D$D+j€t@ t<$@N<w1<$w"|$ k$|$‹D Gl D$@lD$$D$ Mt +|$u hѼļ[^_]UWVS +D$_L$ _q,rD$PPhjƽ1ɉމ@tt y10<]f% utu ]|x"~W\$0SjjuCD$8=v8VPjS蔺t%P;T$ tRt$@hP1D$u |$t.Phj|$HW肰XZjWYXhW~ZYh9Í$HPbZY9~h Í$HP@ZY9~h Í$HP9u ۿuPPh&jVtZPPhFj hV$HS +Xt$0SSh^jȻWhj$HSsD$($\D$$T hjt$HVIXZjV jj$W+ډDŽ$DŽ$1҉Yt$u1D$QQh|j hjS̮D$($\D$$T jjW詮ډDŽ$DŽ$AL$,Ƅ ȃ jjP`FDŽXDŽPiƠDŽi hjP3 hjP1҉^t$v hڸ$P0 $HSO$dQ$QXZjS ;m$xn*m$j,$uhSjjSt |$1Ҹ$L؍$PPSjjtVVhjV$PSjjtQQhj,$( PSjjtPPhj$ PSjjdtRRhjظ +[^_]WVS|$t$|$t#uRSWhӁCu1PSWh賁Cu[^_VS\$j:萷$K [^9 +-t.PtS1ɀxjD j$< +ǂ Bǂ0B  BǂBǂB@[UWVSSÉЋt$$|$t$D,|t( ƉP%  + ǂ B ǂ0BBǂBǂ$Bǂ4BBǂBǂ(BCL 8BBǂBǂBX[^_]WVS +ǀ BVL 0Bʁ6BǀBǀ$Bǀ4B B6ǀBǀ(B^D$8BBǀBǀ,BVL %9r2P УPP$0t1ҋP  ȣPP![Ãjt@Dt Pu?u@fD$Xt& VUShjs؉  ؃ F ul[^_]UWVSЁl$L$<$1kl$h +LJ B BD$ BD$$0BD$0BD$(F$  0BD$D$BD$ BD$,D$ BD$BD$BD$0BD$4i$LJB@LJBT$<(44$V@CD$(`CD$@@CZYT$<;D$8uT$<$D$$\$(T$ F8N @9BN + ȋL$\$D$,D$0DD$ǀD$ǀD$T$ǂT$ǁL$ ǂT$T$L$ǁBǂ NEV0L +T$  L$ D$ǀ D$4 $D$$L$(T$F$  D$,L$D$0@D$ǀF8N @9BND + ȃD$ D$\$ǀDD$ǀ~4CF4 D$ D$ǀBD$ǀ F$\$  D$ D$\$`ǀ @D$4 $T$<L$ D$  L$ ;L$8uB+kD$hi$Ѝ,1ڍD$L|$\~ |$X Vt$(t$hjP <9O9LBuD$ș1D$1; Bu칀ڍD$L-|$\~|$Xt&PPhjוD$T$( ЃD$LF 1l[^_]UWi VSˁT$‰D$1|$L=js$@huҋ|$tM + ً]4 ً]X ً]0 ً]8 ً] ى@t ɹE|$1t=j|$|$s(AhuD$D$Lj1skh|$t$@uT$t$UZY:D$D$ \$T$D$(D$|$ Dj<D$ |$8D$ 1D$ D$$O1tDΉ `uT$,PPt$UWT$<@OD$DOHOLOPOTOXO\OǂB?T$<ǂ BE8T$,M @9BM + ȃ0BD$ BǂBDǂ$BM0EED 4BD$BǂDBͫǂBBǂ(B}4CE4 8BD$BD$$ǂHBͫǂBBǂ,BǂjtSN@u $1<IEȍ ىtuQQhj-|9Ot뛀~jt RRjV~kt PPjVp1 [^_]UWVS$04{jt@=@u{ktD=Du`@1|;j j1(D$dž(9uiǠl;j1҉D$s"khD$ƄƄ IuBuUUWSo1D;jdžCL   6dždždždždžCD Ё6 dždžCL  dždž$ Al;j1s"khD$Ƅ0Ƅ0 IuBuQQWS;1D;jpdžCL   6dždždždždžCD Ё6 dždžCL  dždž$ AF҉P<9u j1ɉD$Ot +Nl$11D;jrFu" P)tZOtN$11D;jrFu" PtOtN1D$iƠl3j؉D$D$ D$s5khT$ L$D OuD$|$uNt닀{jt RRjS{kt PPjS1Sjs@@u@u1SksDDu@u1[^_]UW1VS$0l$N1D;jrFu" PtZOtN$11D;jrFu" P;tOtN1D$iƠl3j؉D$D$ D$s5kh1T$ L$DG uD$|$uNt닀{jt RRjS +{kt PPjS1Sjs@@u@u1SksDDu@u1[^_]U1WVSfD$y$D${/t j1rBu*1DŽGDŽuItND$ D$TB1D$PBD$L BD$H$19L̓ $<$u*BhuNt듀{jt +jSI^_{kt +jS9Y[[^_]UWV1S|$01D$ D7js)l$ ,` ]ډ蹼CuNt벃[^_]VSt$ Fjt BƠu~kFƠt"1PShjn؃t) 1h2TvxV4B~kt, xV4h2TvθFuD$ FjL$ @O1@MDODMHOHMLOLMPOPMTOTMXOXM\O\M諴D$  B0B(BBD$B4Bd(BBB(B8Bd(B BB,Bdždždždždždž뫁uAdždždždždždžuKdždždždždždždž x@uKdž dždždždždždž%mu>dž dždždždždžDuKdž +dždždž dždždžu>dždždždž dždž<dždždždždždždž1ҸB11҉fFhF j[N1ҋF, HF,Ph\ j[^ ~dud  FHdudy u FLdudi e FPdudY xU FTdud]I HE FXdud-9 5 F\dud) % F`dud  Fd4PN Ve4$ªNU LXv0Pߣ0P4$膬XZhz jYY[jV脬_Xt$VXZh jYFj Fk Fj2Fk3~jt PPjV~kt PPjVϵPs~ dFud  7~jt%  ~kt%  _ _jd_Xh jX$odt V V"XZh jX4$ڰY[h jsX4$4$ Vuy VZui VfuY V?uI Vu9 V V4$11|$ut$0[^_]x[^_]iȅ1ҸBºGUWVS t$8D$DžDžDžDžDžDžC=@uKDž DžDžDžDžDžDž=uKDž +DžDžDž DžDžDž=u>DžDžDžDž DžDžCEDžDžDžDžDžDžDžM1ҸB11҉fEhE jZRM1ҋE, HE,Ph\ j:REkHUHIULAUP9UT1UX)U\!U`Ed4PN U!,$~NU LXu0Pߣ0P,$BXZhz jQY[jU@XZWU趥Y[h jcQEj Ek Ej2Ek3}jt PPjU衭}kt PPjU莭PsE< 7}jt%  }kt%  _ _jf\_Xh jP$L\t U UXZh jfP,$跨Y[h jPP,$,$ Uuy U7ui UCuY UuI Uu9 U U,$1|$ ul$0[^_]U[^_]UWVS05PPD$PD$ ^%ۃ!dShjcO^d1҃ i2Phj9O$PV1hjO \/wSVhjN؃ 4hjN I3@EPhjN I3 Eǿ|Ph:jNlX%ZD${EEQ%RPPhQjHNl|${EPEWҁRShujN Nt +,[^_]Sf]f=u?2%0 0b h@踉XZh'jM$8L$$9L$$謃$;L<$$<_L :$=DL$܋$?0L[S <ӁtӉ[à ҋ < T$jT$RP>,VS< ==uHvRRh'jkL)\$@t$ H{PPVS[^S h'j"LD$DCD$ +u& j +WKuPPh1(jK3D$ @D$ t QQh'jRRh(jK1[ÃDD$ D$t#RD$?PhJ(j~KD$?PPhb(jcK1UWVS=<@ tPUhx(j)KtPSh(jKH PSh(jJ؃ Ph(jJ؃ Ph(jJ؃ Ph(jJ؃ Ph)jJ؃ Ph%)jJ؃ PhB)jnJ؃ Ph_)jVJ؃ Ph|)j>J؃ Ph)j&J؃ Ph)jJ؃ Ph)jI؃ Ph)jI؃ Ph)jI؃ Ph *jI1r&2t*D$ hJUD$H @ԃ2PPh**uSSh*jUIQQh*jDIWpGt L uRRh*jI[ 1hP$dT ChT@ HtuЃ hH PSh(jH؃ Ph(jH؃ Ph(jrH؃ Ph(jZH؃ Ph)jBH؃ Ph%)j*H؃ PhB)jH؃ Ph_)jG؃ Ph|)jG؃ Ph)jG؃ Ph)jG؃ Ph)jG؃ Ph)j}G؃ Ph)jbG Sh *jRG 4+h +j,S:,\$$t$( DPhA,jG< CEPhc,j.< CEPh,j< EPh,j; CEPh,j; CDWh,j; 4 7h -j; C 47h/-j;C 46hQ-jj;C 46hs-jK;F 46h-j,;F 46h-j;]Xh-j;F<tt +<t%<t=UWF4L6&F<2w65F<w% 5tSRh-%Fu QQh-RPh". PFPh.j:D$$zD$  [^_]`:VRomstage stack size limited to 0x%x! +Smashed stack detected in romstage! +CPU not supported +FSB not found +fdMSdt +Mddsrc/cpu/x86/smm/tseg_region.cASSERTION ERROR: file '%s', line %d +ERROR: No cache SMM subregion. +SMM Memory Map +SMRAM : 0x%lx 0x%zx + Subregion %d: 0x%lx 0x%zx +Unknown device type: %d +""!!!!!!!!!!!!!%s%3u.%.3u ns +CBMEM entry for DIMM info: %p +BUG: Too many DIMM infos for %s. +)))))))))) Row addr bits : %u + Column addr bits : %u + Number of ranks : %u + DIMM Capacity : %u MB + CAS latencies : %u tCKmin : tAAmin : tWRmin : tRCDmin : tRRDmin : tRPmin : tRASmin : tRCmin : tRFCmin : tWTRmin : tRTPmin : tFAWmin : tCWLmin : tCMDmin : %3u +spd_add_smbios17fMRC: failed to add to cbmem for type %d. +MRC: failed to add '%s' to cbmem. +MRC: failed to locate region type %d. +MRC: region file invalid in '%s' +MRC: no data in '%s' +MRC: couldn't read metadata +MRC: invalid header signature +MRC: header checksum mismatch: %x vs %x +MRC: size exceeds rdev size: %zx vs %zx +MRC: invalid header in '%s' +MRC: mmap failure on data verification. +MRC: data checksum mismatch: %x vs %x +MRC: invalid data in '%s' +MRC: version mismatch: %x vs %x +xdRW_VAR_MRC_CACHERW_MRC_CACHERECOVERY_MRC_CACHEf0ECRMADCRMNDCRMcmos_layout.binCOREBOOTRTC: cmos_layout.bin could not be found. Options are disabled +RTC: cmos_layout.bin could not be mapped. Options are disabled +No CMOS option '%s'. +Timeout while sending command 0x%02x to EC! +Timeout while sending data 0x%02x to EC! +f CBFS: %s region not found while looking for %s + +*** Pre-CBMEM romstage console overflowed, log truncated! *** +Unable to recover external stage cache. +External stage cache: +Could not limit stage cache size. +Error: Can't add %x metadata to imd +Error: Can't add stage_cache %x to imd +Error: Can't find %x metadata in imd +Error: Can't find stage_cache %x in imd +FMAP: Found "%s" version %d.%d at %#x. +FMAP: base = %#llx size = %#x #areas = %d +__FMAP__ERROR: FMAP cache corrupted?! +No FMAP found at %zx offset. +ERROR: Failed to allocate CBMEM +ERROR: Failed to read FMAP into CBMEM +FMAP: area %s found @ %x (%d bytes) +src/lib/imd.cIMD: root @ %p %u entries. +CBMEM: +failed. +fRAM INIT FAILURE! +REGF fail reading first metadata block. +REGF fail locating latest metadata block. +REGF failed to read data boundaries. +REGF fail locating data boundaries. +REGF data boundaries wrong. [%zd,%zd) Need to empty. +REGF data exceeds region %zd > %zd +board_resetLoading module at %p with entry %p. filesize: 0x%x memsize: 0x%x +Processing %zu relocs. Offset value of 0x%08lx +Adjusting %p: 0x%08lx -> 0x%08lx +src/lib/rmodule.cERROR: BUG ENCOUNTERED at file '%s', line %d +Decompressing stage %s @ %p (%d bytes) +Romstage handoff structure not added! +src/lib/timestamp.cERROR: No timestamp table allocated +ERROR: No timestamp cache found +ERROR: Timestamp table full +ERROR: No timestamp table found +Tue Mar 24 00:40:10 UTC 2020f4.11-1765-g4bd6927388-dirtyfffffffffffffffffffffffffCGB ~fjb9WARN: Unknown platform id 0x%x +DMI: Running at X%x @ %dMT/s +Setting up static northbridge registers... done +Graphics not supported by this CPU/chipset. +Initializing Graphics... +gfx_uma_sizeSPD probe channel%d, slot%d +channel[%d] rankmap = 0x%x +No DIMMs were foundStarting native Platform init +CPUID %x differs from stored CPUID %x, CPU was replaced! +Stored timings CRC16 mismatch. +Trying stored timings. +Stored timings are invalid ! +RAM training failed, trying fallback. +raminit failedRAMINIT: Failed to add SMBIOS17 +OTHP Workaround [%x] = %x +OTHP [%x] = %x +Unsupported DIMM combination. DIMMS do not support common CAS latencyNo valid DIMMs foundfhhhhhh>iUpdate PCI-E configuration space: +PCI(0, 0, 0)[%x] = %x +timB discovery failed: %d, %d, %d +timC discovery failed: %d, %d, %d +timC recovery failed +edge discovery failed: %d, %d, %d +edge write discovery failed: %d, %d, %d +402x discovery failed (1): %d, %d +402x discovery failed (2): %d, %d +c320c discovery failed +timC write discovery failed: %d, %d, %d +Mini channel test failed (1): %d +Mini channel test failed (2): %d, %d, %d +t123: %d, %d, %d +ffffffffffnoyesStarting Ivybridge RAM training (%d). +DRAM frequency is under lowest supported frequency (400 MHz). Increasing to 400 MHz as last resort100MHz reference clock support: %s +Couldn't find compatible clock / CAS settings +Trying CAS %u, tCK %u. +Found compatible clock, CAS pair. +Selected DRAM frequency: %u MHz +Selected CAS latency : %uT +PLL busy... done in %d us +MCU frequency is set at : %d MHz +PLL didn't lock. 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kDD+z>4Kgt`zPPQE,˻Chz':ÅXH0RjL*.h9Ky!N?41ԉ +"p;vHT>0*<ь^Xr@oLO% -m+-rVm'HK/gl0>_ZJwlG{ &QX <(? ;][k*on߀'ړRdzGC\V}tqt'13)N+7S#\*@\tW<2@ s'TخJW1]rQGY^91HؠM57uV/&_\B(-`=NGAY2qAp8 9ZJ]l7 ((-;@ƕKa+4qdf~ȍ%|ijT&v +;8WpYJo&hTvi-783fͭS\9bm-:*a) =[܍crT5G8tj5R7`c#9gGMY;qvMGB) +38+7?7Vb~Eo+%`ܵ9'W ƕ#/?I B4~miv©5^0u:VwY;ii+\za0$8$ZI] +G&$8EIwNc>!nC;Lx 4|}:*xaG]Э9!X*r wKK&y&7_m^!`[U#Ḿ}y0)u`o4AWN8 _OLUݯ} +O~";+v@^"vT[h$!naf "Ds}z<g0cGV?Pkߟ&at͉ 7pJ9ma -=scf>ڗHSW F9?LARCHIVEP(8configBCZL# This image was built using coreboot 4.11-1765-g4bd6927388-dirty +CONFIG_USE_OPTION_TABLE=y +CONFIG_USE_BLOBS=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_VENDOR_LENOVO=y +CONFIG_NO_POST=y +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_VGA_BIOS=y +CONFIG_CBFS_SIZE=0x400000 +CONFIG_BOARD_LENOVO_X230T=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_S3_VGA_ROM_RUN is not set +CONFIG_PCIEXP_CLK_PM=y +# CONFIG_H8_BEEP_ON_DEATH is not set +CONFIG_VGA_ROM_RUN=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_VBE_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +CONFIG_COREINFO_SECONDARY_PAYLOAD=y +CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y +LARCHIVEP(8revisionBCZL/* build system definitions (autogenerated) */ +#ifndef __BUILD_H +#define __BUILD_H + +#define COREBOOT_VERSION "4.11-1765-g4bd6927388-dirty" +/* timesource: git */ +#define COREBOOT_VERSION_TIMESTAMP 1585010410 +#define COREBOOT_ORIGIN_GIT_REVISION "4bd6927388" +#define COREBOOT_EXTRA_VERSION "" +#define COREBOOT_MAJOR_VERSION 4 +#define COREBOOT_MINOR_VERSION 11 +#define COREBOOT_BUILD "Tue Mar 24 00:40:10 UTC 2020" +#define COREBOOT_BUILD_YEAR_BCD 0x20 +#define COREBOOT_BUILD_MONTH_BCD 0x03 +#define COREBOOT_BUILD_DAY_BCD 0x24 +#define COREBOOT_BUILD_WEEKDAY_BCD 0x2 +#define COREBOOT_DMI_DATE "03/24/2020" + +#define COREBOOT_COMPILE_TIME "00:40:10" +#define ASL_VERSION 0x20190703 +#endif +LARCHIVE9@(8bootsplash.jpgBCZL9JFIF,,Created with GIMPC + + +    C   "  +I ! 1"AQaq2#B39Rrtb%47CSsuv ?ʠkl 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Options are disabled +RTC: cmos_layout.bin could not be mapped. Options are disabled +No CMOS option '%s'. +CBFS: %s region not found while looking for %s + +*** Pre-CBMEM postcar console overflowed, log truncated! *** +Unable to recover external stage cache. +External stage cache: +Could not limit stage cache size. +Error: Can't add %x metadata to imd +Error: Can't add stage_cache %x to imd +Error: Can't find %x metadata in imd +Error: Can't find stage_cache %x in imd +WARNING: Post-RAM FMAP access too early for cache! +__FMAP__No FMAP found at %zx offset. +FMAP: Found "%s" version %d.%d at %#x. +FMAP: base = %#llx size = %#x #areas = %d +FMAP: area %s found @ %x (%d bytes) +src/lib/imd.cIMD: root @ %p %u entries. +lzma: Input too small. +lzma: Incorrect stream properties. +lzma: Decoder scratchpad too small! +lzma: Decoding error = %d +fallback/ramstageJumping to image. +ramstage cache invalid. +Ramstage was not loaded! +f?board_resetLoading module at %p with entry %p. filesize: 0x%x memsize: 0x%x +Processing %zu relocs. Offset value of 0x%08lx +Adjusting %p: 0x%08lx -> 0x%08lx +src/lib/rmodule.cERROR: BUG ENCOUNTERED at file '%s', line %d +Decompressing stage %s @ %p (%d bytes) +ERROR: No timestamp table allocated +ERROR: No timestamp table found +ERROR: Timestamp table full +Tue Mar 24 00:40:10 UTC 2020f4.11-1765-g4bd6927388-dirtyff +"vPo* + +     *6AFKPU5Fr8x0Efnv!&  *[agq%*/BY`R(2}EO~, 8 K f r      !N!a!r!!!!!""%"G"""""""#.#L#i#y###2$%%%%O&7)H)`)))))**,*C*d****+ 9F9_99H:M::9;q;;;<===>3>?>>>>>>>h????HELARCHIVE:P8Hfallback/dsdt.amlBCZL:DSDT:\COREv4COREBOOT% INTL E\NVSA\._TZ_SKIN\._SB_CNOT\/_SB_CP00_PSS\/_SB_PCI0GFX0LCD0\PPKG\HBDC\HWAN\HKBL\HUWB[APMP + +[APMPAPMCAPMS[POST +[ POSTDBG0TRAP phSMIFpTRP0SMIF _PICphPICMGGOS_p OSYSG[_OSI_OSI Windows 2001p OSYS_OSI Windows 2001 SP1p OSYS_OSI Windows 2001.1p OSYS!_OSI Windows 2001.1 SP1p OSYS_OSI Windows 2001 SP2p OSYS_OSI Windows 2006p OSYS_OSI Windows 2006 SP1p OSYS_OSI Windows 2006.1p OSYS_OSI Windows 2009p OSYS_OSI Windows 2012p OSYSO_PTS\/_SB_PCI0LPCBEC__MUTE\/_SB_PCI0LPCBEC__USBP\/_SB_PCI0LPCBEC__RADIA_WAKp\._TZ_MEB1p\._TZ_MEB2\/_SB_PCI0LPCBEC__HKEYWAKEhPICMDSEN[GNVSNVSA [A-GNVSOSYSSMIFPRM0PRM1SCIFPRM2PRM3LCKFPRM4PRM5P80D LIDSPWRSTLVLFLVLTCRTTPSVTMAXF0OFF0ONF0PWF1OFF1ONF1PWF2OFF2ONF2PWF3OFF3ONF3PWF4OFF4ONF4PWTMPSAPICMPENPCP0PCP1PPCMPCNT NATPS5U0S5U1S3U0S3U1S33GCMEM IGDSTLSTCADLPADLCSTENSTESSTENDIDDID1 DID2 DID3 DID4 DID5 HBLCSBRTLODDS8ALSEALAFLLOWLHIH0EMAEEMAPEMAL(MEFEHTPMPTPME@GTF08GTF18GTF28IDEMIDET(XHCIASLB IBTTIPATITVFITVMIPSCIBLCIBIAISSCI409I509I609I709IDMMIDMSIF1EHVCONXD1 NXD2 NXD3 NXD4 NXD5 NXD6 NXD7 NXD8 ISCIPAVPOSCCNPCEPLFLBREVDPBMDPCMDPDMALFPIMONMMIOTPIQ@VBT0 VBT1 VBT2 VBT3VBT4@VBT5@ VBT6@ VBT7 VBT8 VBT9 CHVDVBTA MEHH@RMOB RMOL ROVP ROVL RWVP RWVL S3UEpS3U0pS3U1S3UDpS3U0pS3U1S5UEpS5U0pS5U1S5UDpS5U0pS5U1 S3GEpS33G S3GDpS33G XHCEpXHCI XHCDpXHCI"TZUP[\._TZ_SKIN\._TZ_SKIN +F0UTphF0OFpiF0ONTZUPF1UTphF1OFpiF1ONTZUPF2UTphF2OFpiF2ONTZUPF3UTphF3OFpiF3ONTZUPF4UTphF4OFpiF4ONTZUPTMPUphTMPSTZUPPNOT\._SB_CNOT +PPCN\._SB_CNOT +TNOT\._SB_CNOT +6_SB_[5PCI0_HID A +_CID A +_BBN[F-MCHC_ADR[MCHP [F MCHP@ EPEN EPBRMHENMHBR9DVEN @PXENPXSZPXBR DMEN DMBRMEBA@@PM0HPM1LPM1HPM2LPM2HPM3LPM3HPM4LPM4HPM5LPM5HPM6LPM6HH TOM_@@ +TLUD [CTCMCTCCCTCNCTCDCTCU +[MCHByMHBR + [@MCHB,CTDNA7PL1VPL1EPL1CPL1TPL2VPL2EPL2CPL2TTARNCTDDTARD(CTDUTARU(CTCSTARSEPSSSp`p^^^.CP00_PSSa)`az^^^.CP00_PSS` + +b bht`u`DSTND [#CTCMdCTCDCTCC['CTCMp Set TDP Down[1pCTCDCTCSpTARDTARSpPSSSTARDPPCMPPCNxwCTDD +} +dPL2VpCTDDPL1VpCTCDCTCC['CTCMGSTDN [#CTCMdCTCNCTCC['CTCMp Set TDP Nominal[1pCTDNPL1VxwCTDN +} +dPL2VpPSSSTARNPPCMPPCNpTARNTARSpCTCNCTCSpCTCNCTCC['CTCMMCRSC     G     +   ? @ @  @  @  @  ? @ @  @  @  @ ?@ @@ @ @   OPyI_CRSMCRS PMINMCRS PMAXMCRS PLENp^.MCHCTLUD`p^.MCHCMEBAa`ap^.MCHCTOM_`p`PMINp PMAXrtPMAXPMINPLENMCRS[HPEGP_ADR _STAw{z^^.MCHCDVEN + +[ DEV0_ADR _PRTIRQM[IPEG1_ADR _STAw{z^^.MCHCDVEN + +[ DEV0_ADR _PRTIRQM +[HPEG2_ADR _STAw{z^^.MCHCDVEN +[ DEV0_ADR _PRTIRQM +[IPEG6_ADR _STAw{z^^.MCHCDVEN +  +[ DEV0_ADR _PRTIRQM +[KPDRC_HID A _UIDPDRSN +z @      P P  @ y@ +_CRSPDRS +MBR0y^^.MCHCMHBR +MBR0PDRS +DBR0y^^.MCHCDMBR + DBR0PDRS +(EBR0y^^.MCHCEPBR + EBR0PDRS +4XBR0y^^.MCHCPXBR +XBR0PDRS +8XSZ0z ^^.MCHCPXSZXSZ0PDRS[O3GFX0_ADR [GFXC [GFXC@BAR0@@fASLE @ +ASLS [GFRG{BAR0 @[GFRG*ABCLVBCLM[@BOX3_ADR[OPRGASLS [7OPRG@,MBOX RARDYASLC TCHE ALSI BCLP PFIT CBLV LXBCM ASLS {MBOX +pxwh + +da a +p +ap}a BCLP ARDYp +ASLCpASLEp + `,`[""{ASLC +{zASLC + +aav`[C +LEGA_ADRDRCLxrhxi +iXBCMpDRCLwhBCLM +dBCLVHXBQC BCLMpDRCLwBCLV +dBCLM`p +a>atBRIGpBRIGabpBRIGrac`c`bt`btc`bcuac XBCM^.BOX3XBCMh^.LEGAXBCMhXBQC^.LEGAXBQCBRCT#BRIDpBRIGh +` `tBRIG`XBCLpBRCTBRIG_DOSp{h +DSEN4DECB BRCTLCD0 + pBRIDXBQC`` +v`XBCMBRIG`:INCB BRCTLCD0 +&pBRIDXBQC``tBRIGu`XBCMBRIG`XDCSTRAP{CSTEyh + +XDGS {NSTEyhXDSS{h pNSTECSTEK;\[IO_T  +[IO_T@TRP0[PMIO  +[J PMIO@GS00GS01GS02GS03GS04GS05GS06GS07GS08GS09GS10GS11GS12GS13GS14GS15 GE00GE01GE02GE03GE04GE05GE06GE07GE08GE09GE10GE11GE12GE13GE14GE15@ GPEC[GPIO  +l[M!GPIOGU00GU01GU02GU03GIO0GIO1GIO2GIO3 GP00GP01GP02GP03GP04GP05GP06GP07GP08GP09GP10GP11GP12GP13GP14GP15GP16GP17GP18GP19GP20GP21GP22GP23GP24GP25GP26GP27GP28GP29GP30GP31@GB00GB01GB02GB03@GIV0GIV1GIV2GIV3GU04GU05GU06GU07GIO4GIO5GIO6GIO7GP32GP33GP34GP35GP36GP37GP38GP39GP40GP41GP42GP43GP44GP45GP46GP47GP48GP49GP50GP51GP52GP53GP54GP55GP56GP57GP58GP59GP60GP61GP62GP63 GU08GU09GIO8GIO9GP64GP65GP66GP67GP68GP69GP70GP71GP72GP73GP74GP75[RCRB @[G RCRBHPASHPTEH PCIDSA1DSMBDHDADEH2DLPBDEH1DRP1DRP2DRP3DRP4DRP5DRP6DRP7DRP8DTTRDSA2DFBDFDME1DME2DIDRDKTCT[HDEF_ADR _PRW + +E.IRQM _T_0IQAA,  +   + + + + + + +IQAPM ^.LPCBLNKA ^.LPCBLNKB +^.LPCBLNKC +^.LPCBLNKDIQBA,  +   + + + + + + +IQBPM ^.LPCBLNKB ^.LPCBLNKC +^.LPCBLNKD +^.LPCBLNKAIQCA,  +   + + + + + + +IQCPM ^.LPCBLNKC ^.LPCBLNKD +^.LPCBLNKA +^.LPCBLNKBIQDA,  +   + + + + + + +IQDPM ^.LPCBLNKD ^.LPCBLNKA +^.LPCBLNKB +^.LPCBLNKCC ph_T_0% +_T_0 +PICMIQAAIQAP@ & + +_T_0 +PICMIQBAIQBPF& + +_T_0 +PICMIQCAIQCP<& + +_T_0 +PICMIQDAIQDP +PICMIQDAIQDP[@RP01_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP02_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP03_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP04_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP05_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP06_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP07_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[@RP08_ADR [RPCS +[$RPCS@&RPPN@PDC_DBHPCS_PRTIRQMRPPN[I EHC1_ADR _PRW + + _S3D + _S4D +[G +HUB7_ADRGGPLD PCKG +[PCKG +REV_p +REV_[PCKG +@VISIphVISIPCKG[ PRT1_ADR[ PRT2_ADR +[ PRT3_ADR +[ PRT4_ADR +[ PRT5_ADR +[ PRT6_ADR +[I EHC2_ADR _PRW + + _S3D + _S4D +[G +HUB7_ADRGGPLD PCKG +[PCKG +REV_p +REV_[PCKG +@VISIphVISIPCKG[ PRT1_ADR[ PRT2_ADR +[ PRT3_ADR +[ PRT4_ADR +[ PRT5_ADR +[ PRT6_ADR +[FXHC__ADR [XDEV ["XDEV@hX2PR PRM2 SSEN RPM3 XPRT _PRW + +F POSC +iCDW1h}CDW1 +CDW1XHCI}CDW1 +CDW1A +{CDW1XHCI +XHCI +p XHCI Switch[1p`{XPRT +` ``p +a ` +p +a +` +pa{RPM3 `}`aRPM3{PRM2 `}`aPRM2{SSEN `}`aSSEN{X2PR `}`aX2PRi _S3D + _S4D +[LPCB_ADR [LPC0 [K +LPC0@ PMBS@PRTAPRTBPRTCPRTD PRTEPRTFPRTGPRTH@ +IOD0IOD1@GR00GR01GR02GR03GR04GR05GR06GR07GR08GR09GR10GR11GR12GR13GR14GR15@RCEN RCBA[A +LNKA_HID A _UID _DISp +PRTA_PRS +#y8_CRSRTLA +#yRTLAIRQ0pIRQ0y{PRTA +IRQ0RTLA_SRS hIRQ0IRQ0`v`p`PRTA_STA {PRTA + +  + [B +LNKB_HID A _UID + _DISp +PRTB_PRS +#y8_CRSRTLB +#yRTLBIRQ0pIRQ0y{PRTB +IRQ0RTLB_SRS hIRQ0IRQ0`v`p`PRTB_STA {PRTB + +  + [B +LNKC_HID A _UID + _DISp +PRTC_PRS +#y8_CRSRTLC +#yRTLCIRQ0pIRQ0y{PRTC +IRQ0RTLC_SRS hIRQ0IRQ0`v`p`PRTC_STA {PRTC + +  + [B +LNKD_HID A _UID + _DISp +PRTD_PRS +#y8_CRSRTLD +#yRTLDIRQ0pIRQ0y{PRTD +IRQ0RTLD_SRS hIRQ0IRQ0`v`p`PRTD_STA {PRTD + +  + [B +LNKE_HID A _UID + _DISp +PRTE_PRS +#y8_CRSRTLE +#yRTLEIRQ0pIRQ0y{PRTE +IRQ0RTLE_SRS hIRQ0IRQ0`v`p`PRTE_STA {PRTE + +  + [B +LNKF_HID A _UID + _DISp +PRTF_PRS +#y8_CRSRTLF +#yRTLFIRQ0pIRQ0y{PRTF +IRQ0RTLF_SRS hIRQ0IRQ0`v`p`PRTF_STA {PRTF + +  + [B +LNKG_HID A _UID + _DISp +PRTG_PRS +#y8_CRSRTLG +#yRTLGIRQ0pIRQ0y{PRTG +IRQ0RTLG_SRS hIRQ0IRQ0`v`p`PRTG_STA {PRTG + +  + [B +LNKH_HID A _UID + _DISp +PRTH_PRS +#y8_CRSRTLH +#yRTLHIRQ0pIRQ0y{PRTH +IRQ0RTLH_SRS hIRQ0IRQ0`v`p`PRTH_STA {PRTH + +  + [EC___HID A _UID_GPE +[ECLK[ERAM [N +ERAMDKR1HSPA7LEDSTBSW@DKR2OEVNT FANDFANAALMTUWBEEAMUTBTEBWLEBWWEBKBLTUSPWCHPPIGSTS.WAKE@TMP0TMP18PAGE@>DKR3D_REGMHKM7h + yth` i}DHKN`DHKN {DHKN`DHKNEN__pDHKNEMSK MHKA MHKGyTBSW + SSMSphALMTMMTShTLED +TLED + +MHKV  WLSWGSTSINITHASTWBDC1GBDCpHAST HBDCp` +BTEB}` +`}`yWBDC +``/SBDCpHAST"HBDCz{h +`p`BTEBz{h + +`p`WBDCWWAN1GWANpHAST HWANp` +WWEB}` +`}`yWWAN +``,SWANpHASTHWANz{h +`p`WWEBz{h + +WWANMLCGHKBLp `}`KBLT``MLCSHKBLp{hWWEB GUWBHUWBp` +UWBE}` +``SUWBHUWBz{h +`p`UWBEWAKEHASTpWBDCBTEBpWWANWWEBB BCSS{h +`{zh + +aIa^^.BAT0SETT`^^.BAT1SETT`p`^^.BAT0GETTbp`^^.BAT1GETTcybc +%a^^.BAT0SETT`y`^^.BAT0GETT +&a +^^.BAT1SETT`y`^^.BAT1GETT + B BCCS{h +`{zh + +aIa^^.BAT0SETT`^^.BAT1SETT`p`^^.BAT0GETTbp`^^.BAT1GETTcybc +%a^^.BAT0SETT`y`^^.BAT0GETT +&a +^^.BAT1SETT`y`^^.BAT1GETT + ;BCSGh} ^^.BAT0GETTh +} ^^.BAT1GETT ;BCTGh} ^^.BAT0GETTh +} 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H#Apju3r21.П=nBSvMjD\+k3^#!=>h֏Ad{{-JhdrEFab@?5)e9qU"؋dдR!O(j)^ȧXOC9*禗Pv Vm;B7;W>n4T*@0_lU3'/L٬9q7шKsl}z>#zi +Z:O F$Sц0>dL5VNnK16=5WG6K#:tN) a oOmV5\ +gD|}-|)sg:>?'5e⸋ + W_D}fO3  `Ȟ/_JŖ]R  @ OR#X5/mh:E.S"/T0;ѫpj/Z!X D1R=eQ_\RNZ)cb 4]YN,Jm.'@ +60bWv%Ĺtsߚ=w%hpMدwz-—>5=#/-w%;ўNA``0l6wTq䌄'O A2*jdYڡn?Z9„7##>ݡ0m8s/C 3*&Hh+(e}Jkiq"g_S?;a-P!et^mɷh`{ث;Bc!*ydKcI,w(֞dz[ ,(TI{G7Ψ@0( ZwS~|n 4(tW +ͼÔ@!zg) +MD:jTa@ɮ {칥U=Hǰ1~[D:[*@,5ˠH큔Ë}ZZ;Sf8ʹeˣ%bL"Bz#$Vw:vv荊[I6+0;Slx{ ;dm;ucXֵH-r"rD1D#r+pM.{"ɾN6 t oTCH.#zXRk# )8E_|I~{B'D2TSr(?ґQw>wbG7#_&Rn%^/LOB}{i:sj(8`.kcaK\VERV<jքl5@Z߇jQ[3v+on\"30bDB5a EZ*9'~Js +OםWgP tƙl>%q}+y;>P+e&A\(332E[cIzw⸽SmPޫp=a#YvIw|v``׍nPaW@t֑7`LAl3y#2@ՙtvf%Hpخ  b. zcʊh}L΁Qc|&2<Ĺo<ӿ9Fx5\@ExN-m=?N[8^#|fAPT= 8Kbm]_%fH 1iz&c~r(nЎ mLH%'ڦaEƲha +XړWA|{ss"$f+Xx4*>QGF;~E +׺Nn&W3RpGA +[h 3Ċ'4CN9`pSgݠ]kzcN Ѓ,:^[t~K^!&{#ܾq]{26zlҮFwL`<]f#$1\.Z~z$+ WqzkZ: v&QKuR\rPwUlq+36(ւY<{1TgWl}_a47d{U{!lOx UQ`v -_*5E0gW+Keb~YD?Q {{ MЮ5$ b_C<͞'HZ5 G V쵼.9T222Ưw}&а(n.D[384g\[wM} [OлyT>' @F׊Q'dKe<\AegJ?Df^{%5ju#Y} ;n{hIpOM& ,5O'F27=jyF{]Ӱ,ޕ0W="2\"LARCHIVEgP(8payload_configBCZLg# +# Automatically generated file; DO NOT EDIT. +# SeaBIOS Configuration +# + +# +# General Features +# +CONFIG_COREBOOT=y +# CONFIG_QEMU is not set +# CONFIG_CSM is not set +# CONFIG_QEMU_HARDWARE is not set +CONFIG_THREADS=y +CONFIG_RELOCATE_INIT=y +CONFIG_BOOTMENU=y +CONFIG_BOOTSPLASH=y +CONFIG_BOOTORDER=y +CONFIG_HOST_BIOS_GEOMETRY=y +CONFIG_COREBOOT_FLASH=y +CONFIG_LZMA=y +CONFIG_CBFS_LOCATION=0 +CONFIG_MULTIBOOT=y +CONFIG_ENTRY_EXTRASTACK=y +CONFIG_MALLOC_UPPERMEMORY=y +CONFIG_ROM_SIZE=0 + +# +# Hardware support +# +CONFIG_ATA=y +# CONFIG_ATA_DMA is not set +# CONFIG_ATA_PIO32 is not set +CONFIG_AHCI=y +CONFIG_SDCARD=y +CONFIG_MEGASAS=y +CONFIG_FLOPPY=y +CONFIG_FLASH_FLOPPY=y +CONFIG_NVME=y +CONFIG_PS2PORT=y +CONFIG_USB=y +CONFIG_USB_UHCI=y +CONFIG_USB_OHCI=y +CONFIG_USB_EHCI=y +CONFIG_USB_XHCI=y +CONFIG_USB_MSC=y +CONFIG_USB_UAS=y +CONFIG_USB_HUB=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_MOUSE=y +CONFIG_SERIAL=y +CONFIG_SERCON=y +CONFIG_LPT=y +CONFIG_RTC_TIMER=y +CONFIG_HARDWARE_IRQ=y +CONFIG_PMTIMER=y +CONFIG_TSC_TIMER=y + +# +# BIOS interfaces +# +CONFIG_DRIVES=y +CONFIG_CDROM_BOOT=y +CONFIG_CDROM_EMU=y +CONFIG_PCIBIOS=y +CONFIG_APMBIOS=y +CONFIG_PNPBIOS=y +CONFIG_OPTIONROMS=y +CONFIG_PMM=y +CONFIG_BOOT=y +CONFIG_KEYBOARD=y +CONFIG_KBD_CALL_INT15_4F=y +CONFIG_MOUSE=y +CONFIG_S3_RESUME=y +CONFIG_VGAHOOKS=y +# CONFIG_DISABLE_A20 is not set +CONFIG_TCGBIOS=y + +# +# VGA ROM +# +CONFIG_NO_VGABIOS=y +# CONFIG_VGA_GEODEGX2 is not set +# CONFIG_VGA_GEODELX is not set +# CONFIG_VGA_COREBOOT is not set +# CONFIG_BUILD_VGABIOS is not set +CONFIG_VGA_EXTRA_STACK_SIZE=512 + +# +# Debugging +# +CONFIG_DEBUG_LEVEL=1 +# CONFIG_DEBUG_SERIAL is not set +# CONFIG_DEBUG_SERIAL_MMIO is not set +CONFIG_DEBUG_COREBOOT=y +LARCHIVEP8Hpayload_revisionBCZL +/* DO NOT EDIT! This is an autogenerated file. See scripts/buildversion.py. */ +#define BUILD_VERSION "rel-1.13.0-0-gf21b5a4" +#define BUILD_TOOLS "gcc: (coreboot toolchain vd70f5fae1c 2019-05-26) 8.3.0 binutils: (GNU Binutils) 2.32" +LARCHIVEP8etc/ps2-keyboard-spinupLARCHIVE6X(LARCHIVE(@bootblockBCZLff1"،H).@).f f%f `"ffXfXf.Pf؎ЎÉn1nn f "Hɻ)ˋH˸<0t;9=HuV{9=LuK߃u)߃)Kً{?9vˋ I у9v@LARCHIVEZ3E  r11011҃0u2%ǹ110Ou 10010201Ҹ0202 0 %"4 @"2%0 %"20120 @"2 0 %"~P~P~P +PXYhijklmno5vԃt}XÉދx211ҹ0ù2>t5;^ unt;V}&01ҹy0F u9wcpu_microcode_blob.bin2% uf fUWVSl$0t$4|$8T$0D$iD$$D$T$ D$( Pt$t$WV D$L$L$(D$ D$;$T$$ L=D$ r +t$ |$$믋D$;$$L$1D$)$u&~ROR$j ՃIN)tPGP$SՃ|$t^$uPGP$j0A$u:PP$j0Ճ$@t PP$jX PP$jxՃ|$u4\$~D$PP$SՋD$ HIN)։D$)9D$}QCQ$j0Ճߋ|$OtRR$D;j7 x[xÃ=tWVSuzPjjhitZhhhP=u;Pjhi;hu"PhhhdttPjhhW2tJPj8hSt3Pjhi;V%t#Rhhr;j%Y_VS$PPVShhSW [^_UWV8St,qRRt$8@Pt$P*PUSgQj*VSu뿃 uut$Dh;jyET$TEBUS[^_]S \$St$,UƒuPPt$,S[S1ҋL$19T$tu\$ B)[1WVS,\$BIST failed: %08xCPU not supported +FSB not found +dMSdt +MddUnknown device type: %d +fcmos.defaultsrc/lib/cbfs.cASSERTION ERROR: file '%s', line %d +COREBOOTFMAP: Found "%s" version %d.%d at %#x. +FMAP: base = %#llx size = %#x #areas = %d +__FMAP__No FMAP found at %zx offset. +FMAP: area %s found @ %x (%d bytes) +fallback/romstageCouldn't load romstage. +L9src/lib/timestamp.cERROR: BUG ENCOUNTERED at file '%s', line %d +ERROR: No timestamp table found +ERROR: Timestamp table full +ERROR: No timestamp cache to init +Tue Mar 24 00:40:10 UTC 2020f4.11-1765-g4bd6927388-dirtyffffff8=4=0=,=(=$= ====fCGB ~fjb9src/southbridge/intel/common/pmbase.cfff4.11-1765-g4bd6927388-dirtyLENOVOThinkPad X230t ffff8 \ No newline at end of file