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49 lines
1.8 KiB

  1. Atmega32u4 Fuse/Lock Bits for Planck/Atomic/Preonic
  2. =========================
  3. Low Fuse: 0x5E
  4. High Fuse: 0x99
  5. Extended Fuse: 0xF3
  6. Lock Byte: 0xFF
  7. ATMega168P Fuse/Lock Bits
  8. =========================
  9. This configuration is from usbasploader's Makefile.
  10. HFUSE 0xD6
  11. LFUSE 0xDF
  12. EFUSE 0x00
  13. LOCK 0x3F(intact)
  14. #---------------------------------------------------------------------
  15. # ATMega168P
  16. #---------------------------------------------------------------------
  17. # Fuse extended byte:
  18. # 0x00 = 0 0 0 0 0 0 0 0 <-- BOOTRST (boot reset vector at 0x1800)
  19. # \+/
  20. # +------- BOOTSZ (00 = 2k bytes)
  21. # Fuse high byte:
  22. # 0xd6 = 1 1 0 1 0 1 1 0
  23. # ^ ^ ^ ^ ^ \-+-/
  24. # | | | | | +------ BODLEVEL 0..2 (110 = 1.8 V)
  25. # | | | | + --------- EESAVE (preserve EEPROM over chip erase)
  26. # | | | +-------------- WDTON (if 0: watchdog always on)
  27. # | | +---------------- SPIEN (allow serial programming)
  28. # | +------------------ DWEN (debug wire enable)
  29. # +-------------------- RSTDISBL (reset pin is enabled)
  30. # Fuse low byte:
  31. # 0xdf = 1 1 0 1 1 1 1 1
  32. # ^ ^ \ / \--+--/
  33. # | | | +------- CKSEL 3..0 (external >8M crystal)
  34. # | | +--------------- SUT 1..0 (crystal osc, BOD enabled)
  35. # | +------------------ CKOUT (if 0: Clock output enabled)
  36. # +-------------------- CKDIV8 (if 0: divide by 8)
  37. # Lock Bits
  38. # 0x3f = - - 1 1 1 1 1 1
  39. # \ / \-/ \-/
  40. # | | +----- LB 2..1 (No memory lock features enabled)
  41. # | +--------- BLB0 2..1 (No restrictions for SPM or LPM accessing the Application section)
  42. # +--------------- BLB1 2..1 (No restrictions for SPM or LPM accessing the Boot Loader section)