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  1. #include <util/twi.h>
  2. #include <avr/io.h>
  3. #include <stdlib.h>
  4. #include <avr/interrupt.h>
  5. #include <util/twi.h>
  6. #include <stdbool.h>
  7. #include "i2c.h"
  8. #ifdef USE_I2C
  9. // Limits the amount of we wait for any one i2c transaction.
  10. // Since were running SCL line 100kHz (=> 10μs/bit), and each transactions is
  11. // 9 bits, a single transaction will take around 90μs to complete.
  12. //
  13. // (F_CPU/SCL_CLOCK) => # of μC cycles to transfer a bit
  14. // poll loop takes at least 8 clock cycles to execute
  15. #define I2C_LOOP_TIMEOUT (9+1)*(F_CPU/SCL_CLOCK)/8
  16. #define BUFFER_POS_INC() (slave_buffer_pos = (slave_buffer_pos+1)%SLAVE_BUFFER_SIZE)
  17. volatile uint8_t i2c_slave_buffer[SLAVE_BUFFER_SIZE];
  18. static volatile uint8_t slave_buffer_pos;
  19. static volatile bool slave_has_register_set = false;
  20. // Wait for an i2c operation to finish
  21. inline static
  22. void i2c_delay(void) {
  23. uint16_t lim = 0;
  24. while(!(TWCR & (1<<TWINT)) && lim < I2C_LOOP_TIMEOUT)
  25. lim++;
  26. // easier way, but will wait slightly longer
  27. // _delay_us(100);
  28. }
  29. // Setup twi to run at 100kHz
  30. void i2c_master_init(void) {
  31. // no prescaler
  32. TWSR = 0;
  33. // Set TWI clock frequency to SCL_CLOCK. Need TWBR>10.
  34. // Check datasheets for more info.
  35. TWBR = ((F_CPU/SCL_CLOCK)-16)/2;
  36. }
  37. // Start a transaction with the given i2c slave address. The direction of the
  38. // transfer is set with I2C_READ and I2C_WRITE.
  39. // returns: 0 => success
  40. // 1 => error
  41. uint8_t i2c_master_start(uint8_t address) {
  42. TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
  43. i2c_delay();
  44. // check that we started successfully
  45. if ( (TW_STATUS != TW_START) && (TW_STATUS != TW_REP_START))
  46. return 1;
  47. // send device address
  48. TWDR = address;
  49. TWCR = (1<<TWINT) | (1<<TWEN);
  50. i2c_delay();
  51. if ( (TW_STATUS != TW_MT_SLA_ACK) && (TW_STATUS != TW_MR_SLA_ACK) )
  52. return 1; // slave did not acknowledge
  53. else
  54. return 0; // success
  55. }
  56. // Finish the i2c transaction.
  57. void i2c_master_stop(void) {
  58. TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
  59. uint16_t lim = 0;
  60. while(!(TWCR & (1<<TWSTO)) && lim < I2C_LOOP_TIMEOUT)
  61. lim++;
  62. }
  63. // Write one byte to the i2c slave.
  64. // returns 0 => slave ACK
  65. // 1 => slave NACK
  66. uint8_t i2c_master_write(uint8_t data) {
  67. TWDR = data;
  68. TWCR = (1<<TWINT) | (1<<TWEN);
  69. i2c_delay();
  70. // check if the slave acknowledged us
  71. return (TW_STATUS == TW_MT_DATA_ACK) ? 0 : 1;
  72. }
  73. // Read one byte from the i2c slave. If ack=1 the slave is acknowledged,
  74. // if ack=0 the acknowledge bit is not set.
  75. // returns: byte read from i2c device
  76. uint8_t i2c_master_read(int ack) {
  77. TWCR = (1<<TWINT) | (1<<TWEN) | (ack<<TWEA);
  78. i2c_delay();
  79. return TWDR;
  80. }
  81. void i2c_reset_state(void) {
  82. TWCR = 0;
  83. }
  84. void i2c_slave_init(uint8_t address) {
  85. TWAR = address << 0; // slave i2c address
  86. // TWEN - twi enable
  87. // TWEA - enable address acknowledgement
  88. // TWINT - twi interrupt flag
  89. // TWIE - enable the twi interrupt
  90. TWCR = (1<<TWIE) | (1<<TWEA) | (1<<TWINT) | (1<<TWEN);
  91. }
  92. ISR(TWI_vect);
  93. ISR(TWI_vect) {
  94. uint8_t ack = 1;
  95. switch(TW_STATUS) {
  96. case TW_SR_SLA_ACK:
  97. // this device has been addressed as a slave receiver
  98. slave_has_register_set = false;
  99. break;
  100. case TW_SR_DATA_ACK:
  101. // this device has received data as a slave receiver
  102. // The first byte that we receive in this transaction sets the location
  103. // of the read/write location of the slaves memory that it exposes over
  104. // i2c. After that, bytes will be written at slave_buffer_pos, incrementing
  105. // slave_buffer_pos after each write.
  106. if(!slave_has_register_set) {
  107. slave_buffer_pos = TWDR;
  108. // don't acknowledge the master if this memory loctaion is out of bounds
  109. if ( slave_buffer_pos >= SLAVE_BUFFER_SIZE ) {
  110. ack = 0;
  111. slave_buffer_pos = 0;
  112. }
  113. slave_has_register_set = true;
  114. } else {
  115. i2c_slave_buffer[slave_buffer_pos] = TWDR;
  116. BUFFER_POS_INC();
  117. }
  118. break;
  119. case TW_ST_SLA_ACK:
  120. case TW_ST_DATA_ACK:
  121. // master has addressed this device as a slave transmitter and is
  122. // requesting data.
  123. TWDR = i2c_slave_buffer[slave_buffer_pos];
  124. BUFFER_POS_INC();
  125. break;
  126. case TW_BUS_ERROR: // something went wrong, reset twi state
  127. TWCR = 0;
  128. default:
  129. break;
  130. }
  131. // Reset everything, so we are ready for the next TWI interrupt
  132. TWCR |= (1<<TWIE) | (1<<TWINT) | (ack<<TWEA) | (1<<TWEN);
  133. }
  134. #endif