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  1. // Copyright 2021 Nick Brassel (@tzarc)
  2. // SPDX-License-Identifier: GPL-2.0-or-later
  3. #include "qp_internal.h"
  4. #include "qp_comms.h"
  5. #include "qp_ili9163.h"
  6. #include "qp_ili9xxx_opcodes.h"
  7. #include "qp_tft_panel.h"
  8. #ifdef QUANTUM_PAINTER_ILI9163_SPI_ENABLE
  9. # include "qp_comms_spi.h"
  10. #endif // QUANTUM_PAINTER_ILI9163_SPI_ENABLE
  11. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  12. // Common
  13. // Driver storage
  14. tft_panel_dc_reset_painter_device_t ili9163_drivers[ILI9163_NUM_DEVICES] = {0};
  15. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  16. // Initialization
  17. bool qp_ili9163_init(painter_device_t device, painter_rotation_t rotation) {
  18. // clang-format off
  19. const uint8_t ili9163_init_sequence[] = {
  20. // Command, Delay, N, Data[N]
  21. ILI9XXX_CMD_RESET, 120, 0,
  22. ILI9XXX_CMD_SLEEP_OFF, 5, 0,
  23. ILI9XXX_SET_PIX_FMT, 0, 1, 0x55,
  24. ILI9XXX_SET_GAMMA, 0, 1, 0x04,
  25. ILI9XXX_ENABLE_3_GAMMA, 0, 1, 0x01,
  26. ILI9XXX_SET_FUNCTION_CTL, 0, 2, 0xFF, 0x06,
  27. ILI9XXX_SET_PGAMMA, 0, 15, 0x36, 0x29, 0x12, 0x22, 0x1C, 0x15, 0x42, 0xB7, 0x2F, 0x13, 0x12, 0x0A, 0x11, 0x0B, 0x06,
  28. ILI9XXX_SET_NGAMMA, 0, 15, 0x09, 0x16, 0x2D, 0x0D, 0x13, 0x15, 0x40, 0x48, 0x53, 0x0C, 0x1D, 0x25, 0x2E, 0x34, 0x39,
  29. ILI9XXX_SET_FRAME_CTL_NORMAL, 0, 2, 0x08, 0x02,
  30. ILI9XXX_SET_POWER_CTL_1, 0, 2, 0x0A, 0x02,
  31. ILI9XXX_SET_POWER_CTL_2, 0, 1, 0x02,
  32. ILI9XXX_SET_VCOM_CTL_1, 0, 2, 0x50, 0x63,
  33. ILI9XXX_SET_VCOM_CTL_2, 0, 1, 0x00,
  34. ILI9XXX_CMD_PARTIAL_OFF, 0, 0,
  35. ILI9XXX_CMD_DISPLAY_ON, 20, 0
  36. };
  37. // clang-format on
  38. qp_comms_bulk_command_sequence(device, ili9163_init_sequence, sizeof(ili9163_init_sequence));
  39. // Configure the rotation (i.e. the ordering and direction of memory writes in GRAM)
  40. const uint8_t madctl[] = {
  41. [QP_ROTATION_0] = ILI9XXX_MADCTL_BGR,
  42. [QP_ROTATION_90] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MV,
  43. [QP_ROTATION_180] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MY,
  44. [QP_ROTATION_270] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MV | ILI9XXX_MADCTL_MY,
  45. };
  46. qp_comms_command_databyte(device, ILI9XXX_SET_MEM_ACS_CTL, madctl[rotation]);
  47. return true;
  48. }
  49. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  50. // Driver vtable
  51. const struct tft_panel_dc_reset_painter_driver_vtable_t ili9163_driver_vtable = {
  52. .base =
  53. {
  54. .init = qp_ili9163_init,
  55. .power = qp_tft_panel_power,
  56. .clear = qp_tft_panel_clear,
  57. .flush = qp_tft_panel_flush,
  58. .pixdata = qp_tft_panel_pixdata,
  59. .viewport = qp_tft_panel_viewport,
  60. .palette_convert = qp_tft_panel_palette_convert,
  61. .append_pixels = qp_tft_panel_append_pixels,
  62. },
  63. .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped,
  64. .num_window_bytes = 2,
  65. .swap_window_coords = false,
  66. .opcodes =
  67. {
  68. .display_on = ILI9XXX_CMD_DISPLAY_ON,
  69. .display_off = ILI9XXX_CMD_DISPLAY_OFF,
  70. .set_column_address = ILI9XXX_SET_COL_ADDR,
  71. .set_row_address = ILI9XXX_SET_PAGE_ADDR,
  72. .enable_writes = ILI9XXX_SET_MEM,
  73. },
  74. };
  75. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  76. // SPI
  77. #ifdef QUANTUM_PAINTER_ILI9163_SPI_ENABLE
  78. // Factory function for creating a handle to the ILI9163 device
  79. painter_device_t qp_ili9163_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) {
  80. for (uint32_t i = 0; i < ILI9163_NUM_DEVICES; ++i) {
  81. tft_panel_dc_reset_painter_device_t *driver = &ili9163_drivers[i];
  82. if (!driver->base.driver_vtable) {
  83. driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9163_driver_vtable;
  84. driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
  85. driver->base.panel_width = panel_width;
  86. driver->base.panel_height = panel_height;
  87. driver->base.rotation = QP_ROTATION_0;
  88. driver->base.offset_x = 0;
  89. driver->base.offset_y = 0;
  90. driver->base.native_bits_per_pixel = 16; // RGB565
  91. // SPI and other pin configuration
  92. driver->base.comms_config = &driver->spi_dc_reset_config;
  93. driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin;
  94. driver->spi_dc_reset_config.spi_config.divisor = spi_divisor;
  95. driver->spi_dc_reset_config.spi_config.lsb_first = false;
  96. driver->spi_dc_reset_config.spi_config.mode = spi_mode;
  97. driver->spi_dc_reset_config.dc_pin = dc_pin;
  98. driver->spi_dc_reset_config.reset_pin = reset_pin;
  99. return (painter_device_t)driver;
  100. }
  101. }
  102. return NULL;
  103. }
  104. #endif // QUANTUM_PAINTER_ILI9163_SPI_ENABLE
  105. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////