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  1. /* Copyright (C) 2019 Elia Ritterbusch
  2. +
  3. * This program is free software: you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License as published by
  5. * the Free Software Foundation, either version 3 of the License, or
  6. * (at your option) any later version.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <https://www.gnu.org/licenses/>.
  15. */
  16. /* Library made by: g4lvanix
  17. * GitHub repository: https://github.com/g4lvanix/I2C-slave-lib
  18. */
  19. #include <stddef.h>
  20. #include <avr/io.h>
  21. #include <util/twi.h>
  22. #include <avr/interrupt.h>
  23. #include <stdbool.h>
  24. #include "i2c_slave.h"
  25. #if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  26. # include "transactions.h"
  27. static volatile bool is_callback_executor = false;
  28. #endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  29. volatile uint8_t i2c_slave_reg[I2C_SLAVE_REG_COUNT];
  30. static volatile uint8_t buffer_address;
  31. static volatile bool slave_has_register_set = false;
  32. void i2c_slave_init(uint8_t address) {
  33. // load address into TWI address register
  34. TWAR = address;
  35. // set the TWCR to enable address matching and enable TWI, clear TWINT, enable TWI interrupt
  36. TWCR = (1 << TWIE) | (1 << TWEA) | (1 << TWINT) | (1 << TWEN);
  37. }
  38. void i2c_slave_stop(void) {
  39. // clear acknowledge and enable bits
  40. TWCR &= ~((1 << TWEA) | (1 << TWEN));
  41. }
  42. ISR(TWI_vect) {
  43. uint8_t ack = 1;
  44. switch (TW_STATUS) {
  45. case TW_SR_SLA_ACK:
  46. // The device is now a slave receiver
  47. slave_has_register_set = false;
  48. #if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  49. is_callback_executor = false;
  50. #endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  51. break;
  52. case TW_SR_DATA_ACK:
  53. // This device is a slave receiver and has received data
  54. // First byte is the location then the bytes will be writen in buffer with auto-increment
  55. if (!slave_has_register_set) {
  56. buffer_address = TWDR;
  57. if (buffer_address >= I2C_SLAVE_REG_COUNT) { // address out of bounds dont ack
  58. ack = 0;
  59. buffer_address = 0;
  60. }
  61. slave_has_register_set = true; // address has been received now fill in buffer
  62. #if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  63. // Work out if we're attempting to execute a callback
  64. is_callback_executor = buffer_address == split_transaction_table[I2C_EXECUTE_CALLBACK].initiator2target_offset;
  65. #endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  66. } else {
  67. i2c_slave_reg[buffer_address] = TWDR;
  68. buffer_address++;
  69. #if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  70. // If we're intending to execute a transaction callback, do so, as we've just received the transaction ID
  71. if (is_callback_executor) {
  72. split_transaction_desc_t *trans = &split_transaction_table[split_shmem->transaction_id];
  73. if (trans->slave_callback) {
  74. trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans));
  75. }
  76. }
  77. #endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
  78. }
  79. break;
  80. case TW_ST_SLA_ACK:
  81. case TW_ST_DATA_ACK:
  82. // This device is a slave transmitter and master has requested data
  83. TWDR = i2c_slave_reg[buffer_address];
  84. buffer_address++;
  85. break;
  86. case TW_BUS_ERROR:
  87. // We got an error, reset i2c
  88. TWCR = 0;
  89. default:
  90. break;
  91. }
  92. // Reset i2c state machine to be ready for next interrupt
  93. TWCR |= (1 << TWIE) | (1 << TWINT) | (ack << TWEA) | (1 << TWEN);
  94. }