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  1. /* Copyright 2018 Jack Humbert
  2. * Copyright 2018 Yiancar
  3. *
  4. * This program is free software: you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation, either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /* This library is only valid for STM32 processors.
  18. * This library follows the convention of the AVR i2c_master library.
  19. * As a result addresses are expected to be already shifted (addr << 1).
  20. * I2CD1 is the default driver which corresponds to pins B6 and B7. This
  21. * can be changed.
  22. * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
  23. * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. Pins B6 and B7 are used
  24. * but using any other I2C pins should be trivial.
  25. */
  26. #ifdef RGB_MATRIX_ENABLE
  27. #include "quantum.h"
  28. #include "i2c_master.h"
  29. #include <string.h>
  30. #include <hal.h>
  31. static uint8_t i2c_address;
  32. I2CDriver *drivers[I2C_COUNT];
  33. static const I2CConfig i2cconfig = {
  34. #if defined(USE_I2CV1_CONTRIB)
  35. I2C1_CLOCK_SPEED,
  36. #elif defined(USE_I2CV1)
  37. I2C1_OPMODE,
  38. I2C1_CLOCK_SPEED,
  39. I2C1_DUTY_CYCLE,
  40. #else
  41. // This configures the I2C clock to 400khz assuming a 72Mhz clock
  42. // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
  43. STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
  44. #endif
  45. };
  46. static i2c_status_t chibios_to_qmk(const msg_t* status) {
  47. switch (*status) {
  48. case I2C_NO_ERROR:
  49. return I2C_STATUS_SUCCESS;
  50. case I2C_TIMEOUT:
  51. return I2C_STATUS_TIMEOUT;
  52. // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
  53. default:
  54. return I2C_STATUS_ERROR;
  55. }
  56. }
  57. __attribute__((weak)) void i2c_init(I2CDriver *driver, ioportid_t scl_port, ioportid_t sda_port, iopadid_t scl_pad, iopadid_t sda_pad) {
  58. static uint8_t index = 0;
  59. if (index < I2C_COUNT) {
  60. // Try releasing special pins for a short time
  61. palSetPadMode(scl_port, scl_pad, PAL_MODE_INPUT);
  62. palSetPadMode(sda_port, sda_pad, PAL_MODE_INPUT);
  63. chThdSleepMilliseconds(10);
  64. #if defined(USE_GPIOV1)
  65. palSetPadMode(scl_port, scl_pad, I2C1_SCL_PAL_MODE);
  66. palSetPadMode(sda_port, sda_pad, I2C1_SDA_PAL_MODE);
  67. #else
  68. palSetPadMode(scl_port, scl_pad, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
  69. palSetPadMode(sda_port, sda_pad, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
  70. #endif
  71. drivers[index++] = driver;
  72. }
  73. }
  74. i2c_status_t i2c_start(uint8_t index, uint8_t address) {
  75. if(index >= I2C_COUNT) {
  76. return I2C_STATUS_ERROR;
  77. }
  78. i2c_address = address;
  79. i2cStart(drivers[index], &i2cconfig);
  80. return I2C_STATUS_SUCCESS;
  81. }
  82. i2c_status_t i2c_transmit(uint8_t index, uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
  83. if(index >= I2C_COUNT) {
  84. return I2C_STATUS_ERROR;
  85. }
  86. i2c_address = address;
  87. i2cStart(drivers[index], &i2cconfig);
  88. msg_t status = i2cMasterTransmitTimeout(drivers[index], (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
  89. return chibios_to_qmk(&status);
  90. }
  91. i2c_status_t i2c_receive(uint8_t index, uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
  92. if(index >= I2C_COUNT) {
  93. return I2C_STATUS_ERROR;
  94. }
  95. i2c_address = address;
  96. i2cStart(drivers[index], &i2cconfig);
  97. msg_t status = i2cMasterReceiveTimeout(drivers[index], (i2c_address >> 1), data, length, TIME_MS2I(timeout));
  98. return chibios_to_qmk(&status);
  99. }
  100. i2c_status_t i2c_writeReg(uint8_t index, uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
  101. if(index >= I2C_COUNT) {
  102. return I2C_STATUS_ERROR;
  103. }
  104. i2c_address = devaddr;
  105. i2cStart(drivers[index], &i2cconfig);
  106. uint8_t complete_packet[length + 1];
  107. for (uint8_t i = 0; i < length; i++) {
  108. complete_packet[i + 1] = data[i];
  109. }
  110. complete_packet[0] = regaddr;
  111. msg_t status = i2cMasterTransmitTimeout(drivers[index], (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
  112. return chibios_to_qmk(&status);
  113. }
  114. i2c_status_t i2c_readReg(uint8_t index, uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
  115. if(index >= I2C_COUNT) {
  116. return I2C_STATUS_ERROR;
  117. }
  118. i2c_address = devaddr;
  119. i2cStart(drivers[index], &i2cconfig);
  120. msg_t status = i2cMasterTransmitTimeout(drivers[index], (i2c_address >> 1), &regaddr, 1, data, length, TIME_MS2I(timeout));
  121. return chibios_to_qmk(&status);
  122. }
  123. void i2c_stop(uint8_t index) {
  124. if(index < I2C_COUNT) {
  125. i2cStop(drivers[index]);
  126. }
  127. }
  128. #endif