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  1. /*************************************************************************
  2. Title: Interrupt UART library with receive/transmit circular buffers
  3. Author: Andy Gock
  4. Software: AVR-GCC 4.1, AVR Libc 1.4
  5. Hardware: any AVR with built-in UART, tested on AT90S8515 & ATmega8 at 4 Mhz
  6. License: GNU General Public License
  7. Usage: see README.md and Doxygen manual
  8. Based on original library by Peter Fluery, Tim Sharpe, Nicholas Zambetti.
  9. https://github.com/andygock/avr-uart
  10. Updated UART library (this one) by Andy Gock
  11. https://github.com/andygock/avr-uart
  12. Based on updated UART library (this one) by Tim Sharpe
  13. http://beaststwo.org/avr-uart/index.shtml
  14. Based on original library by Peter Fluery
  15. http://homepage.hispeed.ch/peterfleury/avr-software.html
  16. *************************************************************************/
  17. /*************************************************************************
  18. LICENSE:
  19. Copyright (C) 2012 Andy Gock
  20. Copyright (C) 2006 Peter Fleury
  21. This program is free software; you can redistribute it and/or modify
  22. it under the terms of the GNU General Public License as published by
  23. the Free Software Foundation; either version 2 of the License, or
  24. any later version.
  25. This program is distributed in the hope that it will be useful,
  26. but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. GNU General Public License for more details.
  29. *************************************************************************/
  30. /************************************************************************
  31. uart_available, uart_flush, uart1_available, and uart1_flush functions
  32. were adapted from the Arduino HardwareSerial.h library by Tim Sharpe on
  33. 11 Jan 2009. The license info for HardwareSerial.h is as follows:
  34. HardwareSerial.cpp - Hardware serial library for Wiring
  35. Copyright (c) 2006 Nicholas Zambetti. All right reserved.
  36. This library is free software; you can redistribute it and/or
  37. modify it under the terms of the GNU Lesser General Public
  38. License as published by the Free Software Foundation; either
  39. version 2.1 of the License, or (at your option) any later version.
  40. This library is distributed in the hope that it will be useful,
  41. but WITHOUT ANY WARRANTY; without even the implied warranty of
  42. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  43. Lesser General Public License for more details.
  44. You should have received a copy of the GNU Lesser General Public
  45. License along with this library; if not, write to the Free Software
  46. Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  47. Modified 23 November 2006 by David A. Mellis
  48. ************************************************************************/
  49. /************************************************************************
  50. Changelog for modifications made by Tim Sharpe, starting with the current
  51. library version on his Web site as of 05/01/2009.
  52. Date Description
  53. =========================================================================
  54. 05/11/2009 Changed all existing UARTx_RECEIVE_INTERRUPT and UARTx_TRANSMIT_INTERRUPT
  55. macros to use the "_vect" format introduced in AVR-Libc
  56. v1.4.0. Had to split the 3290 and 6490 out of their existing
  57. macro due to an inconsistency in the UART0_RECEIVE_INTERRUPT
  58. vector name (seems like a typo: USART_RX_vect for the 3290/6490
  59. vice USART0_RX_vect for the others in the macro).
  60. Verified all existing macro register names against the device
  61. header files in AVR-Libc v1.6.6 to catch any inconsistencies.
  62. 05/12/2009 Added support for 48P, 88P, 168P, and 328P by adding them to the
  63. existing 48/88/168 macro.
  64. Added Arduino-style available() and flush() functions for both
  65. supported UARTs. Really wanted to keep them out of the library, so
  66. that it would be as close as possible to Peter Fleury's original
  67. library, but has scoping issues accessing internal variables from
  68. another program. Go C!
  69. 05/13/2009 Changed Interrupt Service Routine label from the old "SIGNAL" to
  70. the "ISR" format introduced in AVR-Libc v1.4.0.
  71. ************************************************************************/
  72. #include <avr/io.h>
  73. #include <avr/interrupt.h>
  74. #include <avr/pgmspace.h>
  75. #include <util/atomic.h>
  76. #include "usart.h"
  77. /*
  78. * constants and macros
  79. */
  80. /* size of RX/TX buffers */
  81. #define UART_RX0_BUFFER_MASK (UART_RX0_BUFFER_SIZE - 1)
  82. #define UART_RX1_BUFFER_MASK (UART_RX1_BUFFER_SIZE - 1)
  83. #define UART_RX2_BUFFER_MASK (UART_RX2_BUFFER_SIZE - 1)
  84. #define UART_RX3_BUFFER_MASK (UART_RX3_BUFFER_SIZE - 1)
  85. #define UART_TX0_BUFFER_MASK (UART_TX0_BUFFER_SIZE - 1)
  86. #define UART_TX1_BUFFER_MASK (UART_TX1_BUFFER_SIZE - 1)
  87. #define UART_TX2_BUFFER_MASK (UART_TX2_BUFFER_SIZE - 1)
  88. #define UART_TX3_BUFFER_MASK (UART_TX3_BUFFER_SIZE - 1)
  89. #if (UART_RX0_BUFFER_SIZE & UART_RX0_BUFFER_MASK)
  90. #error RX0 buffer size is not a power of 2
  91. #endif
  92. #if (UART_TX0_BUFFER_SIZE & UART_TX0_BUFFER_MASK)
  93. #error TX0 buffer size is not a power of 2
  94. #endif
  95. #if (UART_RX1_BUFFER_SIZE & UART_RX1_BUFFER_MASK)
  96. #error RX1 buffer size is not a power of 2
  97. #endif
  98. #if (UART_TX1_BUFFER_SIZE & UART_TX1_BUFFER_MASK)
  99. #error TX1 buffer size is not a power of 2
  100. #endif
  101. #if (UART_RX2_BUFFER_SIZE & UART_RX2_BUFFER_MASK)
  102. #error RX2 buffer size is not a power of 2
  103. #endif
  104. #if (UART_TX2_BUFFER_SIZE & UART_TX2_BUFFER_MASK)
  105. #error TX2 buffer size is not a power of 2
  106. #endif
  107. #if (UART_RX3_BUFFER_SIZE & UART_RX3_BUFFER_MASK)
  108. #error RX3 buffer size is not a power of 2
  109. #endif
  110. #if (UART_TX3_BUFFER_SIZE & UART_TX3_BUFFER_MASK)
  111. #error TX3 buffer size is not a power of 2
  112. #endif
  113. #if defined(__AVR_AT90S2313__) \
  114. || defined(__AVR_AT90S4414__) || defined(__AVR_AT90S4434__) \
  115. || defined(__AVR_AT90S8515__) || defined(__AVR_AT90S8535__) \
  116. || defined(__AVR_ATmega103__)
  117. /* old AVR classic or ATmega103 with one UART */
  118. #define AT90_UART
  119. #define UART0_RECEIVE_INTERRUPT UART_RX_vect
  120. #define UART0_TRANSMIT_INTERRUPT UART_UDRE_vect
  121. #define UART0_STATUS USR
  122. #define UART0_CONTROL UCR
  123. #define UART0_DATA UDR
  124. #define UART0_UDRIE UDRIE
  125. #elif defined(__AVR_AT90S2333__) || defined(__AVR_AT90S4433__)
  126. /* old AVR classic with one UART */
  127. #define AT90_UART
  128. #define UART0_RECEIVE_INTERRUPT UART_RX_vect
  129. #define UART0_TRANSMIT_INTERRUPT UART_UDRE_vect
  130. #define UART0_STATUS UCSRA
  131. #define UART0_CONTROL UCSRB
  132. #define UART0_DATA UDR
  133. #define UART0_UDRIE UDRIE
  134. #elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__) \
  135. || defined(__AVR_ATmega323__)
  136. /* ATmega with one USART */
  137. #define ATMEGA_USART
  138. #define UART0_RECEIVE_INTERRUPT USART_RXC_vect
  139. #define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
  140. #define UART0_STATUS UCSRA
  141. #define UART0_CONTROL UCSRB
  142. #define UART0_DATA UDR
  143. #define UART0_UDRIE UDRIE
  144. #elif defined(__AVR_ATmega8U2__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega16U4__) || \
  145. defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega32U6__)
  146. /* ATmega with one USART, but is called USART1 (untested) */
  147. #define ATMEGA_USART1
  148. #define UART1_RECEIVE_INTERRUPT USART1_RX_vect
  149. #define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
  150. #define UART1_STATUS UCSR1A
  151. #define UART1_CONTROL UCSR1B
  152. #define UART1_DATA UDR1
  153. #define UART1_UDRIE UDRIE1
  154. #elif defined(__AVR_ATmega8515__) || defined(__AVR_ATmega8535__)
  155. /* ATmega with one USART */
  156. #define ATMEGA_USART
  157. #define UART0_RECEIVE_INTERRUPT USART_RX_vect
  158. #define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
  159. #define UART0_STATUS UCSRA
  160. #define UART0_CONTROL UCSRB
  161. #define UART0_DATA UDR
  162. #define UART0_UDRIE UDRIE
  163. #elif defined(__AVR_ATmega163__)
  164. /* ATmega163 with one UART */
  165. #define ATMEGA_UART
  166. #define UART0_RECEIVE_INTERRUPT UART_RX_vect
  167. #define UART0_TRANSMIT_INTERRUPT UART_UDRE_vect
  168. #define UART0_STATUS UCSRA
  169. #define UART0_CONTROL UCSRB
  170. #define UART0_DATA UDR
  171. #define UART0_UDRIE UDRIE
  172. #elif defined(__AVR_ATmega162__)
  173. /* ATmega with two USART */
  174. #define ATMEGA_USART0
  175. #define ATMEGA_USART1
  176. #define UART0_RECEIVE_INTERRUPT USART0_RXC_vect
  177. #define UART1_RECEIVE_INTERRUPT USART1_RXC_vect
  178. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  179. #define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
  180. #define UART0_STATUS UCSR0A
  181. #define UART0_CONTROL UCSR0B
  182. #define UART0_DATA UDR0
  183. #define UART0_UDRIE UDRIE0
  184. #define UART1_STATUS UCSR1A
  185. #define UART1_CONTROL UCSR1B
  186. #define UART1_DATA UDR1
  187. #define UART1_UDRIE UDRIE1
  188. #elif defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__)
  189. /* ATmega with two USART */
  190. #define ATMEGA_USART0
  191. #define ATMEGA_USART1
  192. #define UART0_RECEIVE_INTERRUPT USART0_RX_vect
  193. #define UART1_RECEIVE_INTERRUPT USART1_RX_vect
  194. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  195. #define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
  196. #define UART0_STATUS UCSR0A
  197. #define UART0_CONTROL UCSR0B
  198. #define UART0_DATA UDR0
  199. #define UART0_UDRIE UDRIE0
  200. #define UART1_STATUS UCSR1A
  201. #define UART1_CONTROL UCSR1B
  202. #define UART1_DATA UDR1
  203. #define UART1_UDRIE UDRIE1
  204. #elif defined(__AVR_ATmega161__)
  205. /* ATmega with UART */
  206. #error "AVR ATmega161 currently not supported by this libaray !"
  207. #elif defined(__AVR_ATmega169__)
  208. /* ATmega with one USART */
  209. #define ATMEGA_USART
  210. #define UART0_RECEIVE_INTERRUPT USART0_RX_vect
  211. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  212. #define UART0_STATUS UCSRA
  213. #define UART0_CONTROL UCSRB
  214. #define UART0_DATA UDR
  215. #define UART0_UDRIE UDRIE
  216. #elif defined(__AVR_ATmega48__) ||defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__) || \
  217. defined(__AVR_ATmega48P__) ||defined(__AVR_ATmega88P__) || defined(__AVR_ATmega168P__) || \
  218. defined(__AVR_ATmega328P__)
  219. /* TLS-Added 48P/88P/168P/328P */
  220. /* ATmega with one USART */
  221. #define ATMEGA_USART0
  222. #define UART0_RECEIVE_INTERRUPT USART_RX_vect
  223. #define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
  224. #define UART0_STATUS UCSR0A
  225. #define UART0_CONTROL UCSR0B
  226. #define UART0_DATA UDR0
  227. #define UART0_UDRIE UDRIE0
  228. #elif defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny2313A__) || defined(__AVR_ATtiny4313__)
  229. #define ATMEGA_USART
  230. #define UART0_RECEIVE_INTERRUPT USART_RX_vect
  231. #define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
  232. #define UART0_STATUS UCSRA
  233. #define UART0_CONTROL UCSRB
  234. #define UART0_DATA UDR
  235. #define UART0_UDRIE UDRIE
  236. #elif defined(__AVR_ATmega329__) ||\
  237. defined(__AVR_ATmega649__) ||\
  238. defined(__AVR_ATmega325__) ||defined(__AVR_ATmega3250__) ||\
  239. defined(__AVR_ATmega645__) ||defined(__AVR_ATmega6450__)
  240. /* ATmega with one USART */
  241. #define ATMEGA_USART0
  242. #define UART0_RECEIVE_INTERRUPT USART0_RX_vect
  243. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  244. #define UART0_STATUS UCSR0A
  245. #define UART0_CONTROL UCSR0B
  246. #define UART0_DATA UDR0
  247. #define UART0_UDRIE UDRIE0
  248. #elif defined(__AVR_ATmega3290__) ||\
  249. defined(__AVR_ATmega6490__)
  250. /* TLS-Separated these two from the previous group because of inconsistency in the USART_RX */
  251. /* ATmega with one USART */
  252. #define ATMEGA_USART0
  253. #define UART0_RECEIVE_INTERRUPT USART_RX_vect
  254. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  255. #define UART0_STATUS UCSR0A
  256. #define UART0_CONTROL UCSR0B
  257. #define UART0_DATA UDR0
  258. #define UART0_UDRIE UDRIE0
  259. #elif defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega640__)
  260. /* ATmega with four USART */
  261. #define ATMEGA_USART0
  262. #define ATMEGA_USART1
  263. #define ATMEGA_USART2
  264. #define ATMEGA_USART3
  265. #define UART0_RECEIVE_INTERRUPT USART0_RX_vect
  266. #define UART1_RECEIVE_INTERRUPT USART1_RX_vect
  267. #define UART2_RECEIVE_INTERRUPT USART2_RX_vect
  268. #define UART3_RECEIVE_INTERRUPT USART3_RX_vect
  269. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  270. #define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
  271. #define UART2_TRANSMIT_INTERRUPT USART2_UDRE_vect
  272. #define UART3_TRANSMIT_INTERRUPT USART3_UDRE_vect
  273. #define UART0_STATUS UCSR0A
  274. #define UART0_CONTROL UCSR0B
  275. #define UART0_DATA UDR0
  276. #define UART0_UDRIE UDRIE0
  277. #define UART1_STATUS UCSR1A
  278. #define UART1_CONTROL UCSR1B
  279. #define UART1_DATA UDR1
  280. #define UART1_UDRIE UDRIE1
  281. #define UART2_STATUS UCSR2A
  282. #define UART2_CONTROL UCSR2B
  283. #define UART2_DATA UDR2
  284. #define UART2_UDRIE UDRIE2
  285. #define UART3_STATUS UCSR3A
  286. #define UART3_CONTROL UCSR3B
  287. #define UART3_DATA UDR3
  288. #define UART3_UDRIE UDRIE3
  289. #elif defined(__AVR_ATmega644__)
  290. /* ATmega with one USART */
  291. #define ATMEGA_USART0
  292. #define UART0_RECEIVE_INTERRUPT USART0_RX_vect
  293. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  294. #define UART0_STATUS UCSR0A
  295. #define UART0_CONTROL UCSR0B
  296. #define UART0_DATA UDR0
  297. #define UART0_UDRIE UDRIE0
  298. #elif defined(__AVR_ATmega164P__) || defined(__AVR_ATmega324P__) || defined(__AVR_ATmega644P__) || \
  299. defined(__AVR_ATmega1284P__)
  300. /* ATmega with two USART */
  301. #define ATMEGA_USART0
  302. #define ATMEGA_USART1
  303. #define UART0_RECEIVE_INTERRUPT USART0_RX_vect
  304. #define UART1_RECEIVE_INTERRUPT USART1_RX_vect
  305. #define UART0_TRANSMIT_INTERRUPT USART0_UDRE_vect
  306. #define UART1_TRANSMIT_INTERRUPT USART1_UDRE_vect
  307. #define UART0_STATUS UCSR0A
  308. #define UART0_CONTROL UCSR0B
  309. #define UART0_DATA UDR0
  310. #define UART0_UDRIE UDRIE0
  311. #define UART1_STATUS UCSR1A
  312. #define UART1_CONTROL UCSR1B
  313. #define UART1_DATA UDR1
  314. #define UART1_UDRIE UDRIE1
  315. #else
  316. #error "no UART definition for MCU available"
  317. #endif
  318. /*
  319. * Module global variables
  320. */
  321. #if defined(USART0_ENABLED)
  322. #if defined(ATMEGA_USART) || defined(ATMEGA_USART0)
  323. static volatile uint8_t UART_TxBuf[UART_TX0_BUFFER_SIZE];
  324. static volatile uint8_t UART_RxBuf[UART_RX0_BUFFER_SIZE];
  325. #if defined(USART0_LARGE_BUFFER)
  326. static volatile uint16_t UART_TxHead;
  327. static volatile uint16_t UART_TxTail;
  328. static volatile uint16_t UART_RxHead;
  329. static volatile uint16_t UART_RxTail;
  330. static volatile uint8_t UART_LastRxError;
  331. #else
  332. static volatile uint8_t UART_TxHead;
  333. static volatile uint8_t UART_TxTail;
  334. static volatile uint8_t UART_RxHead;
  335. static volatile uint8_t UART_RxTail;
  336. static volatile uint8_t UART_LastRxError;
  337. #endif
  338. #endif
  339. #endif
  340. #if defined(USART1_ENABLED)
  341. #if defined(ATMEGA_USART1)
  342. static volatile uint8_t UART1_TxBuf[UART_TX1_BUFFER_SIZE];
  343. static volatile uint8_t UART1_RxBuf[UART_RX1_BUFFER_SIZE];
  344. #if defined(USART1_LARGE_BUFFER)
  345. static volatile uint16_t UART1_TxHead;
  346. static volatile uint16_t UART1_TxTail;
  347. static volatile uint16_t UART1_RxHead;
  348. static volatile uint16_t UART1_RxTail;
  349. static volatile uint8_t UART1_LastRxError;
  350. #else
  351. static volatile uint8_t UART1_TxHead;
  352. static volatile uint8_t UART1_TxTail;
  353. static volatile uint8_t UART1_RxHead;
  354. static volatile uint8_t UART1_RxTail;
  355. static volatile uint8_t UART1_LastRxError;
  356. #endif
  357. #endif
  358. #endif
  359. #if defined(USART2_ENABLED)
  360. #if defined(ATMEGA_USART2)
  361. static volatile uint8_t UART2_TxBuf[UART_TX2_BUFFER_SIZE];
  362. static volatile uint8_t UART2_RxBuf[UART_RX2_BUFFER_SIZE];
  363. #if defined(USART2_LARGE_BUFFER)
  364. static volatile uint16_t UART2_TxHead;
  365. static volatile uint16_t UART2_TxTail;
  366. static volatile uint16_t UART2_RxHead;
  367. static volatile uint16_t UART2_RxTail;
  368. static volatile uint8_t UART2_LastRxError;
  369. #else
  370. static volatile uint8_t UART2_TxHead;
  371. static volatile uint8_t UART2_TxTail;
  372. static volatile uint8_t UART2_RxHead;
  373. static volatile uint8_t UART2_RxTail;
  374. static volatile uint8_t UART2_LastRxError;
  375. #endif
  376. #endif
  377. #endif
  378. #if defined(USART3_ENABLED)
  379. #if defined(ATMEGA_USART3)
  380. static volatile uint8_t UART3_TxBuf[UART_TX3_BUFFER_SIZE];
  381. static volatile uint8_t UART3_RxBuf[UART_RX3_BUFFER_SIZE];
  382. #if defined(USART3_LARGE_BUFFER)
  383. static volatile uint16_t UART3_TxHead;
  384. static volatile uint16_t UART3_TxTail;
  385. static volatile uint16_t UART3_RxHead;
  386. static volatile uint16_t UART3_RxTail;
  387. static volatile uint8_t UART3_LastRxError;
  388. #else
  389. static volatile uint8_t UART3_TxHead;
  390. static volatile uint8_t UART3_TxTail;
  391. static volatile uint8_t UART3_RxHead;
  392. static volatile uint8_t UART3_RxTail;
  393. static volatile uint8_t UART3_LastRxError;
  394. #endif
  395. #endif
  396. #endif
  397. #if defined(USART0_ENABLED)
  398. #if defined(AT90_UART) || defined(ATMEGA_USART) || defined(ATMEGA_USART0)
  399. ISR(UART0_RECEIVE_INTERRUPT)
  400. /*************************************************************************
  401. Function: UART Receive Complete interrupt
  402. Purpose: called when the UART has received a character
  403. **************************************************************************/
  404. {
  405. uint16_t tmphead;
  406. uint8_t data;
  407. uint8_t usr;
  408. uint8_t lastRxError;
  409. /* read UART status register and UART data register */
  410. usr = UART0_STATUS;
  411. data = UART0_DATA;
  412. /* */
  413. #if defined(AT90_UART)
  414. lastRxError = (usr & (_BV(FE)|_BV(DOR)));
  415. #elif defined(ATMEGA_USART)
  416. lastRxError = (usr & (_BV(FE)|_BV(DOR)));
  417. #elif defined(ATMEGA_USART0)
  418. lastRxError = (usr & (_BV(FE0)|_BV(DOR0)));
  419. #elif defined (ATMEGA_UART)
  420. lastRxError = (usr & (_BV(FE)|_BV(DOR)));
  421. #endif
  422. /* calculate buffer index */
  423. tmphead = (UART_RxHead + 1) & UART_RX0_BUFFER_MASK;
  424. if (tmphead == UART_RxTail) {
  425. /* error: receive buffer overflow */
  426. lastRxError = UART_BUFFER_OVERFLOW >> 8;
  427. } else {
  428. /* store new index */
  429. UART_RxHead = tmphead;
  430. /* store received data in buffer */
  431. UART_RxBuf[tmphead] = data;
  432. }
  433. UART_LastRxError = lastRxError;
  434. }
  435. ISR(UART0_TRANSMIT_INTERRUPT)
  436. /*************************************************************************
  437. Function: UART Data Register Empty interrupt
  438. Purpose: called when the UART is ready to transmit the next byte
  439. **************************************************************************/
  440. {
  441. uint16_t tmptail;
  442. if (UART_TxHead != UART_TxTail) {
  443. /* calculate and store new buffer index */
  444. tmptail = (UART_TxTail + 1) & UART_TX0_BUFFER_MASK;
  445. UART_TxTail = tmptail;
  446. /* get one byte from buffer and write it to UART */
  447. UART0_DATA = UART_TxBuf[tmptail]; /* start transmission */
  448. } else {
  449. /* tx buffer empty, disable UDRE interrupt */
  450. UART0_CONTROL &= ~_BV(UART0_UDRIE);
  451. }
  452. }
  453. /*************************************************************************
  454. Function: uart0_init()
  455. Purpose: initialize UART and set baudrate
  456. Input: baudrate using macro UART_BAUD_SELECT()
  457. Returns: none
  458. **************************************************************************/
  459. void uart0_init(uint16_t baudrate)
  460. {
  461. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  462. UART_TxHead = 0;
  463. UART_TxTail = 0;
  464. UART_RxHead = 0;
  465. UART_RxTail = 0;
  466. }
  467. #if defined(AT90_UART)
  468. /* set baud rate */
  469. UBRR = (uint8_t) baudrate;
  470. /* enable UART receiver and transmitter and receive complete interrupt */
  471. UART0_CONTROL = _BV(RXCIE)|_BV(RXEN)|_BV(TXEN);
  472. #elif defined (ATMEGA_USART)
  473. /* Set baud rate */
  474. if (baudrate & 0x8000) {
  475. UART0_STATUS = (1<<U2X); //Enable 2x speed
  476. baudrate &= ~0x8000;
  477. }
  478. UBRRH = (uint8_t) (baudrate>>8);
  479. UBRRL = (uint8_t) baudrate;
  480. /* Enable USART receiver and transmitter and receive complete interrupt */
  481. UART0_CONTROL = _BV(RXCIE)|(1<<RXEN)|(1<<TXEN);
  482. /* Set frame format: asynchronous, 8data, no parity, 1stop bit */
  483. #ifdef URSEL
  484. UCSRC = (1<<URSEL)|(3<<UCSZ0);
  485. #else
  486. UCSRC = (3<<UCSZ0);
  487. #endif
  488. #elif defined (ATMEGA_USART0)
  489. /* Set baud rate */
  490. if (baudrate & 0x8000) {
  491. UART0_STATUS = (1<<U2X0); //Enable 2x speed
  492. baudrate &= ~0x8000;
  493. }
  494. UBRR0H = (uint8_t)(baudrate>>8);
  495. UBRR0L = (uint8_t) baudrate;
  496. /* Enable USART receiver and transmitter and receive complete interrupt */
  497. UART0_CONTROL = _BV(RXCIE0)|(1<<RXEN0)|(1<<TXEN0);
  498. /* Set frame format: asynchronous, 8data, no parity, 1stop bit */
  499. #ifdef URSEL0
  500. UCSR0C = (1<<URSEL0)|(3<<UCSZ00);
  501. #else
  502. UCSR0C = (3<<UCSZ00);
  503. #endif
  504. #elif defined (ATMEGA_UART)
  505. /* set baud rate */
  506. if (baudrate & 0x8000) {
  507. UART0_STATUS = (1<<U2X); //Enable 2x speed
  508. baudrate &= ~0x8000;
  509. }
  510. UBRRHI = (uint8_t) (baudrate>>8);
  511. UBRR = (uint8_t) baudrate;
  512. /* Enable UART receiver and transmitter and receive complete interrupt */
  513. UART0_CONTROL = _BV(RXCIE)|(1<<RXEN)|(1<<TXEN);
  514. #endif
  515. } /* uart0_init */
  516. /*************************************************************************
  517. Function: uart0_getc()
  518. Purpose: return byte from ringbuffer
  519. Returns: lower byte: received byte from ringbuffer
  520. higher byte: last receive error
  521. **************************************************************************/
  522. uint16_t uart0_getc(void)
  523. {
  524. uint16_t tmptail;
  525. uint8_t data;
  526. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  527. if (UART_RxHead == UART_RxTail) {
  528. return UART_NO_DATA; /* no data available */
  529. }
  530. }
  531. /* calculate / store buffer index */
  532. tmptail = (UART_RxTail + 1) & UART_RX0_BUFFER_MASK;
  533. UART_RxTail = tmptail;
  534. /* get data from receive buffer */
  535. data = UART_RxBuf[tmptail];
  536. return (UART_LastRxError << 8) + data;
  537. } /* uart0_getc */
  538. /*************************************************************************
  539. Function: uart0_peek()
  540. Purpose: Returns the next byte (character) of incoming UART data without
  541. removing it from the ring buffer. That is, successive calls to
  542. uartN_peek() will return the same character, as will the next
  543. call to uartN_getc()
  544. Returns: lower byte: next byte in ring buffer
  545. higher byte: last receive error
  546. **************************************************************************/
  547. uint16_t uart0_peek(void)
  548. {
  549. uint16_t tmptail;
  550. uint8_t data;
  551. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  552. if (UART_RxHead == UART_RxTail) {
  553. return UART_NO_DATA; /* no data available */
  554. }
  555. }
  556. tmptail = (UART_RxTail + 1) & UART_RX0_BUFFER_MASK;
  557. /* get data from receive buffer */
  558. data = UART_RxBuf[tmptail];
  559. return (UART_LastRxError << 8) + data;
  560. } /* uart0_peek */
  561. /*************************************************************************
  562. Function: uart0_putc()
  563. Purpose: write byte to ringbuffer for transmitting via UART
  564. Input: byte to be transmitted
  565. Returns: none
  566. **************************************************************************/
  567. void uart0_putc(uint8_t data)
  568. {
  569. #ifdef USART0_LARGE_BUFFER
  570. uint16_t tmphead;
  571. uint16_t txtail_tmp;
  572. tmphead = (UART_TxHead + 1) & UART_TX0_BUFFER_MASK;
  573. do {
  574. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  575. txtail_tmp = UART_TxTail;
  576. }
  577. } while (tmphead == txtail_tmp); /* wait for free space in buffer */
  578. #else
  579. uint16_t tmphead;
  580. tmphead = (UART_TxHead + 1) & UART_TX0_BUFFER_MASK;
  581. while (tmphead == UART_TxTail); /* wait for free space in buffer */
  582. #endif
  583. UART_TxBuf[tmphead] = data;
  584. UART_TxHead = tmphead;
  585. /* enable UDRE interrupt */
  586. UART0_CONTROL |= _BV(UART0_UDRIE);
  587. } /* uart0_putc */
  588. /*************************************************************************
  589. Function: uart0_puts()
  590. Purpose: transmit string to UART
  591. Input: string to be transmitted
  592. Returns: none
  593. **************************************************************************/
  594. void uart0_puts(const char *s)
  595. {
  596. while (*s) {
  597. uart0_putc(*s++);
  598. }
  599. } /* uart0_puts */
  600. /*************************************************************************
  601. Function: uart0_puts_p()
  602. Purpose: transmit string from program memory to UART
  603. Input: program memory string to be transmitted
  604. Returns: none
  605. **************************************************************************/
  606. void uart0_puts_p(const char *progmem_s)
  607. {
  608. register char c;
  609. while ((c = pgm_read_byte(progmem_s++))) {
  610. uart0_putc(c);
  611. }
  612. } /* uart0_puts_p */
  613. /*************************************************************************
  614. Function: uart0_available()
  615. Purpose: Determine the number of bytes waiting in the receive buffer
  616. Input: None
  617. Returns: Integer number of bytes in the receive buffer
  618. **************************************************************************/
  619. uint16_t uart0_available(void)
  620. {
  621. uint16_t ret;
  622. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  623. ret = (UART_RX0_BUFFER_SIZE + UART_RxHead - UART_RxTail) & UART_RX0_BUFFER_MASK;
  624. }
  625. return ret;
  626. } /* uart0_available */
  627. /*************************************************************************
  628. Function: uart0_flush()
  629. Purpose: Flush bytes waiting the receive buffer. Actually ignores them.
  630. Input: None
  631. Returns: None
  632. **************************************************************************/
  633. void uart0_flush(void)
  634. {
  635. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  636. UART_RxHead = UART_RxTail;
  637. }
  638. } /* uart0_flush */
  639. #endif
  640. #endif /* defined(USART0_ENABLED) */
  641. #if defined(USART1_ENABLED)
  642. /*
  643. * these functions are only for ATmegas with two USART
  644. */
  645. #if defined(ATMEGA_USART1)
  646. ISR(UART1_RECEIVE_INTERRUPT)
  647. /*************************************************************************
  648. Function: UART1 Receive Complete interrupt
  649. Purpose: called when the UART1 has received a character
  650. **************************************************************************/
  651. {
  652. uint16_t tmphead;
  653. uint8_t data;
  654. uint8_t usr;
  655. uint8_t lastRxError;
  656. /* read UART status register and UART data register */
  657. usr = UART1_STATUS;
  658. data = UART1_DATA;
  659. /* */
  660. lastRxError = (usr & (_BV(FE1)|_BV(DOR1)));
  661. /* calculate buffer index */
  662. tmphead = (UART1_RxHead + 1) & UART_RX1_BUFFER_MASK;
  663. if (tmphead == UART1_RxTail) {
  664. /* error: receive buffer overflow */
  665. lastRxError = UART_BUFFER_OVERFLOW >> 8;
  666. } else {
  667. /* store new index */
  668. UART1_RxHead = tmphead;
  669. /* store received data in buffer */
  670. UART1_RxBuf[tmphead] = data;
  671. }
  672. UART1_LastRxError = lastRxError;
  673. }
  674. ISR(UART1_TRANSMIT_INTERRUPT)
  675. /*************************************************************************
  676. Function: UART1 Data Register Empty interrupt
  677. Purpose: called when the UART1 is ready to transmit the next byte
  678. **************************************************************************/
  679. {
  680. uint16_t tmptail;
  681. if (UART1_TxHead != UART1_TxTail) {
  682. /* calculate and store new buffer index */
  683. tmptail = (UART1_TxTail + 1) & UART_TX1_BUFFER_MASK;
  684. UART1_TxTail = tmptail;
  685. /* get one byte from buffer and write it to UART */
  686. UART1_DATA = UART1_TxBuf[tmptail]; /* start transmission */
  687. } else {
  688. /* tx buffer empty, disable UDRE interrupt */
  689. UART1_CONTROL &= ~_BV(UART1_UDRIE);
  690. }
  691. }
  692. /*************************************************************************
  693. Function: uart1_init()
  694. Purpose: initialize UART1 and set baudrate
  695. Input: baudrate using macro UART_BAUD_SELECT()
  696. Returns: none
  697. **************************************************************************/
  698. void uart1_init(uint16_t baudrate)
  699. {
  700. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  701. UART1_TxHead = 0;
  702. UART1_TxTail = 0;
  703. UART1_RxHead = 0;
  704. UART1_RxTail = 0;
  705. }
  706. /* Set baud rate */
  707. if (baudrate & 0x8000) {
  708. UART1_STATUS = (1<<U2X1); //Enable 2x speed
  709. baudrate &= ~0x8000;
  710. }
  711. UBRR1H = (uint8_t) (baudrate>>8);
  712. UBRR1L = (uint8_t) baudrate;
  713. /* Enable USART receiver and transmitter and receive complete interrupt */
  714. UART1_CONTROL = _BV(RXCIE1)|(1<<RXEN1)|(1<<TXEN1);
  715. /* Set frame format: asynchronous, 8data, no parity, 1stop bit */
  716. #ifdef URSEL1
  717. UCSR1C = (1<<URSEL1)|(3<<UCSZ10);
  718. #else
  719. UCSR1C = (3<<UCSZ10);
  720. #endif
  721. } /* uart_init */
  722. /*************************************************************************
  723. Function: uart1_getc()
  724. Purpose: return byte from ringbuffer
  725. Returns: lower byte: received byte from ringbuffer
  726. higher byte: last receive error
  727. **************************************************************************/
  728. uint16_t uart1_getc(void)
  729. {
  730. uint16_t tmptail;
  731. uint8_t data;
  732. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  733. if (UART1_RxHead == UART1_RxTail) {
  734. return UART_NO_DATA; /* no data available */
  735. }
  736. /* calculate / store buffer index */
  737. tmptail = (UART1_RxTail + 1) & UART_RX1_BUFFER_MASK;
  738. UART1_RxTail = tmptail;
  739. }
  740. /* get data from receive buffer */
  741. data = UART1_RxBuf[tmptail];
  742. return (UART1_LastRxError << 8) + data;
  743. } /* uart1_getc */
  744. /*************************************************************************
  745. Function: uart1_peek()
  746. Purpose: Returns the next byte (character) of incoming UART data without
  747. removing it from the ring buffer. That is, successive calls to
  748. uartN_peek() will return the same character, as will the next
  749. call to uartN_getc()
  750. Returns: lower byte: next byte in ring buffer
  751. higher byte: last receive error
  752. **************************************************************************/
  753. uint16_t uart1_peek(void)
  754. {
  755. uint16_t tmptail;
  756. uint8_t data;
  757. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  758. if (UART1_RxHead == UART1_RxTail) {
  759. return UART_NO_DATA; /* no data available */
  760. }
  761. }
  762. tmptail = (UART1_RxTail + 1) & UART_RX1_BUFFER_MASK;
  763. /* get data from receive buffer */
  764. data = UART1_RxBuf[tmptail];
  765. return (UART1_LastRxError << 8) + data;
  766. } /* uart1_peek */
  767. /*************************************************************************
  768. Function: uart1_putc()
  769. Purpose: write byte to ringbuffer for transmitting via UART
  770. Input: byte to be transmitted
  771. Returns: none
  772. **************************************************************************/
  773. void uart1_putc(uint8_t data)
  774. {
  775. #ifdef USART1_LARGE_BUFFER
  776. uint16_t tmphead;
  777. uint16_t txtail_tmp;
  778. tmphead = (UART1_TxHead + 1) & UART_TX1_BUFFER_MASK;
  779. do {
  780. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  781. txtail_tmp = UART1_TxTail;
  782. }
  783. } while (tmphead == txtail_tmp); /* wait for free space in buffer */
  784. #else
  785. uint16_t tmphead;
  786. tmphead = (UART1_TxHead + 1) & UART_TX1_BUFFER_MASK;
  787. while (tmphead == UART1_TxTail); /* wait for free space in buffer */
  788. #endif
  789. UART1_TxBuf[tmphead] = data;
  790. UART1_TxHead = tmphead;
  791. /* enable UDRE interrupt */
  792. UART1_CONTROL |= _BV(UART1_UDRIE);
  793. } /* uart1_putc */
  794. /*************************************************************************
  795. Function: uart1_puts()
  796. Purpose: transmit string to UART1
  797. Input: string to be transmitted
  798. Returns: none
  799. **************************************************************************/
  800. void uart1_puts(const char *s)
  801. {
  802. while (*s) {
  803. uart1_putc(*s++);
  804. }
  805. } /* uart1_puts */
  806. /*************************************************************************
  807. Function: uart1_puts_p()
  808. Purpose: transmit string from program memory to UART1
  809. Input: program memory string to be transmitted
  810. Returns: none
  811. **************************************************************************/
  812. void uart1_puts_p(const char *progmem_s)
  813. {
  814. register char c;
  815. while ((c = pgm_read_byte(progmem_s++))) {
  816. uart1_putc(c);
  817. }
  818. } /* uart1_puts_p */
  819. /*************************************************************************
  820. Function: uart1_available()
  821. Purpose: Determine the number of bytes waiting in the receive buffer
  822. Input: None
  823. Returns: Integer number of bytes in the receive buffer
  824. **************************************************************************/
  825. uint16_t uart1_available(void)
  826. {
  827. uint16_t ret;
  828. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  829. ret = (UART_RX1_BUFFER_SIZE + UART1_RxHead - UART1_RxTail) & UART_RX1_BUFFER_MASK;
  830. }
  831. return ret;
  832. } /* uart1_available */
  833. /*************************************************************************
  834. Function: uart1_flush()
  835. Purpose: Flush bytes waiting the receive buffer. Actually ignores them.
  836. Input: None
  837. Returns: None
  838. **************************************************************************/
  839. void uart1_flush(void)
  840. {
  841. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  842. UART1_RxHead = UART1_RxTail;
  843. }
  844. } /* uart1_flush */
  845. #endif
  846. #endif /* defined(USART1_ENABLED) */
  847. #if defined(USART2_ENABLED)
  848. /*
  849. * these functions are only for ATmegas with four USART
  850. */
  851. #if defined(ATMEGA_USART2)
  852. ISR(UART2_RECEIVE_INTERRUPT)
  853. /*************************************************************************
  854. Function: UART2 Receive Complete interrupt
  855. Purpose: called when the UART2 has received a character
  856. **************************************************************************/
  857. {
  858. uint16_t tmphead;
  859. uint8_t data;
  860. uint8_t usr;
  861. uint8_t lastRxError;
  862. /* read UART status register and UART data register */
  863. usr = UART2_STATUS;
  864. data = UART2_DATA;
  865. /* */
  866. lastRxError = (usr & (_BV(FE2)|_BV(DOR2)));
  867. /* calculate buffer index */
  868. tmphead = (UART2_RxHead + 1) & UART_RX2_BUFFER_MASK;
  869. if (tmphead == UART2_RxTail) {
  870. /* error: receive buffer overflow */
  871. lastRxError = UART_BUFFER_OVERFLOW >> 8;
  872. } else {
  873. /* store new index */
  874. UART2_RxHead = tmphead;
  875. /* store received data in buffer */
  876. UART2_RxBuf[tmphead] = data;
  877. }
  878. UART2_LastRxError = lastRxError;
  879. }
  880. ISR(UART2_TRANSMIT_INTERRUPT)
  881. /*************************************************************************
  882. Function: UART2 Data Register Empty interrupt
  883. Purpose: called when the UART2 is ready to transmit the next byte
  884. **************************************************************************/
  885. {
  886. uint16_t tmptail;
  887. if (UART2_TxHead != UART2_TxTail) {
  888. /* calculate and store new buffer index */
  889. tmptail = (UART2_TxTail + 1) & UART_TX2_BUFFER_MASK;
  890. UART2_TxTail = tmptail;
  891. /* get one byte from buffer and write it to UART */
  892. UART2_DATA = UART2_TxBuf[tmptail]; /* start transmission */
  893. } else {
  894. /* tx buffer empty, disable UDRE interrupt */
  895. UART2_CONTROL &= ~_BV(UART2_UDRIE);
  896. }
  897. }
  898. /*************************************************************************
  899. Function: uart2_init()
  900. Purpose: initialize UART2 and set baudrate
  901. Input: baudrate using macro UART_BAUD_SELECT()
  902. Returns: none
  903. **************************************************************************/
  904. void uart2_init(uint16_t baudrate)
  905. {
  906. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  907. UART2_TxHead = 0;
  908. UART2_TxTail = 0;
  909. UART2_RxHead = 0;
  910. UART2_RxTail = 0;
  911. }
  912. /* Set baud rate */
  913. if (baudrate & 0x8000) {
  914. UART2_STATUS = (1<<U2X2); //Enable 2x speed
  915. baudrate &= ~0x8000;
  916. }
  917. UBRR2H = (uint8_t) (baudrate>>8);
  918. UBRR2L = (uint8_t) baudrate;
  919. /* Enable USART receiver and transmitter and receive complete interrupt */
  920. UART2_CONTROL = _BV(RXCIE2)|(1<<RXEN2)|(1<<TXEN2);
  921. /* Set frame format: asynchronous, 8data, no parity, 1stop bit */
  922. #ifdef URSEL2
  923. UCSR2C = (1<<URSEL2)|(3<<UCSZ20);
  924. #else
  925. UCSR2C = (3<<UCSZ20);
  926. #endif
  927. } /* uart_init */
  928. /*************************************************************************
  929. Function: uart2_getc()
  930. Purpose: return byte from ringbuffer
  931. Returns: lower byte: received byte from ringbuffer
  932. higher byte: last receive error
  933. **************************************************************************/
  934. uint16_t uart2_getc(void)
  935. {
  936. uint16_t tmptail;
  937. uint8_t data;
  938. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  939. if (UART2_RxHead == UART2_RxTail) {
  940. return UART_NO_DATA; /* no data available */
  941. }
  942. }
  943. /* calculate / store buffer index */
  944. tmptail = (UART2_RxTail + 1) & UART_RX2_BUFFER_MASK;
  945. UART2_RxTail = tmptail;
  946. /* get data from receive buffer */
  947. data = UART2_RxBuf[tmptail];
  948. return (UART2_LastRxError << 8) + data;
  949. } /* uart2_getc */
  950. /*************************************************************************
  951. Function: uart2_peek()
  952. Purpose: Returns the next byte (character) of incoming UART data without
  953. removing it from the ring buffer. That is, successive calls to
  954. uartN_peek() will return the same character, as will the next
  955. call to uartN_getc()
  956. Returns: lower byte: next byte in ring buffer
  957. higher byte: last receive error
  958. **************************************************************************/
  959. uint16_t uart2_peek(void)
  960. {
  961. uint16_t tmptail;
  962. uint8_t data;
  963. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  964. if (UART2_RxHead == UART2_RxTail) {
  965. return UART_NO_DATA; /* no data available */
  966. }
  967. }
  968. tmptail = (UART2_RxTail + 1) & UART_RX2_BUFFER_MASK;
  969. /* get data from receive buffer */
  970. data = UART2_RxBuf[tmptail];
  971. return (UART2_LastRxError << 8) + data;
  972. } /* uart2_peek */
  973. /*************************************************************************
  974. Function: uart2_putc()
  975. Purpose: write byte to ringbuffer for transmitting via UART
  976. Input: byte to be transmitted
  977. Returns: none
  978. **************************************************************************/
  979. void uart2_putc(uint8_t data)
  980. {
  981. #ifdef USART2_LARGE_BUFFER
  982. uint16_t tmphead;
  983. uint16_t txtail_tmp;
  984. tmphead = (UART2_TxHead + 1) & UART_TX2_BUFFER_MASK;
  985. do {
  986. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  987. txtail_tmp = UART2_TxTail;
  988. }
  989. } while (tmphead == txtail_tmp); /* wait for free space in buffer */
  990. #else
  991. uint16_t tmphead;
  992. tmphead = (UART2_TxHead + 1) & UART_TX2_BUFFER_MASK;
  993. while (tmphead == UART2_TxTail); /* wait for free space in buffer */
  994. #endif
  995. UART2_TxBuf[tmphead] = data;
  996. UART2_TxHead = tmphead;
  997. /* enable UDRE interrupt */
  998. UART2_CONTROL |= _BV(UART2_UDRIE);
  999. } /* uart2_putc */
  1000. /*************************************************************************
  1001. Function: uart2_puts()
  1002. Purpose: transmit string to UART2
  1003. Input: string to be transmitted
  1004. Returns: none
  1005. **************************************************************************/
  1006. void uart2_puts(const char *s)
  1007. {
  1008. while (*s)
  1009. uart2_putc(*s++);
  1010. } /* uart2_puts */
  1011. /*************************************************************************
  1012. Function: uart2_puts_p()
  1013. Purpose: transmit string from program memory to UART2
  1014. Input: program memory string to be transmitted
  1015. Returns: none
  1016. **************************************************************************/
  1017. void uart2_puts_p(const char *progmem_s)
  1018. {
  1019. register char c;
  1020. while ((c = pgm_read_byte(progmem_s++))) {
  1021. uart2_putc(c);
  1022. }
  1023. } /* uart2_puts_p */
  1024. /*************************************************************************
  1025. Function: uart2_available()
  1026. Purpose: Determine the number of bytes waiting in the receive buffer
  1027. Input: None
  1028. Returns: Integer number of bytes in the receive buffer
  1029. **************************************************************************/
  1030. uint16_t uart2_available(void)
  1031. {
  1032. uint16_t ret;
  1033. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1034. ret = (UART_RX2_BUFFER_SIZE + UART2_RxHead - UART2_RxTail) & UART_RX2_BUFFER_MASK;
  1035. }
  1036. return ret;
  1037. } /* uart2_available */
  1038. /*************************************************************************
  1039. Function: uart2_flush()
  1040. Purpose: Flush bytes waiting the receive buffer. Actually ignores them.
  1041. Input: None
  1042. Returns: None
  1043. **************************************************************************/
  1044. void uart2_flush(void)
  1045. {
  1046. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1047. UART2_RxHead = UART2_RxTail;
  1048. }
  1049. } /* uart2_flush */
  1050. #endif
  1051. #endif /* defined(USART2_ENABLED) */
  1052. #if defined(USART3_ENABLED)
  1053. /*
  1054. * these functions are only for ATmegas with four USART
  1055. */
  1056. #if defined(ATMEGA_USART3)
  1057. ISR(UART3_RECEIVE_INTERRUPT)
  1058. /*************************************************************************
  1059. Function: UART3 Receive Complete interrupt
  1060. Purpose: called when the UART3 has received a character
  1061. **************************************************************************/
  1062. {
  1063. uint16_t tmphead;
  1064. uint8_t data;
  1065. uint8_t usr;
  1066. uint8_t lastRxError;
  1067. /* read UART status register and UART data register */
  1068. usr = UART3_STATUS;
  1069. data = UART3_DATA;
  1070. /* */
  1071. lastRxError = (usr & (_BV(FE3)|_BV(DOR3)));
  1072. /* calculate buffer index */
  1073. tmphead = (UART3_RxHead + 1) & UART_RX3_BUFFER_MASK;
  1074. if (tmphead == UART3_RxTail) {
  1075. /* error: receive buffer overflow */
  1076. lastRxError = UART_BUFFER_OVERFLOW >> 8;
  1077. } else {
  1078. /* store new index */
  1079. UART3_RxHead = tmphead;
  1080. /* store received data in buffer */
  1081. UART3_RxBuf[tmphead] = data;
  1082. }
  1083. UART3_LastRxError = lastRxError;
  1084. }
  1085. ISR(UART3_TRANSMIT_INTERRUPT)
  1086. /*************************************************************************
  1087. Function: UART3 Data Register Empty interrupt
  1088. Purpose: called when the UART3 is ready to transmit the next byte
  1089. **************************************************************************/
  1090. {
  1091. uint16_t tmptail;
  1092. if (UART3_TxHead != UART3_TxTail) {
  1093. /* calculate and store new buffer index */
  1094. tmptail = (UART3_TxTail + 1) & UART_TX3_BUFFER_MASK;
  1095. UART3_TxTail = tmptail;
  1096. /* get one byte from buffer and write it to UART */
  1097. UART3_DATA = UART3_TxBuf[tmptail]; /* start transmission */
  1098. } else {
  1099. /* tx buffer empty, disable UDRE interrupt */
  1100. UART3_CONTROL &= ~_BV(UART3_UDRIE);
  1101. }
  1102. }
  1103. /*************************************************************************
  1104. Function: uart3_init()
  1105. Purpose: initialize UART3 and set baudrate
  1106. Input: baudrate using macro UART_BAUD_SELECT()
  1107. Returns: none
  1108. **************************************************************************/
  1109. void uart3_init(uint16_t baudrate)
  1110. {
  1111. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1112. UART3_TxHead = 0;
  1113. UART3_TxTail = 0;
  1114. UART3_RxHead = 0;
  1115. UART3_RxTail = 0;
  1116. }
  1117. /* Set baud rate */
  1118. if (baudrate & 0x8000) {
  1119. UART3_STATUS = (1<<U2X3); //Enable 2x speed
  1120. baudrate &= ~0x8000;
  1121. }
  1122. UBRR3H = (uint8_t)(baudrate>>8);
  1123. UBRR3L = (uint8_t) baudrate;
  1124. /* Enable USART receiver and transmitter and receive complete interrupt */
  1125. UART3_CONTROL = _BV(RXCIE3)|(1<<RXEN3)|(1<<TXEN3);
  1126. /* Set frame format: asynchronous, 8data, no parity, 1stop bit */
  1127. #ifdef URSEL3
  1128. UCSR3C = (1<<URSEL3)|(3<<UCSZ30);
  1129. #else
  1130. UCSR3C = (3<<UCSZ30);
  1131. #endif
  1132. } /* uart_init */
  1133. /*************************************************************************
  1134. Function: uart3_getc()
  1135. Purpose: return byte from ringbuffer
  1136. Returns: lower byte: received byte from ringbuffer
  1137. higher byte: last receive error
  1138. **************************************************************************/
  1139. uint16_t uart3_getc(void)
  1140. {
  1141. uint16_t tmptail;
  1142. uint8_t data;
  1143. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1144. if (UART3_RxHead == UART3_RxTail) {
  1145. return UART_NO_DATA; /* no data available */
  1146. }
  1147. }
  1148. /* calculate / store buffer index */
  1149. tmptail = (UART3_RxTail + 1) & UART_RX3_BUFFER_MASK;
  1150. UART3_RxTail = tmptail;
  1151. /* get data from receive buffer */
  1152. data = UART3_RxBuf[tmptail];
  1153. return (UART3_LastRxError << 8) + data;
  1154. } /* uart3_getc */
  1155. /*************************************************************************
  1156. Function: uart3_peek()
  1157. Purpose: Returns the next byte (character) of incoming UART data without
  1158. removing it from the ring buffer. That is, successive calls to
  1159. uartN_peek() will return the same character, as will the next
  1160. call to uartN_getc()
  1161. Returns: lower byte: next byte in ring buffer
  1162. higher byte: last receive error
  1163. **************************************************************************/
  1164. uint16_t uart3_peek(void)
  1165. {
  1166. uint16_t tmptail;
  1167. uint8_t data;
  1168. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1169. if (UART3_RxHead == UART3_RxTail) {
  1170. return UART_NO_DATA; /* no data available */
  1171. }
  1172. }
  1173. tmptail = (UART3_RxTail + 1) & UART_RX3_BUFFER_MASK;
  1174. /* get data from receive buffer */
  1175. data = UART3_RxBuf[tmptail];
  1176. return (UART3_LastRxError << 8) + data;
  1177. } /* uart3_peek */
  1178. /*************************************************************************
  1179. Function: uart3_putc()
  1180. Purpose: write byte to ringbuffer for transmitting via UART
  1181. Input: byte to be transmitted
  1182. Returns: none
  1183. **************************************************************************/
  1184. void uart3_putc(uint8_t data)
  1185. {
  1186. #ifdef USART3_LARGE_BUFFER
  1187. uint16_t tmphead;
  1188. uint16_t txtail_tmp;
  1189. tmphead = (UART3_TxHead + 1) & UART_TX3_BUFFER_MASK;
  1190. do {
  1191. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1192. txtail_tmp = UART3_TxTail;
  1193. }
  1194. } while (tmphead == txtail_tmp); /* wait for free space in buffer */
  1195. #else
  1196. uint16_t tmphead;
  1197. tmphead = (UART3_TxHead + 1) & UART_TX3_BUFFER_MASK;
  1198. while (tmphead == UART3_TxTail); /* wait for free space in buffer */
  1199. #endif
  1200. UART3_TxBuf[tmphead] = data;
  1201. UART3_TxHead = tmphead;
  1202. /* enable UDRE interrupt */
  1203. UART3_CONTROL |= _BV(UART3_UDRIE);
  1204. } /* uart3_putc */
  1205. /*************************************************************************
  1206. Function: uart3_puts()
  1207. Purpose: transmit string to UART3
  1208. Input: string to be transmitted
  1209. Returns: none
  1210. **************************************************************************/
  1211. void uart3_puts(const char *s)
  1212. {
  1213. while (*s) {
  1214. uart3_putc(*s++);
  1215. }
  1216. } /* uart3_puts */
  1217. /*************************************************************************
  1218. Function: uart3_puts_p()
  1219. Purpose: transmit string from program memory to UART3
  1220. Input: program memory string to be transmitted
  1221. Returns: none
  1222. **************************************************************************/
  1223. void uart3_puts_p(const char *progmem_s)
  1224. {
  1225. register char c;
  1226. while ((c = pgm_read_byte(progmem_s++))) {
  1227. uart3_putc(c);
  1228. }
  1229. } /* uart3_puts_p */
  1230. /*************************************************************************
  1231. Function: uart3_available()
  1232. Purpose: Determine the number of bytes waiting in the receive buffer
  1233. Input: None
  1234. Returns: Integer number of bytes in the receive buffer
  1235. **************************************************************************/
  1236. uint16_t uart3_available(void)
  1237. {
  1238. uint16_t ret;
  1239. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1240. ret = (UART_RX3_BUFFER_SIZE + UART3_RxHead - UART3_RxTail) & UART_RX3_BUFFER_MASK;
  1241. }
  1242. return ret;
  1243. } /* uart3_available */
  1244. /*************************************************************************
  1245. Function: uart3_flush()
  1246. Purpose: Flush bytes waiting the receive buffer. Actually ignores them.
  1247. Input: None
  1248. Returns: None
  1249. **************************************************************************/
  1250. void uart3_flush(void)
  1251. {
  1252. ATOMIC_BLOCK(ATOMIC_FORCEON) {
  1253. UART3_RxHead = UART3_RxTail;
  1254. }
  1255. } /* uart3_flush */
  1256. #endif
  1257. #endif /* defined(USART3_ENABLED) */