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  1. /* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com>
  2. * Copyright 2019 Sunjun Kim
  3. * Copyright 2020 Ploopy Corporation
  4. *
  5. * This program is free software: you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation, either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include "pmw3360.h"
  19. #include "wait.h"
  20. #include "debug.h"
  21. #include "print.h"
  22. #include "pmw3360_firmware.h"
  23. // Registers
  24. #define REG_Product_ID 0x00
  25. #define REG_Revision_ID 0x01
  26. #define REG_Motion 0x02
  27. #define REG_Delta_X_L 0x03
  28. #define REG_Delta_X_H 0x04
  29. #define REG_Delta_Y_L 0x05
  30. #define REG_Delta_Y_H 0x06
  31. #define REG_SQUAL 0x07
  32. #define REG_Raw_Data_Sum 0x08
  33. #define REG_Maximum_Raw_data 0x09
  34. #define REG_Minimum_Raw_data 0x0A
  35. #define REG_Shutter_Lower 0x0B
  36. #define REG_Shutter_Upper 0x0C
  37. #define REG_Control 0x0D
  38. #define REG_Config1 0x0F
  39. #define REG_Config2 0x10
  40. #define REG_Angle_Tune 0x11
  41. #define REG_Frame_Capture 0x12
  42. #define REG_SROM_Enable 0x13
  43. #define REG_Run_Downshift 0x14
  44. #define REG_Rest1_Rate_Lower 0x15
  45. #define REG_Rest1_Rate_Upper 0x16
  46. #define REG_Rest1_Downshift 0x17
  47. #define REG_Rest2_Rate_Lower 0x18
  48. #define REG_Rest2_Rate_Upper 0x19
  49. #define REG_Rest2_Downshift 0x1A
  50. #define REG_Rest3_Rate_Lower 0x1B
  51. #define REG_Rest3_Rate_Upper 0x1C
  52. #define REG_Observation 0x24
  53. #define REG_Data_Out_Lower 0x25
  54. #define REG_Data_Out_Upper 0x26
  55. #define REG_Raw_Data_Dump 0x29
  56. #define REG_SROM_ID 0x2A
  57. #define REG_Min_SQ_Run 0x2B
  58. #define REG_Raw_Data_Threshold 0x2C
  59. #define REG_Config5 0x2F
  60. #define REG_Power_Up_Reset 0x3A
  61. #define REG_Shutdown 0x3B
  62. #define REG_Inverse_Product_ID 0x3F
  63. #define REG_LiftCutoff_Tune3 0x41
  64. #define REG_Angle_Snap 0x42
  65. #define REG_LiftCutoff_Tune1 0x4A
  66. #define REG_Motion_Burst 0x50
  67. #define REG_LiftCutoff_Tune_Timeout 0x58
  68. #define REG_LiftCutoff_Tune_Min_Length 0x5A
  69. #define REG_SROM_Load_Burst 0x62
  70. #define REG_Lift_Config 0x63
  71. #define REG_Raw_Data_Burst 0x64
  72. #define REG_LiftCutoff_Tune2 0x65
  73. bool _inBurst = false;
  74. void print_byte(uint8_t byte) { dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); }
  75. bool spi_start_adv(void) {
  76. bool status = spi_start(PMW3360_CS_PIN, PMW3360_SPI_LSBFIRST, PMW3360_SPI_MODE, PMW3360_SPI_DIVISOR);
  77. wait_us(1);
  78. return status;
  79. }
  80. void spi_stop_adv(void) {
  81. wait_us(1);
  82. spi_stop();
  83. }
  84. spi_status_t spi_write_adv(uint8_t reg_addr, uint8_t data) {
  85. if (reg_addr != REG_Motion_Burst) {
  86. _inBurst = false;
  87. }
  88. spi_start_adv();
  89. // send address of the register, with MSBit = 1 to indicate it's a write
  90. spi_status_t status = spi_write(reg_addr | 0x80);
  91. status = spi_write(data);
  92. // tSCLK-NCS for write operation
  93. wait_us(20);
  94. // tSWW/tSWR (=120us) minus tSCLK-NCS. Could be shortened, but is looks like a safe lower bound
  95. wait_us(100);
  96. spi_stop();
  97. return status;
  98. }
  99. uint8_t spi_read_adv(uint8_t reg_addr) {
  100. spi_start_adv();
  101. // send adress of the register, with MSBit = 0 to indicate it's a read
  102. spi_write(reg_addr & 0x7f);
  103. uint8_t data = spi_read();
  104. // tSCLK-NCS for read operation is 120ns
  105. wait_us(1);
  106. // tSRW/tSRR (=20us) minus tSCLK-NCS
  107. wait_us(19);
  108. spi_stop();
  109. return data;
  110. }
  111. void pmw_set_cpi(uint16_t cpi) {
  112. uint8_t cpival = constrain((cpi / 100) - 1, 0, 0x77); // limits to 0--119
  113. spi_start_adv();
  114. spi_write_adv(REG_Config1, cpival);
  115. spi_stop();
  116. }
  117. uint16_t pmw_get_cpi(void) {
  118. uint8_t cpival = spi_read_adv(REG_Config1);
  119. return (uint16_t)(cpival & 0xFF) * 100;
  120. }
  121. bool pmw_spi_init(void) {
  122. setPinOutput(PMW3360_CS_PIN);
  123. spi_init();
  124. _inBurst = false;
  125. spi_stop();
  126. spi_start_adv();
  127. spi_stop();
  128. spi_write_adv(REG_Shutdown, 0xb6); // Shutdown first
  129. wait_ms(300);
  130. spi_start_adv();
  131. wait_us(40);
  132. spi_stop_adv();
  133. wait_us(40);
  134. spi_write_adv(REG_Power_Up_Reset, 0x5a);
  135. wait_ms(50);
  136. spi_read_adv(REG_Motion);
  137. spi_read_adv(REG_Delta_X_L);
  138. spi_read_adv(REG_Delta_X_H);
  139. spi_read_adv(REG_Delta_Y_L);
  140. spi_read_adv(REG_Delta_Y_H);
  141. pmw_upload_firmware();
  142. spi_stop_adv();
  143. wait_ms(10);
  144. pmw_set_cpi(PMW3360_CPI);
  145. wait_ms(1);
  146. spi_write_adv(REG_Config2, 0x00);
  147. spi_write_adv(REG_Angle_Tune, constrain(ROTATIONAL_TRANSFORM_ANGLE, -30, 30));
  148. bool init_success = pmw_check_signature();
  149. writePinLow(PMW3360_CS_PIN);
  150. return init_success;
  151. }
  152. void pmw_upload_firmware(void) {
  153. spi_write_adv(REG_SROM_Enable, 0x1d);
  154. wait_ms(10);
  155. spi_write_adv(REG_SROM_Enable, 0x18);
  156. spi_start_adv();
  157. spi_write(REG_SROM_Load_Burst | 0x80);
  158. wait_us(15);
  159. unsigned char c;
  160. for (int i = 0; i < FIRMWARE_LENGTH; i++) {
  161. c = (unsigned char)pgm_read_byte(firmware_data + i);
  162. spi_write(c);
  163. wait_us(15);
  164. }
  165. wait_us(200);
  166. spi_read_adv(REG_SROM_ID);
  167. spi_write_adv(REG_Config2, 0x00);
  168. spi_stop();
  169. wait_ms(10);
  170. }
  171. bool pmw_check_signature(void) {
  172. uint8_t pid = spi_read_adv(REG_Product_ID);
  173. uint8_t iv_pid = spi_read_adv(REG_Inverse_Product_ID);
  174. uint8_t SROM_ver = spi_read_adv(REG_SROM_ID);
  175. return (pid == 0x42 && iv_pid == 0xBD && SROM_ver == 0x04); // signature for SROM 0x04
  176. }
  177. report_pmw_t pmw_read_burst(void) {
  178. if (!_inBurst) {
  179. dprintf("burst on");
  180. spi_write_adv(REG_Motion_Burst, 0x00);
  181. _inBurst = true;
  182. }
  183. spi_start_adv();
  184. spi_write(REG_Motion_Burst);
  185. wait_us(35); // waits for tSRAD
  186. report_pmw_t data;
  187. data.motion = 0;
  188. data.dx = 0;
  189. data.mdx = 0;
  190. data.dy = 0;
  191. data.mdx = 0;
  192. data.motion = spi_read();
  193. spi_write(0x00); // skip Observation
  194. data.dx = spi_read();
  195. data.mdx = spi_read();
  196. data.dy = spi_read();
  197. data.mdy = spi_read();
  198. spi_stop();
  199. if (debug_mouse) {
  200. print_byte(data.motion);
  201. print_byte(data.dx);
  202. print_byte(data.mdx);
  203. print_byte(data.dy);
  204. print_byte(data.mdy);
  205. dprintf("\n");
  206. }
  207. data.isMotion = (data.motion & 0x80) != 0;
  208. data.isOnSurface = (data.motion & 0x08) == 0;
  209. data.dx |= (data.mdx << 8);
  210. data.dx = data.dx * -1;
  211. data.dy |= (data.mdy << 8);
  212. data.dy = data.dy * -1;
  213. spi_stop();
  214. if (data.motion & 0b111) { // panic recovery, sometimes burst mode works weird.
  215. _inBurst = false;
  216. }
  217. return data;
  218. }