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  1. /*
  2. * This file is subject to the terms of the GFX License. If a copy of
  3. * the license was not distributed with this file, you can obtain one at:
  4. *
  5. * http://ugfx.org/license.html
  6. */
  7. #ifndef _GDISP_LLD_BOARD_H
  8. #define _GDISP_LLD_BOARD_H
  9. #include "quantum.h"
  10. #define ST7565_LCD_BIAS ST7565_LCD_BIAS_7
  11. #define ST7565_COM_SCAN ST7565_COM_SCAN_DEC
  12. #define ST7565_PAGE_ORDER 0, 1, 2, 3
  13. /*
  14. * Custom page order for several LCD boards, e.g. HEM12864-99
  15. * #define ST7565_PAGE_ORDER 4,5,6,7,0,1,2,3
  16. */
  17. #define ST7565_A0_PIN C7
  18. #define ST7565_RST_PIN C8
  19. #define ST7565_MOSI_PIN C6
  20. #define ST7565_SCLK_PIN C5
  21. #define ST7565_SS_PIN C4
  22. // DSPI Clock and Transfer Attributes
  23. // Frame Size: 8 bits
  24. // MSB First
  25. // CLK Low by default
  26. static const SPIConfig spi1config = {
  27. // Operation complete callback or @p NULL.
  28. .end_cb = NULL,
  29. // The chip select line port - when not using pcs.
  30. .ssport = PAL_PORT(ST7565_SS_PIN),
  31. // brief The chip select line pad number - when not using pcs.
  32. .sspad = PAL_PAD(ST7565_SS_PIN),
  33. // SPI initialization data.
  34. .tar0 = SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes
  35. | SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns
  36. | SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns
  37. | SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns
  38. | SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2
  39. | SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns
  40. };
  41. static GFXINLINE void acquire_bus(GDisplay *g) {
  42. (void)g;
  43. // Only the LCD is using the SPI bus, so no need to acquire
  44. // spiAcquireBus(&SPID1);
  45. spiSelect(&SPID1);
  46. }
  47. static GFXINLINE void release_bus(GDisplay *g) {
  48. (void)g;
  49. // Only the LCD is using the SPI bus, so no need to release
  50. // spiReleaseBus(&SPID1);
  51. spiUnselect(&SPID1);
  52. }
  53. static GFXINLINE void init_board(GDisplay *g) {
  54. (void)g;
  55. setPinOutput(ST7565_A0_PIN);
  56. writePinHigh(ST7565_A0_PIN);
  57. setPinOutput(ST7565_RST_PIN);
  58. writePinHigh(ST7565_RST_PIN);
  59. setPinOutput(ST7565_SS_PIN);
  60. palSetPadMode(PAL_PORT(ST7565_MOSI_PIN), PAL_PAD(ST7565_MOSI_PIN), PAL_MODE_ALTERNATIVE_2);
  61. palSetPadMode(PAL_PORT(ST7565_SCLK_PIN), PAL_PAD(ST7565_SCLK_PIN), PAL_MODE_ALTERNATIVE_2);
  62. spiInit();
  63. spiStart(&SPID1, &spi1config);
  64. release_bus(g);
  65. }
  66. static GFXINLINE void post_init_board(GDisplay *g) { (void)g; }
  67. static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) {
  68. (void)g;
  69. writePin(ST7565_RST_PIN, !state);
  70. }
  71. static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
  72. (void)g;
  73. writePinLow(ST7565_A0_PIN);
  74. spiSend(&SPID1, 1, &cmd);
  75. }
  76. static GFXINLINE void write_data(GDisplay *g, gU8 *data, gU16 length) {
  77. (void)g;
  78. writePinHigh(ST7565_A0_PIN);
  79. spiSend(&SPID1, length, data);
  80. }
  81. #endif /* _GDISP_LLD_BOARD_H */