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  1. // Copyright 2021 Nick Brassel (@tzarc)
  2. // SPDX-License-Identifier: GPL-2.0-or-later
  3. #include "qp_internal.h"
  4. #include "qp_comms.h"
  5. #include "qp_ili9341.h"
  6. #include "qp_ili9xxx_opcodes.h"
  7. #include "qp_tft_panel.h"
  8. #ifdef QUANTUM_PAINTER_ILI9341_SPI_ENABLE
  9. # include <qp_comms_spi.h>
  10. #endif // QUANTUM_PAINTER_ILI9341_SPI_ENABLE
  11. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  12. // Common
  13. // Driver storage
  14. tft_panel_dc_reset_painter_device_t ili9341_drivers[ILI9341_NUM_DEVICES] = {0};
  15. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  16. // Initialization
  17. bool qp_ili9341_init(painter_device_t device, painter_rotation_t rotation) {
  18. // clang-format off
  19. const uint8_t ili9341_init_sequence[] = {
  20. // Command, Delay, N, Data[N]
  21. ILI9XXX_CMD_RESET, 120, 0,
  22. ILI9XXX_CMD_SLEEP_OFF, 5, 0,
  23. ILI9XXX_POWER_CTL_A, 0, 5, 0x39, 0x2C, 0x00, 0x34, 0x02,
  24. ILI9XXX_POWER_CTL_B, 0, 3, 0x00, 0xD9, 0x30,
  25. ILI9XXX_POWER_ON_SEQ_CTL, 0, 4, 0x64, 0x03, 0x12, 0x81,
  26. ILI9XXX_SET_PUMP_RATIO_CTL, 0, 1, 0x20,
  27. ILI9XXX_SET_POWER_CTL_1, 0, 1, 0x26,
  28. ILI9XXX_SET_POWER_CTL_2, 0, 1, 0x11,
  29. ILI9XXX_SET_VCOM_CTL_1, 0, 2, 0x35, 0x3E,
  30. ILI9XXX_SET_VCOM_CTL_2, 0, 1, 0xBE,
  31. ILI9XXX_DRV_TIMING_CTL_A, 0, 3, 0x85, 0x10, 0x7A,
  32. ILI9XXX_DRV_TIMING_CTL_B, 0, 2, 0x00, 0x00,
  33. ILI9XXX_SET_BRIGHTNESS, 0, 1, 0xFF,
  34. ILI9XXX_ENABLE_3_GAMMA, 0, 1, 0x00,
  35. ILI9XXX_SET_GAMMA, 0, 1, 0x01,
  36. ILI9XXX_SET_PGAMMA, 0, 15, 0x0F, 0x29, 0x24, 0x0C, 0x0E, 0x09, 0x4E, 0x78, 0x3C, 0x09, 0x13, 0x05, 0x17, 0x11, 0x00,
  37. ILI9XXX_SET_NGAMMA, 0, 15, 0x00, 0x16, 0x1B, 0x04, 0x11, 0x07, 0x31, 0x33, 0x42, 0x05, 0x0C, 0x0A, 0x28, 0x2F, 0x0F,
  38. ILI9XXX_SET_PIX_FMT, 0, 1, 0x05,
  39. ILI9XXX_SET_FRAME_CTL_NORMAL, 0, 2, 0x00, 0x1B,
  40. ILI9XXX_SET_FUNCTION_CTL, 0, 2, 0x0A, 0xA2,
  41. ILI9XXX_CMD_PARTIAL_OFF, 0, 0,
  42. ILI9XXX_CMD_DISPLAY_ON, 20, 0
  43. };
  44. // clang-format on
  45. qp_comms_bulk_command_sequence(device, ili9341_init_sequence, sizeof(ili9341_init_sequence));
  46. // Configure the rotation (i.e. the ordering and direction of memory writes in GRAM)
  47. const uint8_t madctl[] = {
  48. [QP_ROTATION_0] = ILI9XXX_MADCTL_BGR,
  49. [QP_ROTATION_90] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MV,
  50. [QP_ROTATION_180] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MY,
  51. [QP_ROTATION_270] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MV | ILI9XXX_MADCTL_MY,
  52. };
  53. qp_comms_command_databyte(device, ILI9XXX_SET_MEM_ACS_CTL, madctl[rotation]);
  54. return true;
  55. }
  56. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  57. // Driver vtable
  58. const struct tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = {
  59. .base =
  60. {
  61. .init = qp_ili9341_init,
  62. .power = qp_tft_panel_power,
  63. .clear = qp_tft_panel_clear,
  64. .flush = qp_tft_panel_flush,
  65. .pixdata = qp_tft_panel_pixdata,
  66. .viewport = qp_tft_panel_viewport,
  67. .palette_convert = qp_tft_panel_palette_convert,
  68. .append_pixels = qp_tft_panel_append_pixels,
  69. },
  70. .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped,
  71. .num_window_bytes = 2,
  72. .swap_window_coords = false,
  73. .opcodes =
  74. {
  75. .display_on = ILI9XXX_CMD_DISPLAY_ON,
  76. .display_off = ILI9XXX_CMD_DISPLAY_OFF,
  77. .set_column_address = ILI9XXX_SET_COL_ADDR,
  78. .set_row_address = ILI9XXX_SET_PAGE_ADDR,
  79. .enable_writes = ILI9XXX_SET_MEM,
  80. },
  81. };
  82. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  83. // SPI
  84. #ifdef QUANTUM_PAINTER_ILI9341_SPI_ENABLE
  85. // Factory function for creating a handle to the ILI9341 device
  86. painter_device_t qp_ili9341_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) {
  87. for (uint32_t i = 0; i < ILI9341_NUM_DEVICES; ++i) {
  88. tft_panel_dc_reset_painter_device_t *driver = &ili9341_drivers[i];
  89. if (!driver->base.driver_vtable) {
  90. driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9341_driver_vtable;
  91. driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
  92. driver->base.native_bits_per_pixel = 16; // RGB565
  93. driver->base.panel_width = panel_width;
  94. driver->base.panel_height = panel_height;
  95. driver->base.rotation = QP_ROTATION_0;
  96. driver->base.offset_x = 0;
  97. driver->base.offset_y = 0;
  98. // SPI and other pin configuration
  99. driver->base.comms_config = &driver->spi_dc_reset_config;
  100. driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin;
  101. driver->spi_dc_reset_config.spi_config.divisor = spi_divisor;
  102. driver->spi_dc_reset_config.spi_config.lsb_first = false;
  103. driver->spi_dc_reset_config.spi_config.mode = spi_mode;
  104. driver->spi_dc_reset_config.dc_pin = dc_pin;
  105. driver->spi_dc_reset_config.reset_pin = reset_pin;
  106. return (painter_device_t)driver;
  107. }
  108. }
  109. return NULL;
  110. }
  111. #endif // QUANTUM_PAINTER_ILI9341_SPI_ENABLE
  112. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////