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// Copyright 2021 Paul Cotter (@gr1mr3aver) |
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// Copyright 2021 Nick Brassel (@tzarc) |
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// Copyright 2022 David Hoelscher (@customMK) |
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// SPDX-License-Identifier: GPL-2.0-or-later |
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#include "qp_internal.h" |
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#include "qp_comms.h" |
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#include "qp_st7735.h" |
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#include "qp_st77xx_opcodes.h" |
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#include "qp_st7735_opcodes.h" |
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#include "qp_tft_panel.h" |
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#ifdef QUANTUM_PAINTER_ST7735_SPI_ENABLE |
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# include "qp_comms_spi.h" |
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#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE |
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
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// Common |
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// Driver storage |
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tft_panel_dc_reset_painter_device_t st7735_drivers[ST7735_NUM_DEVICES] = {0}; |
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
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// Automatic viewport offsets |
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#ifndef ST7735_NO_AUTOMATIC_OFFSETS |
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static inline void st7735_automatic_viewport_offsets(painter_device_t device, painter_rotation_t rotation) { |
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struct painter_driver_t *driver = (struct painter_driver_t *)device; |
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// clang-format off |
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const struct { |
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uint16_t offset_x; |
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uint16_t offset_y; |
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} rotation_offsets_80x160[] = { |
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[QP_ROTATION_0] = { .offset_x = 24, .offset_y = 0 }, |
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[QP_ROTATION_90] = { .offset_x = 0, .offset_y = 24 }, |
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[QP_ROTATION_180] = { .offset_x = 24, .offset_y = 0 }, |
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[QP_ROTATION_270] = { .offset_x = 0, .offset_y = 24 }, |
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}; |
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// clang-format on |
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if (driver->panel_width == 80 && driver->panel_height == 160) { |
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driver->offset_x = rotation_offsets_80x160[rotation].offset_x; |
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driver->offset_y = rotation_offsets_80x160[rotation].offset_y; |
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} |
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} |
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#endif // ST7735_NO_AUTOMATIC_OFFSETS |
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
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// Initialization |
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bool qp_st7735_init(painter_device_t device, painter_rotation_t rotation) { |
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// clang-format off |
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const uint8_t st7735_init_sequence[] = { |
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// Command, Delay, N, Data[N] |
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ST77XX_CMD_RESET, 120, 0, |
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ST77XX_CMD_SLEEP_OFF, 5, 0, |
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ST77XX_SET_PIX_FMT, 0, 1, 0x55, |
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ST77XX_CMD_INVERT_OFF, 0, 0, |
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ST77XX_CMD_NORMAL_ON, 0, 0, |
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ST77XX_CMD_DISPLAY_ON, 20, 0 |
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}; |
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// clang-format on |
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qp_comms_bulk_command_sequence(device, st7735_init_sequence, sizeof(st7735_init_sequence)); |
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// Configure the rotation (i.e. the ordering and direction of memory writes in GRAM) |
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const uint8_t madctl[] = { |
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[QP_ROTATION_0] = ST77XX_MADCTL_BGR, |
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[QP_ROTATION_90] = ST77XX_MADCTL_BGR | ST77XX_MADCTL_MX | ST77XX_MADCTL_MV, |
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[QP_ROTATION_180] = ST77XX_MADCTL_BGR | ST77XX_MADCTL_MX | ST77XX_MADCTL_MY, |
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[QP_ROTATION_270] = ST77XX_MADCTL_BGR | ST77XX_MADCTL_MV | ST77XX_MADCTL_MY, |
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}; |
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qp_comms_command_databyte(device, ST77XX_SET_MADCTL, madctl[rotation]); |
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#ifndef ST7735_NO_AUTOMATIC_VIEWPORT_OFFSETS |
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st7735_automatic_viewport_offsets(device, rotation); |
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#endif // ST7735_NO_AUTOMATIC_VIEWPORT_OFFSETS |
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return true; |
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} |
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
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// Driver vtable |
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const struct tft_panel_dc_reset_painter_driver_vtable_t st7735_driver_vtable = { |
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.base = |
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{ |
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.init = qp_st7735_init, |
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.power = qp_tft_panel_power, |
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.clear = qp_tft_panel_clear, |
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.flush = qp_tft_panel_flush, |
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.pixdata = qp_tft_panel_pixdata, |
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.viewport = qp_tft_panel_viewport, |
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.palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, |
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.append_pixels = qp_tft_panel_append_pixels_rgb565, |
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}, |
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.num_window_bytes = 2, |
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.swap_window_coords = false, |
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.opcodes = |
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{ |
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.display_on = ST77XX_CMD_DISPLAY_ON, |
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.display_off = ST77XX_CMD_DISPLAY_OFF, |
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.set_column_address = ST77XX_SET_COL_ADDR, |
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.set_row_address = ST77XX_SET_ROW_ADDR, |
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.enable_writes = ST77XX_SET_MEM, |
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}, |
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}; |
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
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// SPI |
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#ifdef QUANTUM_PAINTER_ST7735_SPI_ENABLE |
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// Factory function for creating a handle to the ST7735 device |
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painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) { |
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for (uint32_t i = 0; i < ST7735_NUM_DEVICES; ++i) { |
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tft_panel_dc_reset_painter_device_t *driver = &st7735_drivers[i]; |
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if (!driver->base.driver_vtable) { |
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driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&st7735_driver_vtable; |
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driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable; |
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driver->base.panel_width = panel_width; |
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driver->base.panel_height = panel_height; |
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driver->base.rotation = QP_ROTATION_0; |
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driver->base.offset_x = 0; |
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driver->base.offset_y = 0; |
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driver->base.native_bits_per_pixel = 16; // RGB565 |
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// SPI and other pin configuration |
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driver->base.comms_config = &driver->spi_dc_reset_config; |
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driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; |
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driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; |
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driver->spi_dc_reset_config.spi_config.lsb_first = false; |
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driver->spi_dc_reset_config.spi_config.mode = spi_mode; |
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driver->spi_dc_reset_config.dc_pin = dc_pin; |
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driver->spi_dc_reset_config.reset_pin = reset_pin; |
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return (painter_device_t)driver; |
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} |
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} |
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return NULL; |
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} |
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#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE |
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |