From 44f1bd9b3a9185951c283ceb5eeb2ecc2be72418 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Mon, 7 Mar 2022 21:04:22 +1100 Subject: [PATCH] ChibiOS 21.11.1 update. (#16251) * ChibiOS 21.11.1 update. * `uf2-tinyuf2` => `tinyuf2` * Updated chibios-contrib, fixup preprocessor for tinyuf2 bootloader. * Fixup keychron L433 boards. * Makefile cleanup. * RISC-V build fixes. * Fixup RISC-V build. --- builddefs/common_rules.mk | 2 +- builddefs/mcu_selection.mk | 83 ++++++-- .../input_club/ergodox_infinity/mcuconf.h | 2 +- keyboards/matrix/abelx/mcuconf.h | 3 +- lib/chibios | 2 +- lib/chibios-contrib | 2 +- .../GENERIC_STM32_F303XC/configs/mcuconf.h | 3 +- .../GENERIC_STM32_F405XG/configs/mcuconf.h | 75 ++++--- .../GENERIC_STM32_F407XE/configs/mcuconf.h | 75 ++++--- .../GENERIC_STM32_G431XB/configs/mcuconf.h | 20 +- .../GENERIC_STM32_G474XE/configs/mcuconf.h | 22 +- .../GENERIC_STM32_L412XB/configs/board.h | 5 +- .../GENERIC_STM32_L412XB/configs/config.h | 2 - .../GENERIC_STM32_L412XB/configs/mcuconf.h | 60 ++---- .../GENERIC_STM32_L432XC/configs/config.h | 3 - .../GENERIC_STM32_L432XC/configs/mcuconf.h | 14 +- .../GENERIC_STM32_L433XC/configs/config.h | 2 - .../boards/QMK_PROTON_C/configs/chconf.h | 69 ++++++- .../boards/QMK_PROTON_C/configs/halconf.h | 31 ++- .../boards/QMK_PROTON_C/configs/mcuconf.h | 3 +- .../chibios/boards/common/configs/chconf.h | 69 ++++++- .../chibios/boards/common/configs/halconf.h | 31 ++- platforms/chibios/drivers/ws2812_spi.c | 28 ++- platforms/chibios/platform.mk | 10 +- platforms/chibios/timer.c | 2 +- platforms/chibios/wait.c | 2 +- util/uf2conv.py | 112 ++++++---- util/uf2families.json | 192 ++++++++++++++++++ 28 files changed, 681 insertions(+), 243 deletions(-) create mode 100644 util/uf2families.json diff --git a/builddefs/common_rules.mk b/builddefs/common_rules.mk index b303a87919b..85dfe67f3fd 100644 --- a/builddefs/common_rules.mk +++ b/builddefs/common_rules.mk @@ -316,7 +316,7 @@ gccversion : @$(BUILD_CMD) %.uf2: %.hex - $(eval CMD=$(UF2CONV) $(BUILD_DIR)/$(TARGET).hex -o $(BUILD_DIR)/$(TARGET).uf2 -c -f $(UF2_FAMILY) >/dev/null 2>&1) + $(eval CMD=$(UF2CONV) $(BUILD_DIR)/$(TARGET).hex --output $(BUILD_DIR)/$(TARGET).uf2 --convert --family $(UF2_FAMILY) >/dev/null 2>&1) #@$(SILENT) || printf "$(MSG_EXECUTING) '$(CMD)':\n" @$(SILENT) || printf "$(MSG_UF2) $@" | $(AWK_CMD) @$(BUILD_CMD) diff --git a/builddefs/mcu_selection.mk b/builddefs/mcu_selection.mk index 9fdd22c3b66..ec33ee4446f 100644 --- a/builddefs/mcu_selection.mk +++ b/builddefs/mcu_selection.mk @@ -9,7 +9,9 @@ ifneq ($(findstring MKL26Z64, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = KINETIS MCU_SERIES = KL2x @@ -36,7 +38,9 @@ ifneq ($(findstring MK20DX128, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = KINETIS MCU_SERIES = K20x @@ -63,7 +67,9 @@ ifneq ($(findstring MK20DX256, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = KINETIS MCU_SERIES = K20x @@ -90,7 +96,9 @@ ifneq ($(findstring MK66FX1M0, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = KINETIS MCU_SERIES = MK66F18 @@ -117,7 +125,9 @@ ifneq ($(findstring STM32F042, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F0xx @@ -157,7 +167,9 @@ ifneq ($(findstring STM32F072, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F0xx @@ -192,7 +204,9 @@ ifneq ($(findstring STM32F103, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F1xx @@ -224,7 +238,9 @@ ifneq ($(findstring STM32F303, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F3xx @@ -259,7 +275,9 @@ ifneq ($(findstring STM32F401, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F4xx @@ -299,7 +317,9 @@ ifneq ($(findstring STM32F405, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F4xx @@ -334,7 +354,9 @@ ifneq ($(findstring STM32F407, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F4xx @@ -369,7 +391,9 @@ ifneq ($(findstring STM32F411, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F4xx @@ -409,7 +433,9 @@ ifneq ($(findstring STM32F446, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32F4xx @@ -441,7 +467,9 @@ ifneq ($(findstring STM32G431, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32G4xx @@ -476,7 +504,9 @@ ifneq ($(findstring STM32G474, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32G4xx @@ -511,7 +541,9 @@ ifneq (,$(filter $(MCU),STM32L432 STM32L442)) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32L4xx @@ -548,7 +580,9 @@ ifneq (,$(filter $(MCU),STM32L433 STM32L443)) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32L4xx @@ -585,7 +619,9 @@ ifneq (,$(filter $(MCU),STM32L412 STM32L422)) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = STM32 MCU_SERIES = STM32L4xx @@ -602,7 +638,7 @@ ifneq (,$(filter $(MCU),STM32L412 STM32L422)) # /boards/, or drivers/boards/ BOARD ?= GENERIC_STM32_L412XB - PLATFORM_NAME ?= platform_l432 + PLATFORM_NAME ?= platform_l412_l422 USE_FPU ?= yes @@ -622,7 +658,9 @@ ifneq ($(findstring WB32F3G71, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) MCU_FAMILY = WB32 MCU_SERIES = WB32F3G71xx @@ -657,7 +695,10 @@ ifneq ($(findstring GD32VF103, $(MCU)),) ## chip/board settings # - the next two should match the directories in - # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + # /os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + MCU_PORT_NAME = GD MCU_FAMILY = GD32V MCU_SERIES = GD32VF103 diff --git a/keyboards/input_club/ergodox_infinity/mcuconf.h b/keyboards/input_club/ergodox_infinity/mcuconf.h index f6730b99cad..e4dfa75186f 100644 --- a/keyboards/input_club/ergodox_infinity/mcuconf.h +++ b/keyboards/input_club/ergodox_infinity/mcuconf.h @@ -62,7 +62,7 @@ /* Need to redefine this, since the default is for K20x */ /* This is for Teensy LC; you should comment it out (or change to 5) * for Teensy 3.x */ -#define KINETIS_USB_USB0_IRQ_PRIORITY 2 +#define KINETIS_USB_USB0_IRQ_PRIORITY 5 /* * SPI driver system settings. diff --git a/keyboards/matrix/abelx/mcuconf.h b/keyboards/matrix/abelx/mcuconf.h index a22ce51c4c2..a2fd42b8c4c 100644 --- a/keyboards/matrix/abelx/mcuconf.h +++ b/keyboards/matrix/abelx/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -169,7 +169,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/lib/chibios b/lib/chibios index d7b9d1c87f7..257302333c3 160000 --- a/lib/chibios +++ b/lib/chibios @@ -1 +1 @@ -Subproject commit d7b9d1c87f724bd7c8cd1486d6d0dc3ba52e0d52 +Subproject commit 257302333c31f1f710800c2b97acf3550de043e1 diff --git a/lib/chibios-contrib b/lib/chibios-contrib index d1c2126d1cd..ff1c6ec90cf 160000 --- a/lib/chibios-contrib +++ b/lib/chibios-contrib @@ -1 +1 @@ -Subproject commit d1c2126d1cd867c50127da84425805e225df8555 +Subproject commit ff1c6ec90cfc250d81e6f29a0d60a4faf2afb46d diff --git a/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h index c6f5a8ac520..e0af4a276bf 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -186,7 +186,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h index 908a580a91b..394e7502560 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -86,6 +86,28 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -137,21 +159,11 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -199,13 +211,11 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE /* * MAC driver system settings. @@ -221,7 +231,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -229,13 +238,11 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE /* * RTC driver system settings. @@ -265,12 +272,6 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -319,12 +320,6 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h index 928ee56c71c..07399ad2f73 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -86,6 +86,28 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -137,21 +159,11 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -199,13 +211,11 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE /* * MAC driver system settings. @@ -221,7 +231,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -229,13 +238,11 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE /* * RTC driver system settings. @@ -265,12 +272,6 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -319,12 +320,6 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 diff --git a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h index d115028300b..fd00280115c 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -39,6 +39,7 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_CLOCK_DYNAMIC FALSE #define STM32_VOS STM32_VOS_RANGE1 #define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) @@ -227,7 +228,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -240,6 +240,13 @@ /* * RTC driver system settings. */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_TAMP_CR1_INIT 0 +#define STM32_TAMP_CR2_INIT 0 +#define STM32_TAMP_FLTCR_INIT 0 +#define STM32_TAMP_IER_INIT 0 /* * SDC driver system settings. @@ -254,6 +261,15 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_USART3 FALSE +#define STM32_SIO_USE_UART4 FALSE +#define STM32_SIO_USE_LPUART1 FALSE + /* * SPI driver system settings. */ diff --git a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h index 5710e2cb45b..d6385da6249 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -41,6 +41,7 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_CLOCK_DYNAMIC FALSE #define STM32_VOS STM32_VOS_RANGE1 #define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) @@ -274,7 +275,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -289,6 +289,13 @@ /* * RTC driver system settings. */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_TAMP_CR1_INIT 0 +#define STM32_TAMP_CR2_INIT 0 +#define STM32_TAMP_FLTCR_INIT 0 +#define STM32_TAMP_IER_INIT 0 /* * SDC driver system settings. @@ -304,6 +311,16 @@ #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_USART3 FALSE +#define STM32_SIO_USE_UART4 FALSE +#define STM32_SIO_USE_UART5 FALSE +#define STM32_SIO_USE_LPUART1 FALSE + /* * SPI driver system settings. */ @@ -383,5 +400,6 @@ */ #define STM32_WSPI_USE_QUADSPI1 FALSE #define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 1 #endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h index 2e37d95fe39..de5f85acdd9 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h @@ -18,7 +18,4 @@ #include_next "board.h" #undef STM32L432xx - -// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2. -// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443. -#define STM32L443xx +#define STM32L422xx diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/config.h index fc9055ccfb5..d67de4cfe2e 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/config.h @@ -18,8 +18,6 @@ /* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606. */ -#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH - #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h index 8ad5a8da216..47f1598b743 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,12 +32,7 @@ #define MCUCONF_H #define STM32L4xx_MCUCONF -#define STM32L412_MCUCONF #define STM32L422_MCUCONF -#define STM32L432_MCUCONF -#define STM32L433_MCUCONF -#define STM32L442_MCUCONF -#define STM32L443_MCUCONF /* * HAL driver system settings. @@ -52,16 +47,13 @@ #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE #define STM32_MSIPLL_ENABLED FALSE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_SAI1_CLOCK_ENABLED TRUE -#define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI16 #define STM32_PLLM_VALUE 4 #define STM32_PLLN_VALUE 80 +#define STM32_PLLPDIV_VALUE 0 #define STM32_PLLP_VALUE 7 #define STM32_PLLQ_VALUE 4 #define STM32_PLLR_VALUE 4 @@ -73,29 +65,22 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK #define STM32_PLLSAI1N_VALUE 72 +#define STM32_PLLSAI1PDIV_VALUE 6 #define STM32_PLLSAI1P_VALUE 7 #define STM32_PLLSAI1Q_VALUE 6 #define STM32_PLLSAI1R_VALUE 6 -#define STM32_PLLSAI2N_VALUE 72 -#define STM32_PLLSAI2P_VALUE 7 -#define STM32_PLLSAI2R_VALUE 6 /* * Peripherals clock sources. */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK -#define STM32_USART3SEL STM32_USART3SEL_SYSCLK -#define STM32_UART4SEL STM32_UART4SEL_SYSCLK -#define STM32_UART5SEL STM32_UART5SEL_SYSCLK #define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK #define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK -#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK #define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1 #define STM32_SAI1SEL STM32_SAI1SEL_OFF -#define STM32_SAI2SEL STM32_SAI2SEL_OFF #define STM32_CLK48SEL STM32_CLK48SEL_HSI48 #define STM32_ADCSEL STM32_ADCSEL_SYSCLK #define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1 @@ -127,7 +112,6 @@ #define STM32_IRQ_USART1_PRIORITY 12 #define STM32_IRQ_USART2_PRIORITY 12 -#define STM32_IRQ_USART3_PRIORITY 12 #define STM32_IRQ_LPUART1_PRIORITY 12 /* @@ -137,29 +121,15 @@ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC12_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_ADC123_PRESC ADC_CCR_PRESC_DIV2 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 FALSE -#define STM32_DAC_USE_DAC1_CH2 FALSE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) /* * GPT driver system settings. @@ -198,7 +168,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM15 FALSE @@ -218,23 +187,22 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_LPUART1_PRIORITY 12 + +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_LPUART1 FALSE /* * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* diff --git a/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/config.h index b1838b30a8a..839d031ca4b 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/config.h @@ -2,9 +2,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later #pragma once -// Fixup equivalent usages within QMK as the base board definitions only go up to high -#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH - #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif diff --git a/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/mcuconf.h index 707134d49ef..be64b048124 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_L432XC/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -33,7 +33,6 @@ #define STM32L4xx_MCUCONF #define STM32L432_MCUCONF -#define STM32L433_MCUCONF /* * HAL driver system settings. @@ -183,7 +182,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM15 FALSE @@ -203,9 +201,13 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_LPUART1_PRIORITY 12 + +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_LPUART1 FALSE /* * SPI driver system settings. diff --git a/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h index fc9055ccfb5..d67de4cfe2e 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h @@ -18,8 +18,6 @@ /* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606. */ -#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH - #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h index f8123329603..cc10304a3fb 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,27 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_1_ +#define _CHIBIOS_RT_CONF_VER_7_0_ + +/*===========================================================================*/ +/** + * @name System settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Handling of instances. + * @note If enabled then threads assigned to various instances can + * interact each other using the same synchronization objects. + * If disabled then each OS instance is a separate world, no + * direct interactions are handled by the OS. + */ +#if !defined(CH_CFG_SMP_MODE) +#define CH_CFG_SMP_MODE FALSE +#endif + +/** @} */ /*===========================================================================*/ /** @@ -160,6 +180,16 @@ #define CH_CFG_USE_TM TRUE #endif +/** + * @brief Time Stamps APIs. + * @details If enabled then the time stamps APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TIMESTAMP) +#define CH_CFG_USE_TIMESTAMP TRUE +#endif + /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. @@ -631,7 +661,7 @@ * @details User fields added to the end of the @p ch_system_t structure. */ #define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ + /* Add system custom fields here.*/ /** * @brief System initialization hook. @@ -639,7 +669,23 @@ * just before interrupts are enabled globally. */ #define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ + /* Add system initialization code here.*/ \ +} + +/** + * @brief OS instance structure extension. + * @details User fields added to the end of the @p os_instance_t structure. + */ +#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ + /* Add OS instance custom fields here.*/ + +/** + * @brief OS instance initialization hook. + * + * @param[in] oip pointer to the @p os_instance_t structure + */ +#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ + /* Add OS instance initialization code here.*/ \ } /** @@ -655,6 +701,8 @@ * * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ @@ -663,6 +711,8 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -671,6 +721,9 @@ /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. + * + * @param[in] ntp thread being switched in + * @param[in] otp thread being switched out */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ @@ -745,6 +798,14 @@ /* Trace code here.*/ \ } +/** + * @brief Runtime Faults Collection Unit hook. + * @details This hook is invoked each time new faults are collected and stored. + */ +#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ + /* Faults handling code here.*/ \ +} + /** @} */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h index d7a639a6d07..8367328a04c 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,7 @@ #define HALCONF_H #define _CHIBIOS_HAL_CONF_ -#define _CHIBIOS_HAL_CONF_VER_7_1_ +#define _CHIBIOS_HAL_CONF_VER_8_0_ #include @@ -415,6 +415,26 @@ #define SERIAL_BUFFERS_SIZE 128 #endif +/*===========================================================================*/ +/* SIO driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SIO_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Support for thread synchronization API. + */ +#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) +#define SIO_USE_SYNCHRONIZATION TRUE +#endif + /*===========================================================================*/ /* SERIAL_USB driver related setting. */ /*===========================================================================*/ @@ -451,11 +471,10 @@ #endif /** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. + * @brief Inserts an assertion on function errors before returning. */ -#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -#define SPI_USE_CIRCULAR FALSE +#if !defined(SPI_USE_ASSERT_ON_ERROR) || defined(__DOXYGEN__) +#define SPI_USE_ASSERT_ON_ERROR TRUE #endif /** diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h index 4d7b586c085..cab4c29cf65 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -186,7 +186,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 TRUE diff --git a/platforms/chibios/boards/common/configs/chconf.h b/platforms/chibios/boards/common/configs/chconf.h index 18ad609ca13..5db836e37c2 100644 --- a/platforms/chibios/boards/common/configs/chconf.h +++ b/platforms/chibios/boards/common/configs/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,27 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_1_ +#define _CHIBIOS_RT_CONF_VER_7_0_ + +/*===========================================================================*/ +/** + * @name System settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Handling of instances. + * @note If enabled then threads assigned to various instances can + * interact each other using the same synchronization objects. + * If disabled then each OS instance is a separate world, no + * direct interactions are handled by the OS. + */ +#if !defined(CH_CFG_SMP_MODE) +#define CH_CFG_SMP_MODE FALSE +#endif + +/** @} */ /*===========================================================================*/ /** @@ -160,6 +180,16 @@ #define CH_CFG_USE_TM FALSE #endif +/** + * @brief Time Stamps APIs. + * @details If enabled then the time stamps APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TIMESTAMP) +#define CH_CFG_USE_TIMESTAMP TRUE +#endif + /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. @@ -631,7 +661,7 @@ * @details User fields added to the end of the @p ch_system_t structure. */ #define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ + /* Add system custom fields here.*/ /** * @brief System initialization hook. @@ -639,7 +669,23 @@ * just before interrupts are enabled globally. */ #define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ + /* Add system initialization code here.*/ \ +} + +/** + * @brief OS instance structure extension. + * @details User fields added to the end of the @p os_instance_t structure. + */ +#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ + /* Add OS instance custom fields here.*/ + +/** + * @brief OS instance initialization hook. + * + * @param[in] oip pointer to the @p os_instance_t structure + */ +#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ + /* Add OS instance initialization code here.*/ \ } /** @@ -655,6 +701,8 @@ * * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ @@ -663,6 +711,8 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -671,6 +721,9 @@ /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. + * + * @param[in] ntp thread being switched in + * @param[in] otp thread being switched out */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ @@ -745,6 +798,14 @@ /* Trace code here.*/ \ } +/** + * @brief Runtime Faults Collection Unit hook. + * @details This hook is invoked each time new faults are collected and stored. + */ +#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ + /* Faults handling code here.*/ \ +} + /** @} */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/common/configs/halconf.h b/platforms/chibios/boards/common/configs/halconf.h index c80f67ee27c..1805a774389 100644 --- a/platforms/chibios/boards/common/configs/halconf.h +++ b/platforms/chibios/boards/common/configs/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,7 @@ #define HALCONF_H #define _CHIBIOS_HAL_CONF_ -#define _CHIBIOS_HAL_CONF_VER_7_1_ +#define _CHIBIOS_HAL_CONF_VER_8_0_ #include @@ -415,6 +415,26 @@ #define SERIAL_BUFFERS_SIZE 128 #endif +/*===========================================================================*/ +/* SIO driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SIO_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Support for thread synchronization API. + */ +#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) +#define SIO_USE_SYNCHRONIZATION TRUE +#endif + /*===========================================================================*/ /* SERIAL_USB driver related setting. */ /*===========================================================================*/ @@ -451,11 +471,10 @@ #endif /** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. + * @brief Inserts an assertion on function errors before returning. */ -#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -#define SPI_USE_CIRCULAR FALSE +#if !defined(SPI_USE_ASSERT_ON_ERROR) || defined(__DOXYGEN__) +#define SPI_USE_ASSERT_ON_ERROR TRUE #endif /** diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index 76191db1657..01d8148875f 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -139,7 +139,33 @@ void ws2812_init(void) { #endif // WS2812_SPI_SCK_PIN // TODO: more dynamic baudrate - static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR_CR1_BR_X}; + static const SPIConfig spicfg = { +#ifndef HAL_LLD_SELECT_SPI_V2 +// HAL_SPI_V1 +# if SPI_SUPPORTS_CIRCULAR == TRUE + WS2812_SPI_BUFFER_MODE, +# endif + NULL, // end_cb + PAL_PORT(RGB_DI_PIN), + PAL_PAD(RGB_DI_PIN), + WS2812_SPI_DIVISOR_CR1_BR_X, + 0 +#else + // HAL_SPI_V2 +# if SPI_SUPPORTS_CIRCULAR == TRUE + WS2812_SPI_BUFFER_MODE, +# endif +# if SPI_SUPPORTS_SLAVE_MODE == TRUE + false, +# endif + NULL, // data_cb + NULL, // error_cb + PAL_PORT(RGB_DI_PIN), + PAL_PAD(RGB_DI_PIN), + WS2812_SPI_DIVISOR_CR1_BR_X, + 0 +#endif + }; spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */ spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ diff --git a/platforms/chibios/platform.mk b/platforms/chibios/platform.mk index 6fd1fd83f5a..91dd0479bc0 100644 --- a/platforms/chibios/platform.mk +++ b/platforms/chibios/platform.mk @@ -39,7 +39,6 @@ ifeq ($(strip $(MCU)), risc-v) STARTUP_MK = $(CHIBIOS_CONTRIB)/os/common/startup/RISCV-ECLIC/compilers/GCC/mk/startup_$(MCU_STARTUP).mk PORT_V = $(CHIBIOS_CONTRIB)/os/common/ports/RISCV-ECLIC/compilers/GCC/mk/port.mk RULESPATH = $(CHIBIOS_CONTRIB)/os/common/startup/RISCV-ECLIC/compilers/GCC - PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/GD/GD32VF103/platform.mk else # ARM Support CHIBIOS_PORT ?= @@ -82,10 +81,15 @@ ifeq ("$(PLATFORM_NAME)","") PLATFORM_NAME = platform endif +# If no MCU port name was specified, use the family instead +ifeq ("$(MCU_PORT_NAME)","") + MCU_PORT_NAME = $(MCU_FAMILY) +endif + ifeq ("$(wildcard $(PLATFORM_MK))","") - PLATFORM_MK = $(CHIBIOS)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLATFORM_NAME).mk + PLATFORM_MK = $(CHIBIOS)/os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES)/$(PLATFORM_NAME).mk ifeq ("$(wildcard $(PLATFORM_MK))","") - PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLATFORM_NAME).mk + PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES)/$(PLATFORM_NAME).mk endif endif diff --git a/platforms/chibios/timer.c b/platforms/chibios/timer.c index e3bdfdcc372..5e01ea63724 100644 --- a/platforms/chibios/timer.c +++ b/platforms/chibios/timer.c @@ -40,7 +40,7 @@ static virtual_timer_t update_timer; # define UPDATE_INTERVAL (((sysinterval_t)1) << (CH_CFG_ST_RESOLUTION - 1)) // VT callback function to keep the overflow bits of the system tick counter updated. -static void update_fn(void *arg) { +static void update_fn(struct ch_virtual_timer *timer, void *arg) { (void)arg; chSysLockFromISR(); get_system_time_ticks(); diff --git a/platforms/chibios/wait.c b/platforms/chibios/wait.c index 56fd6ffcece..88cb5e6d549 100644 --- a/platforms/chibios/wait.c +++ b/platforms/chibios/wait.c @@ -31,7 +31,7 @@ void wait_us(uint16_t duration) { * Only use this timer on the main thread; * other threads need to use their own timer. */ - if (chThdGetSelfX() == &ch.mainthread && duration < (1ULL << (sizeof(gptcnt_t) * 8))) { + if (chThdGetSelfX() == &(currcore->mainthread) && duration < (1ULL << (sizeof(gptcnt_t) * 8))) { gptStart(&WAIT_US_TIMER, &gpt_cfg); gptPolledDelay(&WAIT_US_TIMER, duration); } else { diff --git a/util/uf2conv.py b/util/uf2conv.py index 8677a828c9f..efc7263f834 100755 --- a/util/uf2conv.py +++ b/util/uf2conv.py @@ -6,40 +6,13 @@ import re import os import os.path import argparse +import json UF2_MAGIC_START0 = 0x0A324655 # "UF2\n" UF2_MAGIC_START1 = 0x9E5D5157 # Randomly selected UF2_MAGIC_END = 0x0AB16F30 # Ditto -families = { - 'SAMD21': 0x68ed2b88, - 'SAML21': 0x1851780a, - 'SAMD51': 0x55114460, - 'NRF52': 0x1b57745f, - 'STM32F0': 0x647824b6, - 'STM32F1': 0x5ee21072, - 'STM32F2': 0x5d1a0a2e, - 'STM32F3': 0x6b846188, - 'STM32F4': 0x57755a57, - 'STM32F7': 0x53b80f00, - 'STM32G0': 0x300f5633, - 'STM32G4': 0x4c71240a, - 'STM32H7': 0x6db66082, - 'STM32L0': 0x202e3a91, - 'STM32L1': 0x1e1f432d, - 'STM32L4': 0x00ff6919, - 'STM32L5': 0x04240bdf, - 'STM32WB': 0x70d16653, - 'STM32WL': 0x21460ff0, - 'ATMEGA32': 0x16573617, - 'MIMXRT10XX': 0x4FB2D5BD, - 'LPC55': 0x2abc77ec, - 'GD32F350': 0x31D228C6, - 'ESP32S2': 0xbfdd4eee, - 'RP2040': 0xe48bff56 -} - INFO_FILE = "/INFO_UF2.TXT" appstartaddr = 0x2000 @@ -61,8 +34,13 @@ def is_hex(buf): def convert_from_uf2(buf): global appstartaddr + global familyid numblocks = len(buf) // 512 curraddr = None + currfamilyid = None + families_found = {} + prev_flag = None + all_flags_same = True outp = [] for blockno in range(numblocks): ptr = blockno * 512 @@ -78,9 +56,13 @@ def convert_from_uf2(buf): if datalen > 476: assert False, "Invalid UF2 data size at " + ptr newaddr = hd[3] - if curraddr is None: - appstartaddr = newaddr + if (hd[2] & 0x2000) and (currfamilyid == None): + currfamilyid = hd[7] + if curraddr == None or ((hd[2] & 0x2000) and hd[7] != currfamilyid): + currfamilyid = hd[7] curraddr = newaddr + if familyid == 0x0 or familyid == hd[7]: + appstartaddr = newaddr padding = newaddr - curraddr if padding < 0: assert False, "Block out of order at " + ptr @@ -91,8 +73,37 @@ def convert_from_uf2(buf): while padding > 0: padding -= 4 outp += b"\x00\x00\x00\x00" - outp.append(block[32 : 32 + datalen]) + if familyid == 0x0 or ((hd[2] & 0x2000) and familyid == hd[7]): + outp.append(block[32 : 32 + datalen]) curraddr = newaddr + datalen + if hd[2] & 0x2000: + if hd[7] in families_found.keys(): + if families_found[hd[7]] > newaddr: + families_found[hd[7]] = newaddr + else: + families_found[hd[7]] = newaddr + if prev_flag == None: + prev_flag = hd[2] + if prev_flag != hd[2]: + all_flags_same = False + if blockno == (numblocks - 1): + print("--- UF2 File Header Info ---") + families = load_families() + for family_hex in families_found.keys(): + family_short_name = "" + for name, value in families.items(): + if value == family_hex: + family_short_name = name + print("Family ID is {:s}, hex value is 0x{:08x}".format(family_short_name,family_hex)) + print("Target Address is 0x{:08x}".format(families_found[family_hex])) + if all_flags_same: + print("All block flag values consistent, 0x{:04x}".format(hd[2])) + else: + print("Flags were not all the same") + print("----------------------------") + if len(families_found) > 1 and familyid == 0x0: + outp = [] + appstartaddr = 0x0 return b"".join(outp) def convert_to_carray(file_content): @@ -166,12 +177,11 @@ def convert_from_hex_to_uf2(buf): upper = ((rec[4] << 8) | rec[5]) << 16 elif tp == 2: upper = ((rec[4] << 8) | rec[5]) << 4 - assert (upper & 0xffff) == 0 elif tp == 1: break elif tp == 0: - addr = upper | (rec[1] << 8) | rec[2] - if appstartaddr is None: + addr = upper + ((rec[1] << 8) | rec[2]) + if appstartaddr == None: appstartaddr = addr i = 4 while i < len(rec) - 1: @@ -215,7 +225,7 @@ def get_drives(): def has_info(d): try: return os.path.isfile(d + INFO_FILE) - except Exception: + except: return False return list(filter(has_info, drives)) @@ -238,6 +248,22 @@ def write_file(name, buf): print("Wrote %d bytes to %s" % (len(buf), name)) +def load_families(): + # The expectation is that the `uf2families.json` file is in the same + # directory as this script. Make a path that works using `__file__` + # which contains the full path to this script. + filename = "uf2families.json" + pathname = os.path.join(os.path.dirname(os.path.abspath(__file__)), filename) + with open(pathname) as f: + raw_families = json.load(f) + + families = {} + for family in raw_families: + families[family["short_name"]] = int(family["id"], 0) + + return families + + def main(): global appstartaddr, familyid def error(msg): @@ -264,9 +290,13 @@ def main(): help='specify familyID - number or name (default: 0x0)') parser.add_argument('-C' , '--carray', action='store_true', help='convert binary file to a C array, not UF2') + parser.add_argument('-i', '--info', action='store_true', + help='display header information from UF2, do not convert') args = parser.parse_args() appstartaddr = int(args.base, 0) + families = load_families() + if args.family.upper() in families: familyid = families[args.family.upper()] else: @@ -286,9 +316,12 @@ def main(): ext = "uf2" if args.deploy: outbuf = inpbuf - elif from_uf2: + elif from_uf2 and not args.info: outbuf = convert_from_uf2(inpbuf) ext = "bin" + elif from_uf2 and args.info: + outbuf = "" + convert_from_uf2(inpbuf) elif is_hex(inpbuf): outbuf = convert_from_hex_to_uf2(inpbuf.decode("utf-8")) elif args.carray: @@ -296,11 +329,12 @@ def main(): ext = "h" else: outbuf = convert_to_uf2(inpbuf) - print("Converting to %s, output size: %d, start address: 0x%x" % - (ext, len(outbuf), appstartaddr)) + if not args.deploy and not args.info: + print("Converted to %s, output size: %d, start address: 0x%x" % + (ext, len(outbuf), appstartaddr)) if args.convert or ext != "uf2": drives = [] - if args.output is None: + if args.output == None: args.output = "flash." + ext else: drives = get_drives() diff --git a/util/uf2families.json b/util/uf2families.json new file mode 100644 index 00000000000..fafae82a60a --- /dev/null +++ b/util/uf2families.json @@ -0,0 +1,192 @@ +[ + { + "id": "0x16573617", + "short_name": "ATMEGA32", + "description": "Microchip (Atmel) ATmega32" + }, + { + "id": "0x1851780a", + "short_name": "SAML21", + "description": "Microchip (Atmel) SAML21" + }, + { + "id": "0x1b57745f", + "short_name": "NRF52", + "description": "Nordic NRF52" + }, + { + "id": "0x1c5f21b0", + "short_name": "ESP32", + "description": "ESP32" + }, + { + "id": "0x1e1f432d", + "short_name": "STM32L1", + "description": "ST STM32L1xx" + }, + { + "id": "0x202e3a91", + "short_name": "STM32L0", + "description": "ST STM32L0xx" + }, + { + "id": "0x21460ff0", + "short_name": "STM32WL", + "description": "ST STM32WLxx" + }, + { + "id": "0x2abc77ec", + "short_name": "LPC55", + "description": "NXP LPC55xx" + }, + { + "id": "0x300f5633", + "short_name": "STM32G0", + "description": "ST STM32G0xx" + }, + { + "id": "0x31d228c6", + "short_name": "GD32F350", + "description": "GD32F350" + }, + { + "id": "0x04240bdf", + "short_name": "STM32L5", + "description": "ST STM32L5xx" + }, + { + "id": "0x4c71240a", + "short_name": "STM32G4", + "description": "ST STM32G4xx" + }, + { + "id": "0x4fb2d5bd", + "short_name": "MIMXRT10XX", + "description": "NXP i.MX RT10XX" + }, + { + "id": "0x53b80f00", + "short_name": "STM32F7", + "description": "ST STM32F7xx" + }, + { + "id": "0x55114460", + "short_name": "SAMD51", + "description": "Microchip (Atmel) SAMD51" + }, + { + "id": "0x57755a57", + "short_name": "STM32F4", + "description": "ST STM32F401" + }, + { + "id": "0x5a18069b", + "short_name": "FX2", + "description": "Cypress FX2" + }, + { + "id": "0x5d1a0a2e", + "short_name": "STM32F2", + "description": "ST STM32F2xx" + }, + { + "id": "0x5ee21072", + "short_name": "STM32F1", + "description": "ST STM32F103" + }, + { + "id": "0x621e937a", + "short_name": "NRF52833", + "description": "Nordic NRF52833" + }, + { + "id": "0x647824b6", + "short_name": "STM32F0", + "description": "ST STM32F0xx" + }, + { + "id": "0x68ed2b88", + "short_name": "SAMD21", + "description": "Microchip (Atmel) SAMD21" + }, + { + "id": "0x6b846188", + "short_name": "STM32F3", + "description": "ST STM32F3xx" + }, + { + "id": "0x6d0922fa", + "short_name": "STM32F407", + "description": "ST STM32F407" + }, + { + "id": "0x6db66082", + "short_name": "STM32H7", + "description": "ST STM32H7xx" + }, + { + "id": "0x70d16653", + "short_name": "STM32WB", + "description": "ST STM32WBxx" + }, + { + "id": "0x7eab61ed", + "short_name": "ESP8266", + "description": "ESP8266" + }, + { + "id": "0x7f83e793", + "short_name": "KL32L2", + "description": "NXP KL32L2x" + }, + { + "id": "0x8fb060fe", + "short_name": "STM32F407VG", + "description": "ST STM32F407VG" + }, + { + "id": "0xada52840", + "short_name": "NRF52840", + "description": "Nordic NRF52840" + }, + { + "id": "0xbfdd4eee", + "short_name": "ESP32S2", + "description": "ESP32-S2" + }, + { + "id": "0xc47e5767", + "short_name": "ESP32S3", + "description": "ESP32-S3" + }, + { + "id": "0xd42ba06c", + "short_name": "ESP32C3", + "description": "ESP32-C3" + }, + { + "id": "0x2b88d29c", + "short_name": "ESP32C2", + "description": "ESP32-C2" + }, + { + "id": "0x332726f6", + "short_name": "ESP32H2", + "description": "ESP32-H2" + }, + { + "id": "0xe48bff56", + "short_name": "RP2040", + "description": "Raspberry Pi RP2040" + }, + { + "id": "0x00ff6919", + "short_name": "STM32L4", + "description": "ST STM32L4xx" + }, + { + "id": "0x9af03e33", + "short_name": "GD32VF103", + "description": "GigaDevice GD32VF103" + } +]