* Add Iron165 * CannonKeys new boards and cleanup * Tmo50 info json * Update readme for TMOv2 * update via keymap tmo * info json again * Apply suggestions from code review Co-Authored-By: Drashna Jaelre <drashna@live.com> * Address PR comments * More changes for rules files cleanup * info.json fixed? * Fix Savage65 matrix * Apply suggestions from code review Thanks noroadsleft for the improvements! Co-Authored-By: noroadsleft <18669334+noroadsleft@users.noreply.github.com> * Bump eeprom version * Apply suggestions from code review Co-Authored-By: noroadsleft <18669334+noroadsleft@users.noreply.github.com>pull/7203/head
@ -0,0 +1,109 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* This file has been automatically generated using ChibiStudio board | |||
* generator plugin. Do not edit manually. | |||
*/ | |||
#include "hal.h" | |||
#if HAL_USE_PAL || defined(__DOXYGEN__) | |||
/** | |||
* @brief PAL setup. | |||
* @details Digital I/O ports static configuration as defined in @p board.h. | |||
* This variable is used by the HAL when initializing the PAL driver. | |||
*/ | |||
const PALConfig pal_default_config = { | |||
#if STM32_HAS_GPIOA | |||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | |||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOB | |||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | |||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOC | |||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | |||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOD | |||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | |||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOE | |||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | |||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOF | |||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | |||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOG | |||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | |||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOH | |||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | |||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOI | |||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | |||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} | |||
#endif | |||
}; | |||
#endif | |||
void enter_bootloader_mode_if_requested(void); | |||
/** | |||
* @brief Early initialization code. | |||
* @details This initialization must be performed just after stack setup | |||
* and before any other initialization. | |||
*/ | |||
void __early_init(void) { | |||
enter_bootloader_mode_if_requested(); | |||
stm32_clock_init(); | |||
} | |||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | |||
/** | |||
* @brief MMC_SPI card detection. | |||
*/ | |||
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | |||
(void)mmcp; | |||
/* TODO: Fill the implementation.*/ | |||
return true; | |||
} | |||
/** | |||
* @brief MMC_SPI card write protection detection. | |||
*/ | |||
bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | |||
(void)mmcp; | |||
/* TODO: Fill the implementation.*/ | |||
return false; | |||
} | |||
#endif | |||
/** | |||
* @brief Board-specific initialization code. | |||
* @todo Add your board-specific code, if any. | |||
*/ | |||
void boardInit(void) { | |||
} |
@ -0,0 +1,922 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* This file has been automatically generated using ChibiStudio board | |||
* generator plugin. Do not edit manually. | |||
*/ | |||
#ifndef BOARD_H | |||
#define BOARD_H | |||
/* | |||
* Setup for ST STM32F072B-Discovery board. | |||
*/ | |||
/* | |||
* Board identifier. | |||
*/ | |||
#define BOARD_ST_STM32F072B_DISCOVERY | |||
#define BOARD_NAME "ST STM32F072B-Discovery" | |||
/* | |||
* Board oscillators-related settings. | |||
* NOTE: HSE not fitted. | |||
*/ | |||
#if !defined(STM32_LSECLK) | |||
#define STM32_LSECLK 32768 | |||
#endif | |||
#define STM32_LSEDRV (3U << 3U) | |||
#if !defined(STM32_HSECLK) | |||
#define STM32_HSECLK 0U | |||
#endif | |||
#define STM32_HSE_BYPASS | |||
/* | |||
* MCU type as defined in the ST header. | |||
*/ | |||
#define STM32F072xB | |||
/* | |||
* IO pins assignments. | |||
*/ | |||
#define GPIOA_BUTTON 0U | |||
#define GPIOA_PIN1 1U | |||
#define GPIOA_PIN2 2U | |||
#define GPIOA_PIN3 3U | |||
#define GPIOA_PIN4 4U | |||
#define GPIOA_PIN5 5U | |||
#define GPIOA_PIN6 6U | |||
#define GPIOA_PIN7 7U | |||
#define GPIOA_PIN8 8U | |||
#define GPIOA_PIN9 9U | |||
#define GPIOA_PIN10 10U | |||
#define GPIOA_USB_DM 11U | |||
#define GPIOA_USB_DP 12U | |||
#define GPIOA_SWDIO 13U | |||
#define GPIOA_SWCLK 14U | |||
#define GPIOA_PIN15 15U | |||
#define GPIOB_PIN0 0U | |||
#define GPIOB_PIN1 1U | |||
#define GPIOB_PIN2 2U | |||
#define GPIOB_PIN3 3U | |||
#define GPIOB_PIN4 4U | |||
#define GPIOB_PIN5 5U | |||
#define GPIOB_PIN6 6U | |||
#define GPIOB_PIN7 7U | |||
#define GPIOB_PIN8 8U | |||
#define GPIOB_PIN9 9U | |||
#define GPIOB_PIN10 10U | |||
#define GPIOB_PIN11 11U | |||
#define GPIOB_PIN12 12U | |||
#define GPIOB_SPI2_SCK 13U | |||
#define GPIOB_SPI2_MISO 14U | |||
#define GPIOB_SPI2_MOSI 15U | |||
#define GPIOC_MEMS_CS 0U | |||
#define GPIOC_PIN1 1U | |||
#define GPIOC_PIN2 2U | |||
#define GPIOC_PIN3 3U | |||
#define GPIOC_PIN4 4U | |||
#define GPIOC_PIN5 5U | |||
#define GPIOC_LED_RED 6U | |||
#define GPIOC_LED_BLUE 7U | |||
#define GPIOC_LED_ORANGE 8U | |||
#define GPIOC_LED_GREEN 9U | |||
#define GPIOC_PIN10 10U | |||
#define GPIOC_PIN11 11U | |||
#define GPIOC_PIN12 12U | |||
#define GPIOC_PIN13 13U | |||
#define GPIOC_OSC32_IN 14U | |||
#define GPIOC_OSC32_OUT 15U | |||
#define GPIOD_PIN0 0U | |||
#define GPIOD_PIN1 1U | |||
#define GPIOD_PIN2 2U | |||
#define GPIOD_PIN3 3U | |||
#define GPIOD_PIN4 4U | |||
#define GPIOD_PIN5 5U | |||
#define GPIOD_PIN6 6U | |||
#define GPIOD_PIN7 7U | |||
#define GPIOD_PIN8 8U | |||
#define GPIOD_PIN9 9U | |||
#define GPIOD_PIN10 10U | |||
#define GPIOD_PIN11 11U | |||
#define GPIOD_PIN12 12U | |||
#define GPIOD_PIN13 13U | |||
#define GPIOD_PIN14 14U | |||
#define GPIOD_PIN15 15U | |||
#define GPIOE_PIN0 0U | |||
#define GPIOE_PIN1 1U | |||
#define GPIOE_PIN2 2U | |||
#define GPIOE_PIN3 3U | |||
#define GPIOE_PIN4 4U | |||
#define GPIOE_PIN5 5U | |||
#define GPIOE_PIN6 6U | |||
#define GPIOE_PIN7 7U | |||
#define GPIOE_PIN8 8U | |||
#define GPIOE_PIN9 9U | |||
#define GPIOE_PIN10 10U | |||
#define GPIOE_PIN11 11U | |||
#define GPIOE_PIN12 12U | |||
#define GPIOE_PIN13 13U | |||
#define GPIOE_PIN14 14U | |||
#define GPIOE_PIN15 15U | |||
#define GPIOF_OSC_IN 0U | |||
#define GPIOF_OSC_OUT 1U | |||
#define GPIOF_PIN2 2U | |||
#define GPIOF_PIN3 3U | |||
#define GPIOF_PIN4 4U | |||
#define GPIOF_PIN5 5U | |||
#define GPIOF_PIN6 6U | |||
#define GPIOF_PIN7 7U | |||
#define GPIOF_PIN8 8U | |||
#define GPIOF_PIN9 9U | |||
#define GPIOF_PIN10 10U | |||
#define GPIOF_PIN11 11U | |||
#define GPIOF_PIN12 12U | |||
#define GPIOF_PIN13 13U | |||
#define GPIOF_PIN14 14U | |||
#define GPIOF_PIN15 15U | |||
/* | |||
* IO lines assignments. | |||
*/ | |||
#define LINE_BUTTON PAL_LINE(GPIOA, 0U) | |||
#define LINE_USB_DM PAL_LINE(GPIOA, 11U) | |||
#define LINE_USB_DP PAL_LINE(GPIOA, 12U) | |||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U) | |||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U) | |||
#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) | |||
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) | |||
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) | |||
#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) | |||
#define LINE_LED_RED PAL_LINE(GPIOC, 6U) | |||
#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) | |||
#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U) | |||
#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) | |||
#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | |||
#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | |||
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) | |||
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) | |||
/* | |||
* I/O ports initial setup, this configuration is established soon after reset | |||
* in the initialization code. | |||
* Please refer to the STM32 Reference Manual for details. | |||
*/ | |||
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | |||
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | |||
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | |||
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | |||
#define PIN_ODR_LOW(n) (0U << (n)) | |||
#define PIN_ODR_HIGH(n) (1U << (n)) | |||
#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | |||
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | |||
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | |||
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | |||
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | |||
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | |||
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | |||
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | |||
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | |||
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | |||
/* | |||
* GPIOA setup: | |||
* | |||
* PA0 - BUTTON (input floating). | |||
* PA1 - PIN1 (input pullup). | |||
* PA2 - PIN2 (input pullup). | |||
* PA3 - PIN3 (input pullup). | |||
* PA4 - PIN4 (input pullup). | |||
* PA5 - PIN5 (input pullup). | |||
* PA6 - PIN6 (input pullup). | |||
* PA7 - PIN7 (input pullup). | |||
* PA8 - PIN8 (input pullup). | |||
* PA9 - PIN9 (input pullup). | |||
* PA10 - PIN10 (input pullup). | |||
* PA11 - USB_DM (input floating). | |||
* PA12 - USB_DP (input floating). | |||
* PA13 - SWDIO (alternate 0). | |||
* PA14 - SWCLK (alternate 0). | |||
* PA15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOA_USB_DM) | \ | |||
PIN_MODE_INPUT(GPIOA_USB_DP) | \ | |||
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ | |||
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN15)) | |||
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | |||
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \ | |||
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ | |||
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ | |||
PIN_OSPEED_HIGH(GPIOA_PIN15)) | |||
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ | |||
PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ | |||
PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ | |||
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN15)) | |||
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOA_USB_DM) | \ | |||
PIN_ODR_HIGH(GPIOA_USB_DP) | \ | |||
PIN_ODR_HIGH(GPIOA_SWDIO) | \ | |||
PIN_ODR_HIGH(GPIOA_SWCLK) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN15)) | |||
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN7, 0U)) | |||
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_USB_DM, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_USB_DP, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN15, 0U)) | |||
/* | |||
* GPIOB setup: | |||
* | |||
* PB0 - PIN0 (input pullup). | |||
* PB1 - PIN1 (input pullup). | |||
* PB2 - PIN2 (input pullup). | |||
* PB3 - PIN3 (input pullup). | |||
* PB4 - PIN4 (input pullup). | |||
* PB5 - PIN5 (input pullup). | |||
* PB6 - PIN6 (input pullup). | |||
* PB7 - PIN7 (input pullup). | |||
* PB8 - PIN8 (input pullup). | |||
* PB9 - PIN9 (input pullup). | |||
* PB10 - PIN10 (input pullup). | |||
* PB11 - PIN11 (input pullup). | |||
* PB12 - PIN12 (input pullup). | |||
* PB13 - SPI2_SCK (alternate 0). | |||
* PB14 - SPI2_MISO (alternate 0). | |||
* PB15 - SPI2_MOSI (alternate 0). | |||
*/ | |||
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN12) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN3) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_MISO) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN7, 0U)) | |||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U)) | |||
/* | |||
* GPIOC setup: | |||
* | |||
* PC0 - MEMS_CS (output pushpull maximum). | |||
* PC1 - PIN1 (input pullup). | |||
* PC2 - PIN2 (input pullup). | |||
* PC3 - PIN3 (input pullup). | |||
* PC4 - PIN4 (input pullup). | |||
* PC5 - PIN5 (input pullup). | |||
* PC6 - LED_RED (output pushpull maximum). | |||
* PC7 - LED_BLUE (output pushpull maximum). | |||
* PC8 - LED_ORANGE (output pushpull maximum). | |||
* PC9 - LED_GREEN (output pushpull maximum). | |||
* PC10 - PIN10 (input pullup). | |||
* PC11 - PIN11 (input pullup). | |||
* PC12 - PIN12 (input pullup). | |||
* PC13 - PIN13 (input pullup). | |||
* PC14 - OSC32_IN (input floating). | |||
* PC15 - OSC32_OUT (input floating). | |||
*/ | |||
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN5) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_RED) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ | |||
PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_RED) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \ | |||
PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ | |||
PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_RED) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN5) | \ | |||
PIN_ODR_LOW(GPIOC_LED_RED) | \ | |||
PIN_ODR_LOW(GPIOC_LED_BLUE) | \ | |||
PIN_ODR_LOW(GPIOC_LED_ORANGE) | \ | |||
PIN_ODR_LOW(GPIOC_LED_GREEN) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ | |||
PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_RED, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_BLUE, 0U)) | |||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | |||
/* | |||
* GPIOD setup: | |||
* | |||
* PD0 - PIN0 (input pullup). | |||
* PD1 - PIN1 (input pullup). | |||
* PD2 - PIN2 (input pullup). | |||
* PD3 - PIN3 (input pullup). | |||
* PD4 - PIN4 (input pullup). | |||
* PD5 - PIN5 (input pullup). | |||
* PD6 - PIN6 (input pullup). | |||
* PD7 - PIN7 (input pullup). | |||
* PD8 - PIN8 (input pullup). | |||
* PD9 - PIN9 (input pullup). | |||
* PD10 - PIN10 (input pullup). | |||
* PD11 - PIN11 (input pullup). | |||
* PD12 - PIN12 (input pullup). | |||
* PD13 - PIN13 (input pullup). | |||
* PD14 - PIN14 (input pullup). | |||
* PD15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN15)) | |||
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | |||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN15)) | |||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN15)) | |||
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN15)) | |||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN7, 0U)) | |||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN15, 0U)) | |||
/* | |||
* GPIOE setup: | |||
* | |||
* PE0 - PIN0 (input pullup). | |||
* PE1 - PIN1 (input pullup). | |||
* PE2 - PIN2 (input pullup). | |||
* PE3 - PIN3 (input pullup). | |||
* PE4 - PIN4 (input pullup). | |||
* PE5 - PIN5 (input pullup). | |||
* PE6 - PIN6 (input pullup). | |||
* PE7 - PIN7 (input pullup). | |||
* PE8 - PIN8 (input pullup). | |||
* PE9 - PIN9 (input pullup). | |||
* PE10 - PIN10 (input pullup). | |||
* PE11 - PIN11 (input pullup). | |||
* PE12 - PIN12 (input pullup). | |||
* PE13 - PIN13 (input pullup). | |||
* PE14 - PIN14 (input pullup). | |||
* PE15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN15)) | |||
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | |||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN15)) | |||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN15)) | |||
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN15)) | |||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN7, 0U)) | |||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN15, 0U)) | |||
/* | |||
* GPIOF setup: | |||
* | |||
* PF0 - OSC_IN (input floating). | |||
* PF1 - OSC_OUT (input floating). | |||
* PF2 - PIN2 (input pullup). | |||
* PF3 - PIN3 (input pullup). | |||
* PF4 - PIN4 (input pullup). | |||
* PF5 - PIN5 (input pullup). | |||
* PF6 - PIN6 (input pullup). | |||
* PF7 - PIN7 (input pullup). | |||
* PF8 - PIN8 (input pullup). | |||
* PF9 - PIN9 (input pullup). | |||
* PF10 - PIN10 (input pullup). | |||
* PF11 - PIN11 (input pullup). | |||
* PF12 - PIN12 (input pullup). | |||
* PF13 - PIN13 (input pullup). | |||
* PF14 - PIN14 (input pullup). | |||
* PF15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \ | |||
PIN_MODE_INPUT(GPIOF_OSC_OUT) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN15)) | |||
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | |||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN15)) | |||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \ | |||
PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN15)) | |||
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \ | |||
PIN_ODR_HIGH(GPIOF_OSC_OUT) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN15)) | |||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN7, 0U)) | |||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN15, 0U)) | |||
#if !defined(_FROM_ASM_) | |||
#ifdef __cplusplus | |||
extern "C" { | |||
#endif | |||
void boardInit(void); | |||
#ifdef __cplusplus | |||
} | |||
#endif | |||
#endif /* _FROM_ASM_ */ | |||
#endif /* BOARD_H */ |
@ -0,0 +1,5 @@ | |||
# List of all the board related files. | |||
BOARDSRC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY/board.c | |||
# Required include directories | |||
BOARDINC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY |
@ -0,0 +1,703 @@ | |||
<?xml version="1.0" encoding="UTF-8"?> | |||
<!-- STM32F0xx board Template --> | |||
<board | |||
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | |||
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd"> | |||
<configuration_settings> | |||
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path> | |||
<output_path>..</output_path> | |||
<hal_version>3.0.x</hal_version> | |||
</configuration_settings> | |||
<board_name>ST STM32F072B-Discovery</board_name> | |||
<board_id>ST_STM32F072B_DISCOVERY</board_id> | |||
<board_functions></board_functions> | |||
<subtype>STM32F072xB</subtype> | |||
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0" | |||
LSEBypass="false" LSEDrive="3 High Drive (default)" /> | |||
<ports> | |||
<GPIOA> | |||
<pin0 | |||
ID="BUTTON" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="USB_DM" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="USB_DP" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="SWDIO" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="SWCLK" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullDown" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOA> | |||
<GPIOB> | |||
<pin0 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="SPI2_SCK" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="SPI2_MISO" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="SPI2_MOSI" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
</GPIOB> | |||
<GPIOC> | |||
<pin0 | |||
ID="MEMS_CS" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="LED_RED" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="LED_BLUE" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="LED_ORANGE" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" ></pin8> | |||
<pin9 | |||
ID="LED_GREEN" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="OSC32_IN" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="OSC32_OUT" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOC> | |||
<GPIOD> | |||
<pin0 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOD> | |||
<GPIOE> | |||
<pin0 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin1 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin2 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin3 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin4 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin5 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin6 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin7 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin8 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin9 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin10 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin11 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin12 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin13 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin14 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin15 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
</GPIOE> | |||
<GPIOF> | |||
<pin0 | |||
ID="OSC_IN" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="OSC_OUT" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOF> | |||
</ports> | |||
</board> |
@ -0,0 +1,7 @@ | |||
/* Address for jumping to bootloader on STM32 chips. */ | |||
/* It is chip dependent, the correct number can be looked up here (page 175): | |||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | |||
* This also requires a patch to chibios: | |||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | |||
*/ | |||
#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800 |
@ -0,0 +1,524 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/** | |||
* @file templates/chconf.h | |||
* @brief Configuration file template. | |||
* @details A copy of this file must be placed in each project directory, it | |||
* contains the application specific kernel settings. | |||
* | |||
* @addtogroup config | |||
* @details Kernel related settings and hooks. | |||
* @{ | |||
*/ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
* @name System timers settings | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief System time counter resolution. | |||
* @note Allowed values are 16 or 32 bits. | |||
*/ | |||
#define CH_CFG_ST_RESOLUTION 32 | |||
/** | |||
* @brief System tick frequency. | |||
* @details Frequency of the system timer that drives the system ticks. This | |||
* setting also defines the system tick time unit. | |||
*/ | |||
#define CH_CFG_ST_FREQUENCY 10000 | |||
/** | |||
* @brief Time delta constant for the tick-less mode. | |||
* @note If this value is zero then the system uses the classic | |||
* periodic tick. This value represents the minimum number | |||
* of ticks that is safe to specify in a timeout directive. | |||
* The value one is not valid, timeouts are rounded up to | |||
* this value. | |||
*/ | |||
#define CH_CFG_ST_TIMEDELTA 2 | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Kernel parameters and options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Round robin interval. | |||
* @details This constant is the number of system ticks allowed for the | |||
* threads before preemption occurs. Setting this value to zero | |||
* disables the preemption for threads with equal priority and the | |||
* round robin becomes cooperative. Note that higher priority | |||
* threads can still preempt, the kernel is always preemptive. | |||
* @note Disabling the round robin preemption makes the kernel more compact | |||
* and generally faster. | |||
* @note The round robin preemption is not supported in tickless mode and | |||
* must be set to zero in that case. | |||
*/ | |||
#define CH_CFG_TIME_QUANTUM 0 | |||
/** | |||
* @brief Managed RAM size. | |||
* @details Size of the RAM area to be managed by the OS. If set to zero | |||
* then the whole available RAM is used. The core memory is made | |||
* available to the heap allocator and/or can be used directly through | |||
* the simplified core memory allocator. | |||
* | |||
* @note In order to let the OS manage the whole RAM the linker script must | |||
* provide the @p __heap_base__ and @p __heap_end__ symbols. | |||
* @note Requires @p CH_CFG_USE_MEMCORE. | |||
*/ | |||
#define CH_CFG_MEMCORE_SIZE 0 | |||
/** | |||
* @brief Idle thread automatic spawn suppression. | |||
* @details When this option is activated the function @p chSysInit() | |||
* does not spawn the idle thread. The application @p main() | |||
* function becomes the idle thread and must implement an | |||
* infinite loop. | |||
*/ | |||
#define CH_CFG_NO_IDLE_THREAD FALSE | |||
/* Use __WFI in the idle thread for waiting. Does lower the power | |||
* consumption. */ | |||
#define CORTEX_ENABLE_WFI_IDLE TRUE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Performance options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief OS optimization. | |||
* @details If enabled then time efficient rather than space efficient code | |||
* is used when two possible implementations exist. | |||
* | |||
* @note This is not related to the compiler optimization options. | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_OPTIMIZE_SPEED FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Subsystem options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Time Measurement APIs. | |||
* @details If enabled then the time measurement APIs are included in | |||
* the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_TM FALSE | |||
/** | |||
* @brief Threads registry APIs. | |||
* @details If enabled then the registry APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_REGISTRY TRUE | |||
/** | |||
* @brief Threads synchronization APIs. | |||
* @details If enabled then the @p chThdWait() function is included in | |||
* the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_WAITEXIT TRUE | |||
/** | |||
* @brief Semaphores APIs. | |||
* @details If enabled then the Semaphores APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES TRUE | |||
/** | |||
* @brief Semaphores queuing mode. | |||
* @details If enabled then the threads are enqueued on semaphores by | |||
* priority rather than in FIFO order. | |||
* | |||
* @note The default is @p FALSE. Enable this if you have special | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | |||
/** | |||
* @brief Mutexes APIs. | |||
* @details If enabled then the mutexes APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MUTEXES TRUE | |||
/** | |||
* @brief Enables recursive behavior on mutexes. | |||
* @note Recursive mutexes are heavier and have an increased | |||
* memory footprint. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note Requires @p CH_CFG_USE_MUTEXES. | |||
*/ | |||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | |||
/** | |||
* @brief Conditional Variables APIs. | |||
* @details If enabled then the conditional variables APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_MUTEXES. | |||
*/ | |||
#define CH_CFG_USE_CONDVARS TRUE | |||
/** | |||
* @brief Conditional Variables APIs with timeout. | |||
* @details If enabled then the conditional variables APIs with timeout | |||
* specification are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_CONDVARS. | |||
*/ | |||
#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE | |||
/** | |||
* @brief Events Flags APIs. | |||
* @details If enabled then the event flags APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_EVENTS TRUE | |||
/** | |||
* @brief Events Flags APIs with timeout. | |||
* @details If enabled then the events APIs with timeout specification | |||
* are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_EVENTS. | |||
*/ | |||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE | |||
/** | |||
* @brief Synchronous Messages APIs. | |||
* @details If enabled then the synchronous messages APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MESSAGES TRUE | |||
/** | |||
* @brief Synchronous Messages queuing mode. | |||
* @details If enabled then messages are served by priority rather than in | |||
* FIFO order. | |||
* | |||
* @note The default is @p FALSE. Enable this if you have special | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_MESSAGES. | |||
*/ | |||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE | |||
/** | |||
* @brief Mailboxes APIs. | |||
* @details If enabled then the asynchronous messages (mailboxes) APIs are | |||
* included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MEMCORE FALSE | |||
/** | |||
* @brief Heap Allocator APIs. | |||
* @details If enabled then the memory heap allocator APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or | |||
* @p CH_CFG_USE_SEMAPHORES. | |||
* @note Mutexes are recommended. | |||
*/ | |||
#define CH_CFG_USE_HEAP FALSE | |||
/** | |||
* @brief Memory Pools Allocator APIs. | |||
* @details If enabled then the memory pools allocator APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MEMPOOLS FALSE | |||
/** | |||
* @brief Dynamic Threads APIs. | |||
* @details If enabled then the dynamic threads creation APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_WAITEXIT. | |||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | |||
*/ | |||
#define CH_CFG_USE_DYNAMIC FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Debug options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Debug option, kernel statistics. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_STATISTICS FALSE | |||
/** | |||
* @brief Debug option, system state check. | |||
* @details If enabled the correct call protocol for system APIs is checked | |||
* at runtime. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE | |||
/** | |||
* @brief Debug option, parameters checks. | |||
* @details If enabled then the checks on the API functions input | |||
* parameters are activated. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_ENABLE_CHECKS FALSE | |||
/** | |||
* @brief Debug option, consistency checks. | |||
* @details If enabled then all the assertions in the kernel code are | |||
* activated. This includes consistency checks inside the kernel, | |||
* runtime anomalies and port-defined checks. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_ENABLE_ASSERTS FALSE | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
* @details If enabled then a runtime stack check is performed. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The stack check is performed in a architecture/port dependent way. | |||
* It may not be implemented or some ports. | |||
* @note The default failure mode is to halt the system with the global | |||
* @p panic_msg variable set to @p NULL. | |||
*/ | |||
#define CH_DBG_ENABLE_STACK_CHECK FALSE | |||
/** | |||
* @brief Debug option, stacks initialization. | |||
* @details If enabled then the threads working area is filled with a byte | |||
* value when a thread is created. This can be useful for the | |||
* runtime measurement of the used stack. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_FILL_THREADS FALSE | |||
/** | |||
* @brief Debug option, threads profiling. | |||
* @details If enabled then a field is added to the @p thread_t structure that | |||
* counts the system ticks occurred while executing the thread. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note This debug option is not currently compatible with the | |||
* tickless mode. | |||
*/ | |||
#define CH_DBG_THREADS_PROFILING FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Kernel hooks | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Threads descriptor structure extension. | |||
* @details User fields added to the end of the @p thread_t structure. | |||
*/ | |||
#define CH_CFG_THREAD_EXTRA_FIELDS \ | |||
/* Add threads custom fields here.*/ | |||
/** | |||
* @brief Threads initialization hook. | |||
* @details User initialization code added to the @p chThdInit() API. | |||
* | |||
* @note It is invoked from within @p chThdInit() and implicitly from all | |||
* the threads creation APIs. | |||
*/ | |||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \ | |||
/* Add threads initialization code here.*/ \ | |||
} | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
} | |||
/** | |||
* @brief Context switch hook. | |||
* @details This hook is invoked just before switching between threads. | |||
*/ | |||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
* should be invoked from here. | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread leave hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
* should be invoked from here. | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle Loop hook. | |||
* @details This hook is continuously invoked by the idle thread loop. | |||
*/ | |||
#define CH_CFG_IDLE_LOOP_HOOK() { \ | |||
/* Idle loop code here.*/ \ | |||
} | |||
/** | |||
* @brief System tick event hook. | |||
* @details This hook is invoked in the system tick handler immediately | |||
* after processing the virtual timers queue. | |||
*/ | |||
#define CH_CFG_SYSTEM_TICK_HOOK() { \ | |||
/* System tick event code here.*/ \ | |||
} | |||
/** | |||
* @brief System halt hook. | |||
* @details This hook is invoked in case to a system halting error before | |||
* the system is halted. | |||
*/ | |||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@ -0,0 +1,89 @@ | |||
/* | |||
Copyright 2015 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#pragma once | |||
/* USB Device descriptor parameter */ | |||
#define VENDOR_ID 0x5A12 | |||
#define PRODUCT_ID 0x5165 | |||
#define DEVICE_VER 0x0001 | |||
/* in python2: list(u"whatever".encode('utf-16-le')) */ | |||
/* at most 32 characters or the ugly hack in usb_main.c borks */ | |||
#define MANUFACTURER SmithAndRune | |||
#define PRODUCT Iron165 | |||
#define DESCRIPTION Iron165 Keyboard | |||
/* key matrix size */ | |||
#define MATRIX_ROWS 5 | |||
#define MATRIX_COLS 16 | |||
#define MATRIX_COL_PINS { A5, B10, A3, A2, B0, A8, C13, B9, B8, B7, B6, B5, B4, B3, A15, A14 } | |||
#define MATRIX_ROW_PINS { B12, B13, B14, B15, A1 } | |||
#define DIODE_DIRECTION COL2ROW | |||
#define BACKLIGHT_LEVELS 6 | |||
#define BACKLIGHT_BREATHING | |||
#define BREATHING_PERIOD 6 | |||
/* define if matrix has ghost */ | |||
//#define MATRIX_HAS_GHOST | |||
/* Set 0 if debouncing isn't needed */ | |||
#define DEBOUNCE 5 | |||
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ | |||
#define LOCKING_SUPPORT_ENABLE | |||
/* Locking resynchronize hack */ | |||
#define LOCKING_RESYNC_ENABLE | |||
// EEPROM usage | |||
// TODO: refactor with new user EEPROM code (coming soon) | |||
#define EEPROM_MAGIC 0x451F | |||
#define EEPROM_MAGIC_ADDR 40 | |||
// Bump this every time we change what we store | |||
// This will automatically reset the EEPROM with defaults | |||
// and avoid loading invalid data from the EEPROM | |||
#define EEPROM_VERSION 0x02 | |||
#define EEPROM_VERSION_ADDR 42 | |||
#define DYNAMIC_KEYMAP_LAYER_COUNT 4 | |||
// Dynamic macro starts after dynamic keymaps (35+(4*5*15*2)) = (35+600) = 635 | |||
// start + layer * rows * col * 2 | |||
#define DYNAMIC_KEYMAP_EEPROM_ADDR 43 | |||
#define EEPROM_CUSTOM_BACKLIGHT 684 | |||
#define DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR 685 | |||
#define DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE 192 | |||
#define DYNAMIC_KEYMAP_MACRO_COUNT 16 | |||
/* | |||
* Feature disable options | |||
* These options are also useful to firmware size reduction. | |||
*/ | |||
/* disable debug print */ | |||
//#define NO_DEBUG | |||
/* disable print */ | |||
//#define NO_PRINT | |||
/* disable action features */ | |||
//#define NO_ACTION_LAYER | |||
//#define NO_ACTION_TAPPING | |||
//#define NO_ACTION_ONESHOT | |||
//#define NO_ACTION_MACRO | |||
//#define NO_ACTION_FUNCTION |
@ -0,0 +1,354 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/** | |||
* @file templates/halconf.h | |||
* @brief HAL configuration header. | |||
* @details HAL configuration file, this file allows to enable or disable the | |||
* various device drivers from your application. You may also use | |||
* this file in order to override the device drivers default settings. | |||
* | |||
* @addtogroup HAL_CONF | |||
* @{ | |||
*/ | |||
#ifndef _HALCONF_H_ | |||
#define _HALCONF_H_ | |||
#include "mcuconf.h" | |||
/** | |||
* @brief Enables the PAL subsystem. | |||
*/ | |||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | |||
#define HAL_USE_PAL TRUE | |||
#endif | |||
/** | |||
* @brief Enables the ADC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | |||
#define HAL_USE_ADC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the CAN subsystem. | |||
*/ | |||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | |||
#define HAL_USE_CAN FALSE | |||
#endif | |||
/** | |||
* @brief Enables the DAC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | |||
#define HAL_USE_DAC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the EXT subsystem. | |||
*/ | |||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) | |||
#define HAL_USE_EXT FALSE | |||
#endif | |||
/** | |||
* @brief Enables the GPT subsystem. | |||
*/ | |||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | |||
#define HAL_USE_GPT FALSE | |||
#endif | |||
/** | |||
* @brief Enables the I2C subsystem. | |||
*/ | |||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | |||
#define HAL_USE_I2C FALSE | |||
#endif | |||
/** | |||
* @brief Enables the I2S subsystem. | |||
*/ | |||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | |||
#define HAL_USE_I2S FALSE | |||
#endif | |||
/** | |||
* @brief Enables the ICU subsystem. | |||
*/ | |||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | |||
#define HAL_USE_ICU FALSE | |||
#endif | |||
/** | |||
* @brief Enables the MAC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | |||
#define HAL_USE_MAC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the MMC_SPI subsystem. | |||
*/ | |||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | |||
#define HAL_USE_MMC_SPI FALSE | |||
#endif | |||
/** | |||
* @brief Enables the PWM subsystem. | |||
*/ | |||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | |||
#define HAL_USE_PWM TRUE | |||
#endif | |||
/** | |||
* @brief Enables the RTC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | |||
#define HAL_USE_RTC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SDC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | |||
#define HAL_USE_SDC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SERIAL subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | |||
#define HAL_USE_SERIAL FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SERIAL over USB subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | |||
#define HAL_USE_SERIAL_USB FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SPI subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | |||
#define HAL_USE_SPI FALSE | |||
#endif | |||
/** | |||
* @brief Enables the UART subsystem. | |||
*/ | |||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | |||
#define HAL_USE_UART FALSE | |||
#endif | |||
/** | |||
* @brief Enables the USB subsystem. | |||
*/ | |||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | |||
#define HAL_USE_USB TRUE | |||
#endif | |||
/** | |||
* @brief Enables the WDG subsystem. | |||
*/ | |||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | |||
#define HAL_USE_WDG FALSE | |||
#endif | |||
/*===========================================================================*/ | |||
/* ADC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | |||
#define ADC_USE_WAIT TRUE | |||
#endif | |||
/** | |||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define ADC_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* CAN driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Sleep mode related APIs inclusion switch. | |||
*/ | |||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | |||
#define CAN_USE_SLEEP_MODE TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* I2C driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables the mutual exclusion APIs on the I2C bus. | |||
*/ | |||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define I2C_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* MAC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables an event sources for incoming packets. | |||
*/ | |||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | |||
#define MAC_USE_ZERO_COPY FALSE | |||
#endif | |||
/** | |||
* @brief Enables an event sources for incoming packets. | |||
*/ | |||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | |||
#define MAC_USE_EVENTS TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* MMC_SPI driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Delays insertions. | |||
* @details If enabled this options inserts delays into the MMC waiting | |||
* routines releasing some extra CPU time for the threads with | |||
* lower priority, this may slow down the driver a bit however. | |||
* This option is recommended also if the SPI driver does not | |||
* use a DMA channel and heavily loads the CPU. | |||
*/ | |||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | |||
#define MMC_NICE_WAITING TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* SDC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Number of initialization attempts before rejecting the card. | |||
* @note Attempts are performed at 10mS intervals. | |||
*/ | |||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | |||
#define SDC_INIT_RETRY 100 | |||
#endif | |||
/** | |||
* @brief Include support for MMC cards. | |||
* @note MMC support is not yet implemented so this option must be kept | |||
* at @p FALSE. | |||
*/ | |||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | |||
#define SDC_MMC_SUPPORT FALSE | |||
#endif | |||
/** | |||
* @brief Delays insertions. | |||
* @details If enabled this options inserts delays into the MMC waiting | |||
* routines releasing some extra CPU time for the threads with | |||
* lower priority, this may slow down the driver a bit however. | |||
*/ | |||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | |||
#define SDC_NICE_WAITING TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* SERIAL driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Default bit rate. | |||
* @details Configuration parameter, this is the baud rate selected for the | |||
* default configuration. | |||
*/ | |||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | |||
#define SERIAL_DEFAULT_BITRATE 38400 | |||
#endif | |||
/** | |||
* @brief Serial buffers size. | |||
* @details Configuration parameter, you can change the depth of the queue | |||
* buffers depending on the requirements of your application. | |||
* @note The default is 64 bytes for both the transmission and receive | |||
* buffers. | |||
*/ | |||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | |||
#define SERIAL_BUFFERS_SIZE 16 | |||
#endif | |||
/*===========================================================================*/ | |||
/* SERIAL_USB driver related setting. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Serial over USB buffers size. | |||
* @details Configuration parameter, the buffer size must be a multiple of | |||
* the USB data endpoint maximum packet size. | |||
* @note The default is 64 bytes for both the transmission and receive | |||
* buffers. | |||
*/ | |||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | |||
#define SERIAL_USB_BUFFERS_SIZE 1 | |||
#endif | |||
/*===========================================================================*/ | |||
/* SPI driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | |||
#define SPI_USE_WAIT TRUE | |||
#endif | |||
/** | |||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define SPI_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* USB driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | |||
#define USB_USE_WAIT TRUE | |||
#endif | |||
#endif /* _HALCONF_H_ */ | |||
/** @} */ |
@ -0,0 +1,13 @@ | |||
{ | |||
"keyboard_name": "Iron165", | |||
"url": "https://cannonkeys.com", | |||
"maintainer": "awkannan", | |||
"width": 16, | |||
"height": 5, | |||
"layouts": { | |||
"LAYOUT_default": { | |||
"layout": [{"label":"~", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"@", "x":2, "y":0}, {"label":"#", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"x":13, "y":0}, {"x":14, "y":0}, {"label":"Tab", "x":0, "y":1, "w":1.5}, {"label":"Q", "x":1.5, "y":1}, {"label":"W", "x":2.5, "y":1}, {"label":"E", "x":3.5, "y":1}, {"label":"R", "x":4.5, "y":1}, {"label":"T", "x":5.5, "y":1}, {"label":"Y", "x":6.5, "y":1}, {"label":"U", "x":7.5, "y":1}, {"label":"I", "x":8.5, "y":1}, {"label":"O", "x":9.5, "y":1}, {"label":"P", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"|", "x":13.5, "y":1, "w":1.5}, {"x":15, "y":1}, {"label":"Caps Lock", "x":0, "y":2, "w":1.75}, {"label":"A", "x":1.75, "y":2}, {"label":"S", "x":2.75, "y":2}, {"label":"D", "x":3.75, "y":2}, {"label":"F", "x":4.75, "y":2}, {"label":"G", "x":5.75, "y":2}, {"label":"H", "x":6.75, "y":2}, {"label":"J", "x":7.75, "y":2}, {"label":"K", "x":8.75, "y":2}, {"label":"L", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"\"", "x":11.75, "y":2}, {"x":12.75, "y":2}, {"label":"Enter", "x":13.75, "y":2, "w":1.25}, {"x":15, "y":2}, {"x":0, "y":3, "w":1.25}, {"x":1.25, "y":3}, {"label":"Z", "x":2.25, "y":3}, {"label":"X", "x":3.25, "y":3}, {"label":"C", "x":4.25, "y":3}, {"label":"V", "x":5.25, "y":3}, {"label":"B", "x":6.25, "y":3}, {"label":"N", "x":7.25, "y":3}, {"label":"M", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"?", "x":11.25, "y":3}, {"label":"Shift", "x":12.25, "y":3, "w":1.75}, {"x":14, "y":3}, {"x":15, "y":3}, {"label":"Ctrl", "x":0, "y":4, "w":1.25}, {"label":"Win", "x":1.25, "y":4, "w":1.25}, {"label":"Alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"Alt", "x":10, "y":4, "w":1.25}, {"label":"Ctrl", "x":11.25, "y":4, "w":1.25}, {"x":13, "y":4}, {"x":14, "y":4}, {"x":15, "y":4}] | |||
} | |||
} | |||
} |
@ -0,0 +1 @@ | |||
#include "iron165.h" |
@ -0,0 +1,17 @@ | |||
#pragma once | |||
#include "quantum.h" | |||
#define LAYOUT_default( \ | |||
K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, \ | |||
K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, K115, \ | |||
K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, K215, \ | |||
K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K312, K313, K315, \ | |||
K400, K401, K402, K406, K410, K411, K412, K413, K415 \ | |||
) { \ | |||
{ K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, KC_NO }, \ | |||
{ K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, KC_NO, K115 }, \ | |||
{ K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, KC_NO, K215 }, \ | |||
{ K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K312, K313, KC_NO, K315 }, \ | |||
{ K400, K401, K402, KC_NO, KC_NO, KC_NO, K406, KC_NO, KC_NO, KC_NO, K410, K411, K412, K413, KC_NO, K415 } \ | |||
} |
@ -0,0 +1,47 @@ | |||
/* | |||
Copyright 2012,2013 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#include QMK_KEYBOARD_H | |||
// Each layer gets a name for readability, which is then used in the keymap matrix below. | |||
// The underscores don't mean anything - you can have a layer called STUFF or any other name. | |||
// Layer names don't all need to be of the same length, obviously, and you can also skip them | |||
// entirely and just use numbers. | |||
enum layer_names { | |||
_BASE, | |||
_FN1, | |||
}; | |||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { | |||
[_BASE] = LAYOUT_default( | |||
KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_GRV, KC_BSLS, | |||
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSPC, KC_DEL, | |||
KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUBS, KC_ENT, KC_PGUP, | |||
KC_LSFT, KC_NUHS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP, KC_PGDN, | |||
KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, MO(_FN1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT | |||
), | |||
[_FN1] = LAYOUT_default( | |||
KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_UP, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
BL_BRTG, KC_LEFT, KC_DOWN, KC_RGHT, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
BL_INC, BL_DEC, BL_TOGG, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_GRV, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RESET, KC_TRNS, KC_TRNS | |||
) | |||
}; |
@ -0,0 +1,46 @@ | |||
/* | |||
Copyright 2012,2013 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#include QMK_KEYBOARD_H | |||
// Each layer gets a name for readability, which is then used in the keymap matrix below. | |||
// The underscores don't mean anything - you can have a layer called STUFF or any other name. | |||
// Layer names don't all need to be of the same length, obviously, and you can also skip them | |||
// entirely and just use numbers. | |||
enum layer_names { | |||
_BASE, | |||
_FN1, | |||
}; | |||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { | |||
[_BASE] = LAYOUT_default( | |||
KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_GRV, KC_BSLS, | |||
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_DEL, | |||
KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUBS, KC_ENT, KC_PGUP, | |||
KC_LSFT, KC_NUHS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP, KC_PGDN, | |||
KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, MO(_FN1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT | |||
), | |||
[_FN1] = LAYOUT_default( | |||
KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_UP, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
BL_BRTG, KC_LEFT, KC_DOWN, KC_RGHT, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
BL_INC, BL_DEC, BL_TOGG, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_GRV, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RESET, KC_TRNS, KC_TRNS | |||
) | |||
}; |
@ -0,0 +1,5 @@ | |||
# rules.mk overrides to enable VIA | |||
RAW_ENABLE = yes | |||
DYNAMIC_KEYMAP_ENABLE = yes | |||
@ -0,0 +1,176 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
#ifndef _MCUCONF_H_ | |||
#define _MCUCONF_H_ | |||
/* | |||
* STM32F0xx drivers configuration. | |||
* The following settings override the default settings present in | |||
* the various device driver implementation headers. | |||
* Note that the settings for each driver only have effect if the whole | |||
* driver is enabled in halconf.h. | |||
* | |||
* IRQ priorities: | |||
* 3...0 Lowest...Highest. | |||
* | |||
* DMA priorities: | |||
* 0...3 Lowest...Highest. | |||
*/ | |||
#define STM32F0xx_MCUCONF | |||
// #define STM32F070xB | |||
/* | |||
* HAL driver system settings. | |||
*/ | |||
#define STM32_NO_INIT FALSE | |||
#define STM32_PVD_ENABLE FALSE | |||
#define STM32_PLS STM32_PLS_LEV0 | |||
#define STM32_HSI_ENABLED TRUE | |||
#define STM32_HSI14_ENABLED TRUE | |||
#define STM32_HSI48_ENABLED FALSE | |||
#define STM32_LSI_ENABLED TRUE | |||
#define STM32_HSE_ENABLED FALSE | |||
#define STM32_LSE_ENABLED FALSE | |||
#define STM32_SW STM32_SW_PLL | |||
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 | |||
#define STM32_PREDIV_VALUE 1 | |||
#define STM32_PLLMUL_VALUE 12 | |||
#define STM32_HPRE STM32_HPRE_DIV1 | |||
#define STM32_PPRE STM32_PPRE_DIV1 | |||
#define STM32_ADCSW STM32_ADCSW_HSI14 | |||
#define STM32_ADCPRE STM32_ADCPRE_DIV4 | |||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | |||
#define STM32_ADCPRE STM32_ADCPRE_DIV4 | |||
#define STM32_ADCSW STM32_ADCSW_HSI14 | |||
#define STM32_USBSW STM32_USBSW_HSI48 | |||
#define STM32_CECSW STM32_CECSW_HSI | |||
#define STM32_I2C1SW STM32_I2C1SW_HSI | |||
#define STM32_USART1SW STM32_USART1SW_PCLK | |||
#define STM32_RTCSEL STM32_RTCSEL_LSI | |||
/* | |||
* ADC driver system settings. | |||
*/ | |||
#define STM32_ADC_USE_ADC1 FALSE | |||
#define STM32_ADC_ADC1_DMA_PRIORITY 2 | |||
#define STM32_ADC_IRQ_PRIORITY 2 | |||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 | |||
/* | |||
* EXT driver system settings. | |||
*/ | |||
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 | |||
/* | |||
* GPT driver system settings. | |||
*/ | |||
#define STM32_GPT_USE_TIM1 FALSE | |||
#define STM32_GPT_USE_TIM2 FALSE | |||
#define STM32_GPT_USE_TIM3 FALSE | |||
#define STM32_GPT_USE_TIM14 FALSE | |||
#define STM32_GPT_TIM1_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM2_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM3_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM14_IRQ_PRIORITY 2 | |||
/* | |||
* I2C driver system settings. | |||
*/ | |||
#define STM32_I2C_USE_I2C1 FALSE | |||
#define STM32_I2C_USE_I2C2 FALSE | |||
#define STM32_I2C_BUSY_TIMEOUT 50 | |||
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 | |||
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 | |||
#define STM32_I2C_USE_DMA TRUE | |||
#define STM32_I2C_I2C1_DMA_PRIORITY 1 | |||
#define STM32_I2C_I2C2_DMA_PRIORITY 1 | |||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | |||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | |||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | |||
/* | |||
* ICU driver system settings. | |||
*/ | |||
#define STM32_ICU_USE_TIM1 FALSE | |||
#define STM32_ICU_USE_TIM2 FALSE | |||
#define STM32_ICU_USE_TIM3 FALSE | |||
#define STM32_ICU_TIM1_IRQ_PRIORITY 3 | |||
#define STM32_ICU_TIM2_IRQ_PRIORITY 3 | |||
#define STM32_ICU_TIM3_IRQ_PRIORITY 3 | |||
/* | |||
* PWM driver system settings. | |||
*/ | |||
#define STM32_PWM_USE_ADVANCED FALSE | |||
#define STM32_PWM_USE_TIM1 FALSE | |||
#define STM32_PWM_USE_TIM2 FALSE | |||
#define STM32_PWM_USE_TIM3 TRUE | |||
#define STM32_PWM_TIM1_IRQ_PRIORITY 3 | |||
#define STM32_PWM_TIM2_IRQ_PRIORITY 3 | |||
#define STM32_PWM_TIM3_IRQ_PRIORITY 3 | |||
/* | |||
* SERIAL driver system settings. | |||
*/ | |||
#define STM32_SERIAL_USE_USART1 FALSE | |||
#define STM32_SERIAL_USE_USART2 FALSE | |||
#define STM32_SERIAL_USART1_PRIORITY 3 | |||
#define STM32_SERIAL_USART2_PRIORITY 3 | |||
/* | |||
* SPI driver system settings. | |||
*/ | |||
#define STM32_SPI_USE_SPI1 FALSE | |||
#define STM32_SPI_USE_SPI2 FALSE | |||
#define STM32_SPI_SPI1_DMA_PRIORITY 1 | |||
#define STM32_SPI_SPI2_DMA_PRIORITY 1 | |||
#define STM32_SPI_SPI1_IRQ_PRIORITY 2 | |||
#define STM32_SPI_SPI2_IRQ_PRIORITY 2 | |||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | |||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | |||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | |||
/* | |||
* ST driver system settings. | |||
*/ | |||
#define STM32_ST_IRQ_PRIORITY 2 | |||
#define STM32_ST_USE_TIMER 2 | |||
/* | |||
* UART driver system settings. | |||
*/ | |||
#define STM32_UART_USE_USART1 FALSE | |||
#define STM32_UART_USE_USART2 FALSE | |||
#define STM32_UART_USART1_IRQ_PRIORITY 3 | |||
#define STM32_UART_USART2_IRQ_PRIORITY 3 | |||
#define STM32_UART_USART1_DMA_PRIORITY 0 | |||
#define STM32_UART_USART2_DMA_PRIORITY 0 | |||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | |||
/* | |||
* USB driver system settings. | |||
*/ | |||
#define STM32_USB_USE_USB1 TRUE | |||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | |||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 | |||
#endif /* _MCUCONF_H_ */ |
@ -0,0 +1,12 @@ | |||
# Smith+Rune Iron165 | |||
Iron165 Keyboard | |||
Keyboard Maintainer: [Andrew Kannan](https://github.com/awkannan) | |||
Hardware Supported: STM32F072CBT6 | |||
Make example for this keyboard (after setting up your build environment): | |||
make cannonkeys/iron165:default | |||
See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs). |
@ -0,0 +1,55 @@ | |||
# project specific files | |||
# SRC = ssd1306.c | |||
## chip/board settings | |||
# the next two should match the directories in | |||
# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) | |||
MCU_FAMILY = STM32 | |||
MCU_SERIES = STM32F0xx | |||
# linker script to use | |||
# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ | |||
# or <this_dir>/ld/ | |||
MCU_LDSCRIPT = STM32F072xB | |||
# startup code to use | |||
# is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/ | |||
MCU_STARTUP = stm32f0xx | |||
# it should exist either in <chibios>/os/hal/boards/ | |||
# or <this_dir>/boards | |||
BOARD = ST_STM32F072B_DISCOVERY | |||
# Cortex version | |||
# Teensy LC is cortex-m0; Teensy 3.x are cortex-m4 | |||
MCU = cortex-m0 | |||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 | |||
ARMV = 6 | |||
# If you want to be able to jump to bootloader from firmware on STM32 MCUs, | |||
# set the correct BOOTLOADER_ADDRESS. Either set it here, or define it in | |||
# ./bootloader_defs.h or in ./boards/<FOO>/bootloader_defs.h (if you have | |||
# a custom board definition that you plan to reuse). | |||
# If you're not setting it here, leave it commented out. | |||
# It is chip dependent, the correct number can be looked up here (page 175): | |||
# http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | |||
# This also requires a patch to chibios: | |||
# <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | |||
#STM32_BOOTLOADER_ADDRESS = 0x1FFFC800 | |||
# Build Options | |||
# comment out to disable the options. | |||
# | |||
# project specific files | |||
VPATH += keyboards/cannonkeys/stm32f072 | |||
SRC = keyboard.c \ | |||
led.c | |||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | |||
DFU_SUFFIX_ARGS = -v 0483 -p DF11 | |||
BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration | |||
MOUSEKEY_ENABLE = yes # Mouse keys | |||
EXTRAKEY_ENABLE = yes # Audio control and System control | |||
CONSOLE_ENABLE = yes # Console for debug | |||
COMMAND_ENABLE = yes # Commands for debug and configuration | |||
SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend | |||
NKRO_ENABLE = yes # USB Nkey Rollover | |||
CUSTOM_MATRIX = no # Custom matrix file | |||
# BACKLIGHT_ENABLE = yes # This is broken on 072 for some reason | |||
RGBLIGHT_ENABLE = no |
@ -0,0 +1,109 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* This file has been automatically generated using ChibiStudio board | |||
* generator plugin. Do not edit manually. | |||
*/ | |||
#include "hal.h" | |||
#if HAL_USE_PAL || defined(__DOXYGEN__) | |||
/** | |||
* @brief PAL setup. | |||
* @details Digital I/O ports static configuration as defined in @p board.h. | |||
* This variable is used by the HAL when initializing the PAL driver. | |||
*/ | |||
const PALConfig pal_default_config = { | |||
#if STM32_HAS_GPIOA | |||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | |||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOB | |||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | |||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOC | |||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | |||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOD | |||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | |||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOE | |||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | |||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOF | |||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | |||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOG | |||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | |||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOH | |||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | |||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOI | |||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | |||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} | |||
#endif | |||
}; | |||
#endif | |||
void enter_bootloader_mode_if_requested(void); | |||
/** | |||
* @brief Early initialization code. | |||
* @details This initialization must be performed just after stack setup | |||
* and before any other initialization. | |||
*/ | |||
void __early_init(void) { | |||
enter_bootloader_mode_if_requested(); | |||
stm32_clock_init(); | |||
} | |||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | |||
/** | |||
* @brief MMC_SPI card detection. | |||
*/ | |||
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | |||
(void)mmcp; | |||
/* TODO: Fill the implementation.*/ | |||
return true; | |||
} | |||
/** | |||
* @brief MMC_SPI card write protection detection. | |||
*/ | |||
bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | |||
(void)mmcp; | |||
/* TODO: Fill the implementation.*/ | |||
return false; | |||
} | |||
#endif | |||
/** | |||
* @brief Board-specific initialization code. | |||
* @todo Add your board-specific code, if any. | |||
*/ | |||
void boardInit(void) { | |||
} |
@ -0,0 +1,922 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* This file has been automatically generated using ChibiStudio board | |||
* generator plugin. Do not edit manually. | |||
*/ | |||
#ifndef BOARD_H | |||
#define BOARD_H | |||
/* | |||
* Setup for ST STM32F072B-Discovery board. | |||
*/ | |||
/* | |||
* Board identifier. | |||
*/ | |||
#define BOARD_ST_STM32F072B_DISCOVERY | |||
#define BOARD_NAME "ST STM32F072B-Discovery" | |||
/* | |||
* Board oscillators-related settings. | |||
* NOTE: HSE not fitted. | |||
*/ | |||
#if !defined(STM32_LSECLK) | |||
#define STM32_LSECLK 32768 | |||
#endif | |||
#define STM32_LSEDRV (3U << 3U) | |||
#if !defined(STM32_HSECLK) | |||
#define STM32_HSECLK 0U | |||
#endif | |||
#define STM32_HSE_BYPASS | |||
/* | |||
* MCU type as defined in the ST header. | |||
*/ | |||
#define STM32F072xB | |||
/* | |||
* IO pins assignments. | |||
*/ | |||
#define GPIOA_BUTTON 0U | |||
#define GPIOA_PIN1 1U | |||
#define GPIOA_PIN2 2U | |||
#define GPIOA_PIN3 3U | |||
#define GPIOA_PIN4 4U | |||
#define GPIOA_PIN5 5U | |||
#define GPIOA_PIN6 6U | |||
#define GPIOA_PIN7 7U | |||
#define GPIOA_PIN8 8U | |||
#define GPIOA_PIN9 9U | |||
#define GPIOA_PIN10 10U | |||
#define GPIOA_USB_DM 11U | |||
#define GPIOA_USB_DP 12U | |||
#define GPIOA_SWDIO 13U | |||
#define GPIOA_SWCLK 14U | |||
#define GPIOA_PIN15 15U | |||
#define GPIOB_PIN0 0U | |||
#define GPIOB_PIN1 1U | |||
#define GPIOB_PIN2 2U | |||
#define GPIOB_PIN3 3U | |||
#define GPIOB_PIN4 4U | |||
#define GPIOB_PIN5 5U | |||
#define GPIOB_PIN6 6U | |||
#define GPIOB_PIN7 7U | |||
#define GPIOB_PIN8 8U | |||
#define GPIOB_PIN9 9U | |||
#define GPIOB_PIN10 10U | |||
#define GPIOB_PIN11 11U | |||
#define GPIOB_PIN12 12U | |||
#define GPIOB_SPI2_SCK 13U | |||
#define GPIOB_SPI2_MISO 14U | |||
#define GPIOB_SPI2_MOSI 15U | |||
#define GPIOC_MEMS_CS 0U | |||
#define GPIOC_PIN1 1U | |||
#define GPIOC_PIN2 2U | |||
#define GPIOC_PIN3 3U | |||
#define GPIOC_PIN4 4U | |||
#define GPIOC_PIN5 5U | |||
#define GPIOC_LED_RED 6U | |||
#define GPIOC_LED_BLUE 7U | |||
#define GPIOC_LED_ORANGE 8U | |||
#define GPIOC_LED_GREEN 9U | |||
#define GPIOC_PIN10 10U | |||
#define GPIOC_PIN11 11U | |||
#define GPIOC_PIN12 12U | |||
#define GPIOC_PIN13 13U | |||
#define GPIOC_OSC32_IN 14U | |||
#define GPIOC_OSC32_OUT 15U | |||
#define GPIOD_PIN0 0U | |||
#define GPIOD_PIN1 1U | |||
#define GPIOD_PIN2 2U | |||
#define GPIOD_PIN3 3U | |||
#define GPIOD_PIN4 4U | |||
#define GPIOD_PIN5 5U | |||
#define GPIOD_PIN6 6U | |||
#define GPIOD_PIN7 7U | |||
#define GPIOD_PIN8 8U | |||
#define GPIOD_PIN9 9U | |||
#define GPIOD_PIN10 10U | |||
#define GPIOD_PIN11 11U | |||
#define GPIOD_PIN12 12U | |||
#define GPIOD_PIN13 13U | |||
#define GPIOD_PIN14 14U | |||
#define GPIOD_PIN15 15U | |||
#define GPIOE_PIN0 0U | |||
#define GPIOE_PIN1 1U | |||
#define GPIOE_PIN2 2U | |||
#define GPIOE_PIN3 3U | |||
#define GPIOE_PIN4 4U | |||
#define GPIOE_PIN5 5U | |||
#define GPIOE_PIN6 6U | |||
#define GPIOE_PIN7 7U | |||
#define GPIOE_PIN8 8U | |||
#define GPIOE_PIN9 9U | |||
#define GPIOE_PIN10 10U | |||
#define GPIOE_PIN11 11U | |||
#define GPIOE_PIN12 12U | |||
#define GPIOE_PIN13 13U | |||
#define GPIOE_PIN14 14U | |||
#define GPIOE_PIN15 15U | |||
#define GPIOF_OSC_IN 0U | |||
#define GPIOF_OSC_OUT 1U | |||
#define GPIOF_PIN2 2U | |||
#define GPIOF_PIN3 3U | |||
#define GPIOF_PIN4 4U | |||
#define GPIOF_PIN5 5U | |||
#define GPIOF_PIN6 6U | |||
#define GPIOF_PIN7 7U | |||
#define GPIOF_PIN8 8U | |||
#define GPIOF_PIN9 9U | |||
#define GPIOF_PIN10 10U | |||
#define GPIOF_PIN11 11U | |||
#define GPIOF_PIN12 12U | |||
#define GPIOF_PIN13 13U | |||
#define GPIOF_PIN14 14U | |||
#define GPIOF_PIN15 15U | |||
/* | |||
* IO lines assignments. | |||
*/ | |||
#define LINE_BUTTON PAL_LINE(GPIOA, 0U) | |||
#define LINE_USB_DM PAL_LINE(GPIOA, 11U) | |||
#define LINE_USB_DP PAL_LINE(GPIOA, 12U) | |||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U) | |||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U) | |||
#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) | |||
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) | |||
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) | |||
#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) | |||
#define LINE_LED_RED PAL_LINE(GPIOC, 6U) | |||
#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) | |||
#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U) | |||
#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) | |||
#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | |||
#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | |||
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) | |||
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) | |||
/* | |||
* I/O ports initial setup, this configuration is established soon after reset | |||
* in the initialization code. | |||
* Please refer to the STM32 Reference Manual for details. | |||
*/ | |||
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | |||
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | |||
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | |||
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | |||
#define PIN_ODR_LOW(n) (0U << (n)) | |||
#define PIN_ODR_HIGH(n) (1U << (n)) | |||
#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | |||
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | |||
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | |||
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | |||
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | |||
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | |||
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | |||
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | |||
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | |||
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | |||
/* | |||
* GPIOA setup: | |||
* | |||
* PA0 - BUTTON (input floating). | |||
* PA1 - PIN1 (input pullup). | |||
* PA2 - PIN2 (input pullup). | |||
* PA3 - PIN3 (input pullup). | |||
* PA4 - PIN4 (input pullup). | |||
* PA5 - PIN5 (input pullup). | |||
* PA6 - PIN6 (input pullup). | |||
* PA7 - PIN7 (input pullup). | |||
* PA8 - PIN8 (input pullup). | |||
* PA9 - PIN9 (input pullup). | |||
* PA10 - PIN10 (input pullup). | |||
* PA11 - USB_DM (input floating). | |||
* PA12 - USB_DP (input floating). | |||
* PA13 - SWDIO (alternate 0). | |||
* PA14 - SWCLK (alternate 0). | |||
* PA15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOA_USB_DM) | \ | |||
PIN_MODE_INPUT(GPIOA_USB_DP) | \ | |||
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ | |||
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN15)) | |||
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | |||
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \ | |||
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ | |||
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ | |||
PIN_OSPEED_HIGH(GPIOA_PIN15)) | |||
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ | |||
PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ | |||
PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ | |||
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN15)) | |||
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOA_USB_DM) | \ | |||
PIN_ODR_HIGH(GPIOA_USB_DP) | \ | |||
PIN_ODR_HIGH(GPIOA_SWDIO) | \ | |||
PIN_ODR_HIGH(GPIOA_SWCLK) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN15)) | |||
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN7, 0U)) | |||
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_USB_DM, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_USB_DP, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN15, 0U)) | |||
/* | |||
* GPIOB setup: | |||
* | |||
* PB0 - PIN0 (input pullup). | |||
* PB1 - PIN1 (input pullup). | |||
* PB2 - PIN2 (input pullup). | |||
* PB3 - PIN3 (input pullup). | |||
* PB4 - PIN4 (input pullup). | |||
* PB5 - PIN5 (input pullup). | |||
* PB6 - PIN6 (input pullup). | |||
* PB7 - PIN7 (input pullup). | |||
* PB8 - PIN8 (input pullup). | |||
* PB9 - PIN9 (input pullup). | |||
* PB10 - PIN10 (input pullup). | |||
* PB11 - PIN11 (input pullup). | |||
* PB12 - PIN12 (input pullup). | |||
* PB13 - SPI2_SCK (alternate 0). | |||
* PB14 - SPI2_MISO (alternate 0). | |||
* PB15 - SPI2_MOSI (alternate 0). | |||
*/ | |||
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN12) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN3) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_MISO) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN7, 0U)) | |||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U)) | |||
/* | |||
* GPIOC setup: | |||
* | |||
* PC0 - MEMS_CS (output pushpull maximum). | |||
* PC1 - PIN1 (input pullup). | |||
* PC2 - PIN2 (input pullup). | |||
* PC3 - PIN3 (input pullup). | |||
* PC4 - PIN4 (input pullup). | |||
* PC5 - PIN5 (input pullup). | |||
* PC6 - LED_RED (output pushpull maximum). | |||
* PC7 - LED_BLUE (output pushpull maximum). | |||
* PC8 - LED_ORANGE (output pushpull maximum). | |||
* PC9 - LED_GREEN (output pushpull maximum). | |||
* PC10 - PIN10 (input pullup). | |||
* PC11 - PIN11 (input pullup). | |||
* PC12 - PIN12 (input pullup). | |||
* PC13 - PIN13 (input pullup). | |||
* PC14 - OSC32_IN (input floating). | |||
* PC15 - OSC32_OUT (input floating). | |||
*/ | |||
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN5) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_RED) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ | |||
PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_RED) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \ | |||
PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ | |||
PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_RED) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN5) | \ | |||
PIN_ODR_LOW(GPIOC_LED_RED) | \ | |||
PIN_ODR_LOW(GPIOC_LED_BLUE) | \ | |||
PIN_ODR_LOW(GPIOC_LED_ORANGE) | \ | |||
PIN_ODR_LOW(GPIOC_LED_GREEN) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ | |||
PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_RED, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_BLUE, 0U)) | |||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | |||
/* | |||
* GPIOD setup: | |||
* | |||
* PD0 - PIN0 (input pullup). | |||
* PD1 - PIN1 (input pullup). | |||
* PD2 - PIN2 (input pullup). | |||
* PD3 - PIN3 (input pullup). | |||
* PD4 - PIN4 (input pullup). | |||
* PD5 - PIN5 (input pullup). | |||
* PD6 - PIN6 (input pullup). | |||
* PD7 - PIN7 (input pullup). | |||
* PD8 - PIN8 (input pullup). | |||
* PD9 - PIN9 (input pullup). | |||
* PD10 - PIN10 (input pullup). | |||
* PD11 - PIN11 (input pullup). | |||
* PD12 - PIN12 (input pullup). | |||
* PD13 - PIN13 (input pullup). | |||
* PD14 - PIN14 (input pullup). | |||
* PD15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN15)) | |||
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | |||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN15)) | |||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN15)) | |||
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN15)) | |||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN7, 0U)) | |||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN15, 0U)) | |||
/* | |||
* GPIOE setup: | |||
* | |||
* PE0 - PIN0 (input pullup). | |||
* PE1 - PIN1 (input pullup). | |||
* PE2 - PIN2 (input pullup). | |||
* PE3 - PIN3 (input pullup). | |||
* PE4 - PIN4 (input pullup). | |||
* PE5 - PIN5 (input pullup). | |||
* PE6 - PIN6 (input pullup). | |||
* PE7 - PIN7 (input pullup). | |||
* PE8 - PIN8 (input pullup). | |||
* PE9 - PIN9 (input pullup). | |||
* PE10 - PIN10 (input pullup). | |||
* PE11 - PIN11 (input pullup). | |||
* PE12 - PIN12 (input pullup). | |||
* PE13 - PIN13 (input pullup). | |||
* PE14 - PIN14 (input pullup). | |||
* PE15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN15)) | |||
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | |||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN15)) | |||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN15)) | |||
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN15)) | |||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN7, 0U)) | |||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN15, 0U)) | |||
/* | |||
* GPIOF setup: | |||
* | |||
* PF0 - OSC_IN (input floating). | |||
* PF1 - OSC_OUT (input floating). | |||
* PF2 - PIN2 (input pullup). | |||
* PF3 - PIN3 (input pullup). | |||
* PF4 - PIN4 (input pullup). | |||
* PF5 - PIN5 (input pullup). | |||
* PF6 - PIN6 (input pullup). | |||
* PF7 - PIN7 (input pullup). | |||
* PF8 - PIN8 (input pullup). | |||
* PF9 - PIN9 (input pullup). | |||
* PF10 - PIN10 (input pullup). | |||
* PF11 - PIN11 (input pullup). | |||
* PF12 - PIN12 (input pullup). | |||
* PF13 - PIN13 (input pullup). | |||
* PF14 - PIN14 (input pullup). | |||
* PF15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \ | |||
PIN_MODE_INPUT(GPIOF_OSC_OUT) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN15)) | |||
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | |||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN15)) | |||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \ | |||
PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN15)) | |||
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \ | |||
PIN_ODR_HIGH(GPIOF_OSC_OUT) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN15)) | |||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN7, 0U)) | |||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN15, 0U)) | |||
#if !defined(_FROM_ASM_) | |||
#ifdef __cplusplus | |||
extern "C" { | |||
#endif | |||
void boardInit(void); | |||
#ifdef __cplusplus | |||
} | |||
#endif | |||
#endif /* _FROM_ASM_ */ | |||
#endif /* BOARD_H */ |
@ -0,0 +1,5 @@ | |||
# List of all the board related files. | |||
BOARDSRC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY/board.c | |||
# Required include directories | |||
BOARDINC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY |
@ -0,0 +1,703 @@ | |||
<?xml version="1.0" encoding="UTF-8"?> | |||
<!-- STM32F0xx board Template --> | |||
<board | |||
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | |||
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd"> | |||
<configuration_settings> | |||
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path> | |||
<output_path>..</output_path> | |||
<hal_version>3.0.x</hal_version> | |||
</configuration_settings> | |||
<board_name>ST STM32F072B-Discovery</board_name> | |||
<board_id>ST_STM32F072B_DISCOVERY</board_id> | |||
<board_functions></board_functions> | |||
<subtype>STM32F072xB</subtype> | |||
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0" | |||
LSEBypass="false" LSEDrive="3 High Drive (default)" /> | |||
<ports> | |||
<GPIOA> | |||
<pin0 | |||
ID="BUTTON" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="USB_DM" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="USB_DP" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="SWDIO" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="SWCLK" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullDown" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOA> | |||
<GPIOB> | |||
<pin0 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="SPI2_SCK" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="SPI2_MISO" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="SPI2_MOSI" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
</GPIOB> | |||
<GPIOC> | |||
<pin0 | |||
ID="MEMS_CS" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="LED_RED" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="LED_BLUE" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="LED_ORANGE" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" ></pin8> | |||
<pin9 | |||
ID="LED_GREEN" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="OSC32_IN" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="OSC32_OUT" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOC> | |||
<GPIOD> | |||
<pin0 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOD> | |||
<GPIOE> | |||
<pin0 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin1 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin2 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin3 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin4 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin5 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin6 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin7 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin8 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin9 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin10 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin11 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin12 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin13 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin14 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin15 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
</GPIOE> | |||
<GPIOF> | |||
<pin0 | |||
ID="OSC_IN" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="OSC_OUT" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOF> | |||
</ports> | |||
</board> |
@ -0,0 +1,7 @@ | |||
/* Address for jumping to bootloader on STM32 chips. */ | |||
/* It is chip dependent, the correct number can be looked up here (page 175): | |||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | |||
* This also requires a patch to chibios: | |||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | |||
*/ | |||
#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800 |
@ -0,0 +1,524 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/** | |||
* @file templates/chconf.h | |||
* @brief Configuration file template. | |||
* @details A copy of this file must be placed in each project directory, it | |||
* contains the application specific kernel settings. | |||
* | |||
* @addtogroup config | |||
* @details Kernel related settings and hooks. | |||
* @{ | |||
*/ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
* @name System timers settings | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief System time counter resolution. | |||
* @note Allowed values are 16 or 32 bits. | |||
*/ | |||
#define CH_CFG_ST_RESOLUTION 32 | |||
/** | |||
* @brief System tick frequency. | |||
* @details Frequency of the system timer that drives the system ticks. This | |||
* setting also defines the system tick time unit. | |||
*/ | |||
#define CH_CFG_ST_FREQUENCY 10000 | |||
/** | |||
* @brief Time delta constant for the tick-less mode. | |||
* @note If this value is zero then the system uses the classic | |||
* periodic tick. This value represents the minimum number | |||
* of ticks that is safe to specify in a timeout directive. | |||
* The value one is not valid, timeouts are rounded up to | |||
* this value. | |||
*/ | |||
#define CH_CFG_ST_TIMEDELTA 2 | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Kernel parameters and options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Round robin interval. | |||
* @details This constant is the number of system ticks allowed for the | |||
* threads before preemption occurs. Setting this value to zero | |||
* disables the preemption for threads with equal priority and the | |||
* round robin becomes cooperative. Note that higher priority | |||
* threads can still preempt, the kernel is always preemptive. | |||
* @note Disabling the round robin preemption makes the kernel more compact | |||
* and generally faster. | |||
* @note The round robin preemption is not supported in tickless mode and | |||
* must be set to zero in that case. | |||
*/ | |||
#define CH_CFG_TIME_QUANTUM 0 | |||
/** | |||
* @brief Managed RAM size. | |||
* @details Size of the RAM area to be managed by the OS. If set to zero | |||
* then the whole available RAM is used. The core memory is made | |||
* available to the heap allocator and/or can be used directly through | |||
* the simplified core memory allocator. | |||
* | |||
* @note In order to let the OS manage the whole RAM the linker script must | |||
* provide the @p __heap_base__ and @p __heap_end__ symbols. | |||
* @note Requires @p CH_CFG_USE_MEMCORE. | |||
*/ | |||
#define CH_CFG_MEMCORE_SIZE 0 | |||
/** | |||
* @brief Idle thread automatic spawn suppression. | |||
* @details When this option is activated the function @p chSysInit() | |||
* does not spawn the idle thread. The application @p main() | |||
* function becomes the idle thread and must implement an | |||
* infinite loop. | |||
*/ | |||
#define CH_CFG_NO_IDLE_THREAD FALSE | |||
/* Use __WFI in the idle thread for waiting. Does lower the power | |||
* consumption. */ | |||
#define CORTEX_ENABLE_WFI_IDLE TRUE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Performance options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief OS optimization. | |||
* @details If enabled then time efficient rather than space efficient code | |||
* is used when two possible implementations exist. | |||
* | |||
* @note This is not related to the compiler optimization options. | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_OPTIMIZE_SPEED FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Subsystem options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Time Measurement APIs. | |||
* @details If enabled then the time measurement APIs are included in | |||
* the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_TM FALSE | |||
/** | |||
* @brief Threads registry APIs. | |||
* @details If enabled then the registry APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_REGISTRY TRUE | |||
/** | |||
* @brief Threads synchronization APIs. | |||
* @details If enabled then the @p chThdWait() function is included in | |||
* the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_WAITEXIT TRUE | |||
/** | |||
* @brief Semaphores APIs. | |||
* @details If enabled then the Semaphores APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES TRUE | |||
/** | |||
* @brief Semaphores queuing mode. | |||
* @details If enabled then the threads are enqueued on semaphores by | |||
* priority rather than in FIFO order. | |||
* | |||
* @note The default is @p FALSE. Enable this if you have special | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | |||
/** | |||
* @brief Mutexes APIs. | |||
* @details If enabled then the mutexes APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MUTEXES TRUE | |||
/** | |||
* @brief Enables recursive behavior on mutexes. | |||
* @note Recursive mutexes are heavier and have an increased | |||
* memory footprint. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note Requires @p CH_CFG_USE_MUTEXES. | |||
*/ | |||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | |||
/** | |||
* @brief Conditional Variables APIs. | |||
* @details If enabled then the conditional variables APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_MUTEXES. | |||
*/ | |||
#define CH_CFG_USE_CONDVARS TRUE | |||
/** | |||
* @brief Conditional Variables APIs with timeout. | |||
* @details If enabled then the conditional variables APIs with timeout | |||
* specification are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_CONDVARS. | |||
*/ | |||
#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE | |||
/** | |||
* @brief Events Flags APIs. | |||
* @details If enabled then the event flags APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_EVENTS TRUE | |||
/** | |||
* @brief Events Flags APIs with timeout. | |||
* @details If enabled then the events APIs with timeout specification | |||
* are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_EVENTS. | |||
*/ | |||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE | |||
/** | |||
* @brief Synchronous Messages APIs. | |||
* @details If enabled then the synchronous messages APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MESSAGES TRUE | |||
/** | |||
* @brief Synchronous Messages queuing mode. | |||
* @details If enabled then messages are served by priority rather than in | |||
* FIFO order. | |||
* | |||
* @note The default is @p FALSE. Enable this if you have special | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_MESSAGES. | |||
*/ | |||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE | |||
/** | |||
* @brief Mailboxes APIs. | |||
* @details If enabled then the asynchronous messages (mailboxes) APIs are | |||
* included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MEMCORE FALSE | |||
/** | |||
* @brief Heap Allocator APIs. | |||
* @details If enabled then the memory heap allocator APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or | |||
* @p CH_CFG_USE_SEMAPHORES. | |||
* @note Mutexes are recommended. | |||
*/ | |||
#define CH_CFG_USE_HEAP FALSE | |||
/** | |||
* @brief Memory Pools Allocator APIs. | |||
* @details If enabled then the memory pools allocator APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MEMPOOLS FALSE | |||
/** | |||
* @brief Dynamic Threads APIs. | |||
* @details If enabled then the dynamic threads creation APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_WAITEXIT. | |||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | |||
*/ | |||
#define CH_CFG_USE_DYNAMIC FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Debug options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Debug option, kernel statistics. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_STATISTICS FALSE | |||
/** | |||
* @brief Debug option, system state check. | |||
* @details If enabled the correct call protocol for system APIs is checked | |||
* at runtime. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE | |||
/** | |||
* @brief Debug option, parameters checks. | |||
* @details If enabled then the checks on the API functions input | |||
* parameters are activated. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_ENABLE_CHECKS FALSE | |||
/** | |||
* @brief Debug option, consistency checks. | |||
* @details If enabled then all the assertions in the kernel code are | |||
* activated. This includes consistency checks inside the kernel, | |||
* runtime anomalies and port-defined checks. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_ENABLE_ASSERTS FALSE | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
* @details If enabled then a runtime stack check is performed. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The stack check is performed in a architecture/port dependent way. | |||
* It may not be implemented or some ports. | |||
* @note The default failure mode is to halt the system with the global | |||
* @p panic_msg variable set to @p NULL. | |||
*/ | |||
#define CH_DBG_ENABLE_STACK_CHECK FALSE | |||
/** | |||
* @brief Debug option, stacks initialization. | |||
* @details If enabled then the threads working area is filled with a byte | |||
* value when a thread is created. This can be useful for the | |||
* runtime measurement of the used stack. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_FILL_THREADS FALSE | |||
/** | |||
* @brief Debug option, threads profiling. | |||
* @details If enabled then a field is added to the @p thread_t structure that | |||
* counts the system ticks occurred while executing the thread. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note This debug option is not currently compatible with the | |||
* tickless mode. | |||
*/ | |||
#define CH_DBG_THREADS_PROFILING FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Kernel hooks | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Threads descriptor structure extension. | |||
* @details User fields added to the end of the @p thread_t structure. | |||
*/ | |||
#define CH_CFG_THREAD_EXTRA_FIELDS \ | |||
/* Add threads custom fields here.*/ | |||
/** | |||
* @brief Threads initialization hook. | |||
* @details User initialization code added to the @p chThdInit() API. | |||
* | |||
* @note It is invoked from within @p chThdInit() and implicitly from all | |||
* the threads creation APIs. | |||
*/ | |||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \ | |||
/* Add threads initialization code here.*/ \ | |||
} | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
} | |||
/** | |||
* @brief Context switch hook. | |||
* @details This hook is invoked just before switching between threads. | |||
*/ | |||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
* should be invoked from here. | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread leave hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
* should be invoked from here. | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle Loop hook. | |||
* @details This hook is continuously invoked by the idle thread loop. | |||
*/ | |||
#define CH_CFG_IDLE_LOOP_HOOK() { \ | |||
/* Idle loop code here.*/ \ | |||
} | |||
/** | |||
* @brief System tick event hook. | |||
* @details This hook is invoked in the system tick handler immediately | |||
* after processing the virtual timers queue. | |||
*/ | |||
#define CH_CFG_SYSTEM_TICK_HOOK() { \ | |||
/* System tick event code here.*/ \ | |||
} | |||
/** | |||
* @brief System halt hook. | |||
* @details This hook is invoked in case to a system halting error before | |||
* the system is halted. | |||
*/ | |||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@ -0,0 +1,97 @@ | |||
/* | |||
Copyright 2015 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#pragma once | |||
/* USB Device descriptor parameter */ | |||
#define VENDOR_ID 0xCA04 | |||
#define PRODUCT_ID 0x5A65 | |||
#define DEVICE_VER 0x0001 | |||
/* in python2: list(u"whatever".encode('utf-16-le')) */ | |||
/* at most 32 characters or the ugly hack in usb_main.c borks */ | |||
#define MANUFACTURER CannonKeys | |||
#define PRODUCT Savage65 | |||
#define DESCRIPTION Savage65 Keyboard | |||
/* key matrix size */ | |||
#define MATRIX_ROWS 5 | |||
#define MATRIX_COLS 16 | |||
#define MATRIX_COL_PINS { A5, B10, A3, A2, B0, A9, C13, B9, B8, B7, B6, B5, B4, B3, A15, A14 } | |||
#define MATRIX_ROW_PINS { B12, B11, B14, A8, A1 } | |||
#define DIODE_DIRECTION COL2ROW | |||
#define BACKLIGHT_LEVELS 6 | |||
#define BACKLIGHT_BREATHING | |||
#define BREATHING_PERIOD 6 | |||
/* define if matrix has ghost */ | |||
//#define MATRIX_HAS_GHOST | |||
/* Set 0 if debouncing isn't needed */ | |||
#define DEBOUNCE 5 | |||
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ | |||
#define LOCKING_SUPPORT_ENABLE | |||
/* Locking resynchronize hack */ | |||
#define LOCKING_RESYNC_ENABLE | |||
#define RGBLIGHT_ANIMATIONS | |||
#define WS2812_LED_N 20 | |||
#define RGBLED_NUM WS2812_LED_N | |||
#define PORT_WS2812 GPIOB | |||
#define PIN_WS2812 15 | |||
#define WS2812_SPI SPID2 | |||
// EEPROM usage | |||
// TODO: refactor with new user EEPROM code (coming soon) | |||
#define EEPROM_MAGIC 0x451F | |||
#define EEPROM_MAGIC_ADDR 40 | |||
// Bump this every time we change what we store | |||
// This will automatically reset the EEPROM with defaults | |||
// and avoid loading invalid data from the EEPROM | |||
#define EEPROM_VERSION 0x02 | |||
#define EEPROM_VERSION_ADDR 42 | |||
#define DYNAMIC_KEYMAP_LAYER_COUNT 4 | |||
// Dynamic macro starts after dynamic keymaps (35+(4*5*15*2)) = (35+600) = 635 | |||
// start + layer * rows * col * 2 | |||
#define DYNAMIC_KEYMAP_EEPROM_ADDR 43 | |||
#define EEPROM_CUSTOM_BACKLIGHT 684 | |||
#define DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR 685 | |||
#define DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE 192 | |||
#define DYNAMIC_KEYMAP_MACRO_COUNT 16 | |||
/* | |||
* Feature disable options | |||
* These options are also useful to firmware size reduction. | |||
*/ | |||
/* disable debug print */ | |||
//#define NO_DEBUG | |||
/* disable print */ | |||
//#define NO_PRINT | |||
/* disable action features */ | |||
//#define NO_ACTION_LAYER | |||
//#define NO_ACTION_TAPPING | |||
//#define NO_ACTION_ONESHOT | |||
//#define NO_ACTION_MACRO | |||
//#define NO_ACTION_FUNCTION |
@ -0,0 +1,354 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/** | |||
* @file templates/halconf.h | |||
* @brief HAL configuration header. | |||
* @details HAL configuration file, this file allows to enable or disable the | |||
* various device drivers from your application. You may also use | |||
* this file in order to override the device drivers default settings. | |||
* | |||
* @addtogroup HAL_CONF | |||
* @{ | |||
*/ | |||
#ifndef _HALCONF_H_ | |||
#define _HALCONF_H_ | |||
#include "mcuconf.h" | |||
/** | |||
* @brief Enables the PAL subsystem. | |||
*/ | |||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | |||
#define HAL_USE_PAL TRUE | |||
#endif | |||
/** | |||
* @brief Enables the ADC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | |||
#define HAL_USE_ADC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the CAN subsystem. | |||
*/ | |||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | |||
#define HAL_USE_CAN FALSE | |||
#endif | |||
/** | |||
* @brief Enables the DAC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | |||
#define HAL_USE_DAC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the EXT subsystem. | |||
*/ | |||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) | |||
#define HAL_USE_EXT FALSE | |||
#endif | |||
/** | |||
* @brief Enables the GPT subsystem. | |||
*/ | |||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | |||
#define HAL_USE_GPT FALSE | |||
#endif | |||
/** | |||
* @brief Enables the I2C subsystem. | |||
*/ | |||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | |||
#define HAL_USE_I2C FALSE | |||
#endif | |||
/** | |||
* @brief Enables the I2S subsystem. | |||
*/ | |||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | |||
#define HAL_USE_I2S FALSE | |||
#endif | |||
/** | |||
* @brief Enables the ICU subsystem. | |||
*/ | |||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | |||
#define HAL_USE_ICU FALSE | |||
#endif | |||
/** | |||
* @brief Enables the MAC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | |||
#define HAL_USE_MAC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the MMC_SPI subsystem. | |||
*/ | |||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | |||
#define HAL_USE_MMC_SPI FALSE | |||
#endif | |||
/** | |||
* @brief Enables the PWM subsystem. | |||
*/ | |||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | |||
#define HAL_USE_PWM TRUE | |||
#endif | |||
/** | |||
* @brief Enables the RTC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | |||
#define HAL_USE_RTC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SDC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | |||
#define HAL_USE_SDC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SERIAL subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | |||
#define HAL_USE_SERIAL FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SERIAL over USB subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | |||
#define HAL_USE_SERIAL_USB FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SPI subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | |||
#define HAL_USE_SPI TRUE | |||
#endif | |||
/** | |||
* @brief Enables the UART subsystem. | |||
*/ | |||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | |||
#define HAL_USE_UART FALSE | |||
#endif | |||
/** | |||
* @brief Enables the USB subsystem. | |||
*/ | |||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | |||
#define HAL_USE_USB TRUE | |||
#endif | |||
/** | |||
* @brief Enables the WDG subsystem. | |||
*/ | |||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | |||
#define HAL_USE_WDG FALSE | |||
#endif | |||
/*===========================================================================*/ | |||
/* ADC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | |||
#define ADC_USE_WAIT TRUE | |||
#endif | |||
/** | |||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define ADC_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* CAN driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Sleep mode related APIs inclusion switch. | |||
*/ | |||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | |||
#define CAN_USE_SLEEP_MODE TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* I2C driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables the mutual exclusion APIs on the I2C bus. | |||
*/ | |||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define I2C_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* MAC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables an event sources for incoming packets. | |||
*/ | |||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | |||
#define MAC_USE_ZERO_COPY FALSE | |||
#endif | |||
/** | |||
* @brief Enables an event sources for incoming packets. | |||
*/ | |||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | |||
#define MAC_USE_EVENTS TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* MMC_SPI driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Delays insertions. | |||
* @details If enabled this options inserts delays into the MMC waiting | |||
* routines releasing some extra CPU time for the threads with | |||
* lower priority, this may slow down the driver a bit however. | |||
* This option is recommended also if the SPI driver does not | |||
* use a DMA channel and heavily loads the CPU. | |||
*/ | |||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | |||
#define MMC_NICE_WAITING TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* SDC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Number of initialization attempts before rejecting the card. | |||
* @note Attempts are performed at 10mS intervals. | |||
*/ | |||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | |||
#define SDC_INIT_RETRY 100 | |||
#endif | |||
/** | |||
* @brief Include support for MMC cards. | |||
* @note MMC support is not yet implemented so this option must be kept | |||
* at @p FALSE. | |||
*/ | |||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | |||
#define SDC_MMC_SUPPORT FALSE | |||
#endif | |||
/** | |||
* @brief Delays insertions. | |||
* @details If enabled this options inserts delays into the MMC waiting | |||
* routines releasing some extra CPU time for the threads with | |||
* lower priority, this may slow down the driver a bit however. | |||
*/ | |||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | |||
#define SDC_NICE_WAITING TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* SERIAL driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Default bit rate. | |||
* @details Configuration parameter, this is the baud rate selected for the | |||
* default configuration. | |||
*/ | |||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | |||
#define SERIAL_DEFAULT_BITRATE 38400 | |||
#endif | |||
/** | |||
* @brief Serial buffers size. | |||
* @details Configuration parameter, you can change the depth of the queue | |||
* buffers depending on the requirements of your application. | |||
* @note The default is 64 bytes for both the transmission and receive | |||
* buffers. | |||
*/ | |||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | |||
#define SERIAL_BUFFERS_SIZE 16 | |||
#endif | |||
/*===========================================================================*/ | |||
/* SERIAL_USB driver related setting. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Serial over USB buffers size. | |||
* @details Configuration parameter, the buffer size must be a multiple of | |||
* the USB data endpoint maximum packet size. | |||
* @note The default is 64 bytes for both the transmission and receive | |||
* buffers. | |||
*/ | |||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | |||
#define SERIAL_USB_BUFFERS_SIZE 1 | |||
#endif | |||
/*===========================================================================*/ | |||
/* SPI driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | |||
#define SPI_USE_WAIT TRUE | |||
#endif | |||
/** | |||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define SPI_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* USB driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | |||
#define USB_USE_WAIT TRUE | |||
#endif | |||
#endif /* _HALCONF_H_ */ | |||
/** @} */ |
@ -0,0 +1,13 @@ | |||
{ | |||
"keyboard_name": "Savage65", | |||
"url": "https://cannonkeys.com", | |||
"maintainer": "awkannan", | |||
"width": 16, | |||
"height": 5, | |||
"layouts": { | |||
"LAYOUT_default": { | |||
"layout": [{"label":"~", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"@", "x":2, "y":0}, {"label":"#", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"x":13, "y":0}, {"x":14, "y":0}, {"x":15, "y":0}, {"label":"Tab", "x":0, "y":1, "w":1.5}, {"label":"Q", "x":1.5, "y":1}, {"label":"W", "x":2.5, "y":1}, {"label":"E", "x":3.5, "y":1}, {"label":"R", "x":4.5, "y":1}, {"label":"T", "x":5.5, "y":1}, {"label":"Y", "x":6.5, "y":1}, {"label":"U", "x":7.5, "y":1}, {"label":"I", "x":8.5, "y":1}, {"label":"O", "x":9.5, "y":1}, {"label":"P", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"|", "x":13.5, "y":1, "w":1.5}, {"x":15, "y":1}, {"label":"Caps Lock", "x":0, "y":2, "w":1.75}, {"label":"A", "x":1.75, "y":2}, {"label":"S", "x":2.75, "y":2}, {"label":"D", "x":3.75, "y":2}, {"label":"F", "x":4.75, "y":2}, {"label":"G", "x":5.75, "y":2}, {"label":"H", "x":6.75, "y":2}, {"label":"J", "x":7.75, "y":2}, {"label":"K", "x":8.75, "y":2}, {"label":"L", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"\"", "x":11.75, "y":2}, {"x":12.75, "y":2}, {"label":"Enter", "x":13.75, "y":2, "w":1.25}, {"x":15, "y":2}, {"x":0, "y":3, "w":1.25}, {"x":1.25, "y":3}, {"label":"Z", "x":2.25, "y":3}, {"label":"X", "x":3.25, "y":3}, {"label":"C", "x":4.25, "y":3}, {"label":"V", "x":5.25, "y":3}, {"label":"B", "x":6.25, "y":3}, {"label":"N", "x":7.25, "y":3}, {"label":"M", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"?", "x":11.25, "y":3}, {"label":"Shift", "x":12.25, "y":3, "w":1.75}, {"x":14, "y":3}, {"x":15, "y":3}, {"label":"Ctrl", "x":0, "y":4, "w":1.25}, {"label":"Win", "x":1.25, "y":4, "w":1.25}, {"label":"Alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"Alt", "x":10, "y":4, "w":1.25}, {"label":"Ctrl", "x":11.25, "y":4, "w":1.25}, {"x":13, "y":4}, {"x":14, "y":4}, {"x":15, "y":4}] | |||
} | |||
} | |||
} |
@ -0,0 +1,46 @@ | |||
/* | |||
Copyright 2012,2013 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#include QMK_KEYBOARD_H | |||
// Each layer gets a name for readability, which is then used in the keymap matrix below. | |||
// The underscores don't mean anything - you can have a layer called STUFF or any other name. | |||
// Layer names don't all need to be of the same length, obviously, and you can also skip them | |||
// entirely and just use numbers. | |||
enum layer_names { | |||
_BASE, | |||
_FN1, | |||
}; | |||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { | |||
[_BASE] = LAYOUT_default( | |||
KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_DEL, KC_INS, | |||
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_DEL, | |||
KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUBS, KC_ENT, KC_PGUP, | |||
KC_LSFT, KC_NUHS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP, KC_PGDN, | |||
KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, MO(_FN1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT | |||
), | |||
[_FN1] = LAYOUT_default( | |||
KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_TRNS, RGB_TOG, | |||
KC_TRNS, KC_TRNS, KC_UP, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RGB_MOD, | |||
BL_BRTG, KC_LEFT, KC_DOWN, KC_RGHT, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
BL_INC, BL_DEC, BL_TOGG, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_GRV, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RESET, KC_TRNS, KC_TRNS | |||
) | |||
}; |
@ -0,0 +1,47 @@ | |||
/* | |||
Copyright 2012,2013 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#include QMK_KEYBOARD_H | |||
// Each layer gets a name for readability, which is then used in the keymap matrix below. | |||
// The underscores don't mean anything - you can have a layer called STUFF or any other name. | |||
// Layer names don't all need to be of the same length, obviously, and you can also skip them | |||
// entirely and just use numbers. | |||
enum layer_names { | |||
_BASE, | |||
_FN1, | |||
}; | |||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { | |||
[_BASE] = LAYOUT_default( | |||
KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_DEL, KC_INS, | |||
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_DEL, | |||
KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUBS, KC_ENT, KC_PGUP, | |||
KC_LSFT, KC_NUHS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP, KC_PGDN, | |||
KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, MO(_FN1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT | |||
), | |||
[_FN1] = LAYOUT_default( | |||
KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_TRNS, RGB_TOG, | |||
KC_TRNS, KC_TRNS, KC_UP, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RGB_MOD, | |||
BL_BRTG, KC_LEFT, KC_DOWN, KC_RGHT, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
BL_INC, BL_DEC, BL_TOGG, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_GRV, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RESET, KC_TRNS, KC_TRNS | |||
) | |||
}; |
@ -0,0 +1,5 @@ | |||
# rules.mk overrides to enable VIA | |||
RAW_ENABLE = yes | |||
DYNAMIC_KEYMAP_ENABLE = yes | |||
@ -0,0 +1,176 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
#ifndef _MCUCONF_H_ | |||
#define _MCUCONF_H_ | |||
/* | |||
* STM32F0xx drivers configuration. | |||
* The following settings override the default settings present in | |||
* the various device driver implementation headers. | |||
* Note that the settings for each driver only have effect if the whole | |||
* driver is enabled in halconf.h. | |||
* | |||
* IRQ priorities: | |||
* 3...0 Lowest...Highest. | |||
* | |||
* DMA priorities: | |||
* 0...3 Lowest...Highest. | |||
*/ | |||
#define STM32F0xx_MCUCONF | |||
// #define STM32F070xB | |||
/* | |||
* HAL driver system settings. | |||
*/ | |||
#define STM32_NO_INIT FALSE | |||
#define STM32_PVD_ENABLE FALSE | |||
#define STM32_PLS STM32_PLS_LEV0 | |||
#define STM32_HSI_ENABLED TRUE | |||
#define STM32_HSI14_ENABLED TRUE | |||
#define STM32_HSI48_ENABLED FALSE | |||
#define STM32_LSI_ENABLED TRUE | |||
#define STM32_HSE_ENABLED FALSE | |||
#define STM32_LSE_ENABLED FALSE | |||
#define STM32_SW STM32_SW_PLL | |||
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 | |||
#define STM32_PREDIV_VALUE 1 | |||
#define STM32_PLLMUL_VALUE 12 | |||
#define STM32_HPRE STM32_HPRE_DIV1 | |||
#define STM32_PPRE STM32_PPRE_DIV1 | |||
#define STM32_ADCSW STM32_ADCSW_HSI14 | |||
#define STM32_ADCPRE STM32_ADCPRE_DIV4 | |||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | |||
#define STM32_ADCPRE STM32_ADCPRE_DIV4 | |||
#define STM32_ADCSW STM32_ADCSW_HSI14 | |||
#define STM32_USBSW STM32_USBSW_HSI48 | |||
#define STM32_CECSW STM32_CECSW_HSI | |||
#define STM32_I2C1SW STM32_I2C1SW_HSI | |||
#define STM32_USART1SW STM32_USART1SW_PCLK | |||
#define STM32_RTCSEL STM32_RTCSEL_LSI | |||
/* | |||
* ADC driver system settings. | |||
*/ | |||
#define STM32_ADC_USE_ADC1 FALSE | |||
#define STM32_ADC_ADC1_DMA_PRIORITY 2 | |||
#define STM32_ADC_IRQ_PRIORITY 2 | |||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 | |||
/* | |||
* EXT driver system settings. | |||
*/ | |||
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 | |||
/* | |||
* GPT driver system settings. | |||
*/ | |||
#define STM32_GPT_USE_TIM1 FALSE | |||
#define STM32_GPT_USE_TIM2 FALSE | |||
#define STM32_GPT_USE_TIM3 FALSE | |||
#define STM32_GPT_USE_TIM14 FALSE | |||
#define STM32_GPT_TIM1_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM2_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM3_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM14_IRQ_PRIORITY 2 | |||
/* | |||
* I2C driver system settings. | |||
*/ | |||
#define STM32_I2C_USE_I2C1 FALSE | |||
#define STM32_I2C_USE_I2C2 FALSE | |||
#define STM32_I2C_BUSY_TIMEOUT 50 | |||
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 | |||
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 | |||
#define STM32_I2C_USE_DMA TRUE | |||
#define STM32_I2C_I2C1_DMA_PRIORITY 1 | |||
#define STM32_I2C_I2C2_DMA_PRIORITY 1 | |||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | |||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | |||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | |||
/* | |||
* ICU driver system settings. | |||
*/ | |||
#define STM32_ICU_USE_TIM1 FALSE | |||
#define STM32_ICU_USE_TIM2 FALSE | |||
#define STM32_ICU_USE_TIM3 FALSE | |||
#define STM32_ICU_TIM1_IRQ_PRIORITY 3 | |||
#define STM32_ICU_TIM2_IRQ_PRIORITY 3 | |||
#define STM32_ICU_TIM3_IRQ_PRIORITY 3 | |||
/* | |||
* PWM driver system settings. | |||
*/ | |||
#define STM32_PWM_USE_ADVANCED FALSE | |||
#define STM32_PWM_USE_TIM1 FALSE | |||
#define STM32_PWM_USE_TIM2 FALSE | |||
#define STM32_PWM_USE_TIM3 TRUE | |||
#define STM32_PWM_TIM1_IRQ_PRIORITY 3 | |||
#define STM32_PWM_TIM2_IRQ_PRIORITY 3 | |||
#define STM32_PWM_TIM3_IRQ_PRIORITY 3 | |||
/* | |||
* SERIAL driver system settings. | |||
*/ | |||
#define STM32_SERIAL_USE_USART1 FALSE | |||
#define STM32_SERIAL_USE_USART2 FALSE | |||
#define STM32_SERIAL_USART1_PRIORITY 3 | |||
#define STM32_SERIAL_USART2_PRIORITY 3 | |||
/* | |||
* SPI driver system settings. | |||
*/ | |||
#define STM32_SPI_USE_SPI1 FALSE | |||
#define STM32_SPI_USE_SPI2 TRUE | |||
#define STM32_SPI_SPI1_DMA_PRIORITY 1 | |||
#define STM32_SPI_SPI2_DMA_PRIORITY 1 | |||
#define STM32_SPI_SPI1_IRQ_PRIORITY 2 | |||
#define STM32_SPI_SPI2_IRQ_PRIORITY 2 | |||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | |||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | |||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | |||
/* | |||
* ST driver system settings. | |||
*/ | |||
#define STM32_ST_IRQ_PRIORITY 2 | |||
#define STM32_ST_USE_TIMER 2 | |||
/* | |||
* UART driver system settings. | |||
*/ | |||
#define STM32_UART_USE_USART1 FALSE | |||
#define STM32_UART_USE_USART2 FALSE | |||
#define STM32_UART_USART1_IRQ_PRIORITY 3 | |||
#define STM32_UART_USART2_IRQ_PRIORITY 3 | |||
#define STM32_UART_USART1_DMA_PRIORITY 0 | |||
#define STM32_UART_USART2_DMA_PRIORITY 0 | |||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | |||
/* | |||
* USB driver system settings. | |||
*/ | |||
#define STM32_USB_USE_USB1 TRUE | |||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | |||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 | |||
#endif /* _MCUCONF_H_ */ |
@ -0,0 +1,12 @@ | |||
# CannonKeys Savage65 | |||
Savage65 Keyboard | |||
Keyboard Maintainer: [Andrew Kannan](https://github.com/awkannan) | |||
Hardware Supported: STM32F072CBT6 | |||
Make example for this keyboard (after setting up your build environment): | |||
make cannonkeys/savage65:default | |||
See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs). |
@ -0,0 +1,56 @@ | |||
# project specific files | |||
# SRC = ssd1306.c | |||
## chip/board settings | |||
# the next two should match the directories in | |||
# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) | |||
MCU_FAMILY = STM32 | |||
MCU_SERIES = STM32F0xx | |||
# linker script to use | |||
# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ | |||
# or <this_dir>/ld/ | |||
MCU_LDSCRIPT = STM32F072xB | |||
# startup code to use | |||
# is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/ | |||
MCU_STARTUP = stm32f0xx | |||
# it should exist either in <chibios>/os/hal/boards/ | |||
# or <this_dir>/boards | |||
BOARD = ST_STM32F072B_DISCOVERY | |||
# Cortex version | |||
# Teensy LC is cortex-m0; Teensy 3.x are cortex-m4 | |||
MCU = cortex-m0 | |||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 | |||
ARMV = 6 | |||
# If you want to be able to jump to bootloader from firmware on STM32 MCUs, | |||
# set the correct BOOTLOADER_ADDRESS. Either set it here, or define it in | |||
# ./bootloader_defs.h or in ./boards/<FOO>/bootloader_defs.h (if you have | |||
# a custom board definition that you plan to reuse). | |||
# If you're not setting it here, leave it commented out. | |||
# It is chip dependent, the correct number can be looked up here (page 175): | |||
# http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | |||
# This also requires a patch to chibios: | |||
# <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | |||
#STM32_BOOTLOADER_ADDRESS = 0x1FFFC800 | |||
# Build Options | |||
# comment out to disable the options. | |||
# | |||
# project specific files | |||
VPATH += keyboards/cannonkeys/stm32f072 | |||
SRC = keyboard.c \ | |||
led.c | |||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | |||
DFU_SUFFIX_ARGS = -v 0483 -p DF11 | |||
BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration | |||
MOUSEKEY_ENABLE = yes # Mouse keys | |||
EXTRAKEY_ENABLE = yes # Audio control and System control | |||
CONSOLE_ENABLE = yes # Console for debug | |||
COMMAND_ENABLE = yes # Commands for debug and configuration | |||
SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend | |||
NKRO_ENABLE = yes # USB Nkey Rollover | |||
CUSTOM_MATRIX = no # Custom matrix file | |||
# BACKLIGHT_ENABLE = yes # This is broken on 072 for some reason | |||
RGBLIGHT_ENABLE = yes | |||
@ -0,0 +1 @@ | |||
#include "savage65.h" |
@ -0,0 +1,17 @@ | |||
#pragma once | |||
#include "quantum.h" | |||
#define LAYOUT_default( \ | |||
K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, K015, \ | |||
K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, K115, \ | |||
K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, K215, \ | |||
K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K312, K313, K315, \ | |||
K400, K401, K402, K406, K410, K411, K412, K413, K415 \ | |||
) { \ | |||
{ K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, K015 }, \ | |||
{ K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, KC_NO, K115 }, \ | |||
{ K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, KC_NO, K215 }, \ | |||
{ K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K312, K313, KC_NO, K315 }, \ | |||
{ K400, K401, K402, KC_NO, KC_NO, KC_NO, K406, KC_NO, KC_NO, KC_NO, K410, K411, K412, K413, KC_NO, K415 } \ | |||
} |
@ -0,0 +1,109 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* This file has been automatically generated using ChibiStudio board | |||
* generator plugin. Do not edit manually. | |||
*/ | |||
#include "hal.h" | |||
#if HAL_USE_PAL || defined(__DOXYGEN__) | |||
/** | |||
* @brief PAL setup. | |||
* @details Digital I/O ports static configuration as defined in @p board.h. | |||
* This variable is used by the HAL when initializing the PAL driver. | |||
*/ | |||
const PALConfig pal_default_config = { | |||
#if STM32_HAS_GPIOA | |||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | |||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOB | |||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | |||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOC | |||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | |||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOD | |||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | |||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOE | |||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | |||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOF | |||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | |||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOG | |||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | |||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOH | |||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | |||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | |||
#endif | |||
#if STM32_HAS_GPIOI | |||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | |||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} | |||
#endif | |||
}; | |||
#endif | |||
void enter_bootloader_mode_if_requested(void); | |||
/** | |||
* @brief Early initialization code. | |||
* @details This initialization must be performed just after stack setup | |||
* and before any other initialization. | |||
*/ | |||
void __early_init(void) { | |||
enter_bootloader_mode_if_requested(); | |||
stm32_clock_init(); | |||
} | |||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | |||
/** | |||
* @brief MMC_SPI card detection. | |||
*/ | |||
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | |||
(void)mmcp; | |||
/* TODO: Fill the implementation.*/ | |||
return true; | |||
} | |||
/** | |||
* @brief MMC_SPI card write protection detection. | |||
*/ | |||
bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | |||
(void)mmcp; | |||
/* TODO: Fill the implementation.*/ | |||
return false; | |||
} | |||
#endif | |||
/** | |||
* @brief Board-specific initialization code. | |||
* @todo Add your board-specific code, if any. | |||
*/ | |||
void boardInit(void) { | |||
} |
@ -0,0 +1,922 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/* | |||
* This file has been automatically generated using ChibiStudio board | |||
* generator plugin. Do not edit manually. | |||
*/ | |||
#ifndef BOARD_H | |||
#define BOARD_H | |||
/* | |||
* Setup for ST STM32F072B-Discovery board. | |||
*/ | |||
/* | |||
* Board identifier. | |||
*/ | |||
#define BOARD_ST_STM32F072B_DISCOVERY | |||
#define BOARD_NAME "ST STM32F072B-Discovery" | |||
/* | |||
* Board oscillators-related settings. | |||
* NOTE: HSE not fitted. | |||
*/ | |||
#if !defined(STM32_LSECLK) | |||
#define STM32_LSECLK 32768 | |||
#endif | |||
#define STM32_LSEDRV (3U << 3U) | |||
#if !defined(STM32_HSECLK) | |||
#define STM32_HSECLK 0U | |||
#endif | |||
#define STM32_HSE_BYPASS | |||
/* | |||
* MCU type as defined in the ST header. | |||
*/ | |||
#define STM32F072xB | |||
/* | |||
* IO pins assignments. | |||
*/ | |||
#define GPIOA_BUTTON 0U | |||
#define GPIOA_PIN1 1U | |||
#define GPIOA_PIN2 2U | |||
#define GPIOA_PIN3 3U | |||
#define GPIOA_PIN4 4U | |||
#define GPIOA_PIN5 5U | |||
#define GPIOA_PIN6 6U | |||
#define GPIOA_PIN7 7U | |||
#define GPIOA_PIN8 8U | |||
#define GPIOA_PIN9 9U | |||
#define GPIOA_PIN10 10U | |||
#define GPIOA_USB_DM 11U | |||
#define GPIOA_USB_DP 12U | |||
#define GPIOA_SWDIO 13U | |||
#define GPIOA_SWCLK 14U | |||
#define GPIOA_PIN15 15U | |||
#define GPIOB_PIN0 0U | |||
#define GPIOB_PIN1 1U | |||
#define GPIOB_PIN2 2U | |||
#define GPIOB_PIN3 3U | |||
#define GPIOB_PIN4 4U | |||
#define GPIOB_PIN5 5U | |||
#define GPIOB_PIN6 6U | |||
#define GPIOB_PIN7 7U | |||
#define GPIOB_PIN8 8U | |||
#define GPIOB_PIN9 9U | |||
#define GPIOB_PIN10 10U | |||
#define GPIOB_PIN11 11U | |||
#define GPIOB_PIN12 12U | |||
#define GPIOB_SPI2_SCK 13U | |||
#define GPIOB_SPI2_MISO 14U | |||
#define GPIOB_SPI2_MOSI 15U | |||
#define GPIOC_MEMS_CS 0U | |||
#define GPIOC_PIN1 1U | |||
#define GPIOC_PIN2 2U | |||
#define GPIOC_PIN3 3U | |||
#define GPIOC_PIN4 4U | |||
#define GPIOC_PIN5 5U | |||
#define GPIOC_LED_RED 6U | |||
#define GPIOC_LED_BLUE 7U | |||
#define GPIOC_LED_ORANGE 8U | |||
#define GPIOC_LED_GREEN 9U | |||
#define GPIOC_PIN10 10U | |||
#define GPIOC_PIN11 11U | |||
#define GPIOC_PIN12 12U | |||
#define GPIOC_PIN13 13U | |||
#define GPIOC_OSC32_IN 14U | |||
#define GPIOC_OSC32_OUT 15U | |||
#define GPIOD_PIN0 0U | |||
#define GPIOD_PIN1 1U | |||
#define GPIOD_PIN2 2U | |||
#define GPIOD_PIN3 3U | |||
#define GPIOD_PIN4 4U | |||
#define GPIOD_PIN5 5U | |||
#define GPIOD_PIN6 6U | |||
#define GPIOD_PIN7 7U | |||
#define GPIOD_PIN8 8U | |||
#define GPIOD_PIN9 9U | |||
#define GPIOD_PIN10 10U | |||
#define GPIOD_PIN11 11U | |||
#define GPIOD_PIN12 12U | |||
#define GPIOD_PIN13 13U | |||
#define GPIOD_PIN14 14U | |||
#define GPIOD_PIN15 15U | |||
#define GPIOE_PIN0 0U | |||
#define GPIOE_PIN1 1U | |||
#define GPIOE_PIN2 2U | |||
#define GPIOE_PIN3 3U | |||
#define GPIOE_PIN4 4U | |||
#define GPIOE_PIN5 5U | |||
#define GPIOE_PIN6 6U | |||
#define GPIOE_PIN7 7U | |||
#define GPIOE_PIN8 8U | |||
#define GPIOE_PIN9 9U | |||
#define GPIOE_PIN10 10U | |||
#define GPIOE_PIN11 11U | |||
#define GPIOE_PIN12 12U | |||
#define GPIOE_PIN13 13U | |||
#define GPIOE_PIN14 14U | |||
#define GPIOE_PIN15 15U | |||
#define GPIOF_OSC_IN 0U | |||
#define GPIOF_OSC_OUT 1U | |||
#define GPIOF_PIN2 2U | |||
#define GPIOF_PIN3 3U | |||
#define GPIOF_PIN4 4U | |||
#define GPIOF_PIN5 5U | |||
#define GPIOF_PIN6 6U | |||
#define GPIOF_PIN7 7U | |||
#define GPIOF_PIN8 8U | |||
#define GPIOF_PIN9 9U | |||
#define GPIOF_PIN10 10U | |||
#define GPIOF_PIN11 11U | |||
#define GPIOF_PIN12 12U | |||
#define GPIOF_PIN13 13U | |||
#define GPIOF_PIN14 14U | |||
#define GPIOF_PIN15 15U | |||
/* | |||
* IO lines assignments. | |||
*/ | |||
#define LINE_BUTTON PAL_LINE(GPIOA, 0U) | |||
#define LINE_USB_DM PAL_LINE(GPIOA, 11U) | |||
#define LINE_USB_DP PAL_LINE(GPIOA, 12U) | |||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U) | |||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U) | |||
#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) | |||
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) | |||
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) | |||
#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) | |||
#define LINE_LED_RED PAL_LINE(GPIOC, 6U) | |||
#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) | |||
#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U) | |||
#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) | |||
#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | |||
#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | |||
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) | |||
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) | |||
/* | |||
* I/O ports initial setup, this configuration is established soon after reset | |||
* in the initialization code. | |||
* Please refer to the STM32 Reference Manual for details. | |||
*/ | |||
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | |||
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | |||
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | |||
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | |||
#define PIN_ODR_LOW(n) (0U << (n)) | |||
#define PIN_ODR_HIGH(n) (1U << (n)) | |||
#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | |||
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | |||
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | |||
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | |||
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | |||
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | |||
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | |||
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | |||
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | |||
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | |||
/* | |||
* GPIOA setup: | |||
* | |||
* PA0 - BUTTON (input floating). | |||
* PA1 - PIN1 (input pullup). | |||
* PA2 - PIN2 (input pullup). | |||
* PA3 - PIN3 (input pullup). | |||
* PA4 - PIN4 (input pullup). | |||
* PA5 - PIN5 (input pullup). | |||
* PA6 - PIN6 (input pullup). | |||
* PA7 - PIN7 (input pullup). | |||
* PA8 - PIN8 (input pullup). | |||
* PA9 - PIN9 (input pullup). | |||
* PA10 - PIN10 (input pullup). | |||
* PA11 - USB_DM (input floating). | |||
* PA12 - USB_DP (input floating). | |||
* PA13 - SWDIO (alternate 0). | |||
* PA14 - SWCLK (alternate 0). | |||
* PA15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOA_USB_DM) | \ | |||
PIN_MODE_INPUT(GPIOA_USB_DP) | \ | |||
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ | |||
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ | |||
PIN_MODE_INPUT(GPIOA_PIN15)) | |||
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | |||
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | \ | |||
PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \ | |||
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ | |||
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ | |||
PIN_OSPEED_HIGH(GPIOA_PIN15)) | |||
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ | |||
PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ | |||
PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ | |||
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ | |||
PIN_PUPDR_PULLUP(GPIOA_PIN15)) | |||
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOA_USB_DM) | \ | |||
PIN_ODR_HIGH(GPIOA_USB_DP) | \ | |||
PIN_ODR_HIGH(GPIOA_SWDIO) | \ | |||
PIN_ODR_HIGH(GPIOA_SWCLK) | \ | |||
PIN_ODR_HIGH(GPIOA_PIN15)) | |||
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN7, 0U)) | |||
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_USB_DM, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_USB_DP, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ | |||
PIN_AFIO_AF(GPIOA_PIN15, 0U)) | |||
/* | |||
* GPIOB setup: | |||
* | |||
* PB0 - PIN0 (input pullup). | |||
* PB1 - PIN1 (input pullup). | |||
* PB2 - PIN2 (input pullup). | |||
* PB3 - PIN3 (input pullup). | |||
* PB4 - PIN4 (input pullup). | |||
* PB5 - PIN5 (input pullup). | |||
* PB6 - PIN6 (input pullup). | |||
* PB7 - PIN7 (input pullup). | |||
* PB8 - PIN8 (input pullup). | |||
* PB9 - PIN9 (input pullup). | |||
* PB10 - PIN10 (input pullup). | |||
* PB11 - PIN11 (input pullup). | |||
* PB12 - PIN12 (input pullup). | |||
* PB13 - SPI2_SCK (alternate 0). | |||
* PB14 - SPI2_MISO (alternate 0). | |||
* PB15 - SPI2_MOSI (alternate 0). | |||
*/ | |||
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOB_PIN12) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | \ | |||
PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN3) | \ | |||
PIN_OSPEED_HIGH(GPIOB_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | \ | |||
PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | \ | |||
PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOB_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_MISO) | \ | |||
PIN_ODR_HIGH(GPIOB_SPI2_MOSI)) | |||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN7, 0U)) | |||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | \ | |||
PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U)) | |||
/* | |||
* GPIOC setup: | |||
* | |||
* PC0 - MEMS_CS (output pushpull maximum). | |||
* PC1 - PIN1 (input pullup). | |||
* PC2 - PIN2 (input pullup). | |||
* PC3 - PIN3 (input pullup). | |||
* PC4 - PIN4 (input pullup). | |||
* PC5 - PIN5 (input pullup). | |||
* PC6 - LED_RED (output pushpull maximum). | |||
* PC7 - LED_BLUE (output pushpull maximum). | |||
* PC8 - LED_ORANGE (output pushpull maximum). | |||
* PC9 - LED_GREEN (output pushpull maximum). | |||
* PC10 - PIN10 (input pullup). | |||
* PC11 - PIN11 (input pullup). | |||
* PC12 - PIN12 (input pullup). | |||
* PC13 - PIN13 (input pullup). | |||
* PC14 - OSC32_IN (input floating). | |||
* PC15 - OSC32_OUT (input floating). | |||
*/ | |||
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN5) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_RED) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | \ | |||
PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOC_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ | |||
PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_RED) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | \ | |||
PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \ | |||
PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ | |||
PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_RED) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ | |||
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN5) | \ | |||
PIN_ODR_LOW(GPIOC_LED_RED) | \ | |||
PIN_ODR_LOW(GPIOC_LED_BLUE) | \ | |||
PIN_ODR_LOW(GPIOC_LED_ORANGE) | \ | |||
PIN_ODR_LOW(GPIOC_LED_GREEN) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOC_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ | |||
PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | |||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_RED, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_BLUE, 0U)) | |||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ | |||
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | |||
/* | |||
* GPIOD setup: | |||
* | |||
* PD0 - PIN0 (input pullup). | |||
* PD1 - PIN1 (input pullup). | |||
* PD2 - PIN2 (input pullup). | |||
* PD3 - PIN3 (input pullup). | |||
* PD4 - PIN4 (input pullup). | |||
* PD5 - PIN5 (input pullup). | |||
* PD6 - PIN6 (input pullup). | |||
* PD7 - PIN7 (input pullup). | |||
* PD8 - PIN8 (input pullup). | |||
* PD9 - PIN9 (input pullup). | |||
* PD10 - PIN10 (input pullup). | |||
* PD11 - PIN11 (input pullup). | |||
* PD12 - PIN12 (input pullup). | |||
* PD13 - PIN13 (input pullup). | |||
* PD14 - PIN14 (input pullup). | |||
* PD15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOD_PIN15)) | |||
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | |||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOD_PIN15)) | |||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOD_PIN15)) | |||
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOD_PIN15)) | |||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN7, 0U)) | |||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOD_PIN15, 0U)) | |||
/* | |||
* GPIOE setup: | |||
* | |||
* PE0 - PIN0 (input pullup). | |||
* PE1 - PIN1 (input pullup). | |||
* PE2 - PIN2 (input pullup). | |||
* PE3 - PIN3 (input pullup). | |||
* PE4 - PIN4 (input pullup). | |||
* PE5 - PIN5 (input pullup). | |||
* PE6 - PIN6 (input pullup). | |||
* PE7 - PIN7 (input pullup). | |||
* PE8 - PIN8 (input pullup). | |||
* PE9 - PIN9 (input pullup). | |||
* PE10 - PIN10 (input pullup). | |||
* PE11 - PIN11 (input pullup). | |||
* PE12 - PIN12 (input pullup). | |||
* PE13 - PIN13 (input pullup). | |||
* PE14 - PIN14 (input pullup). | |||
* PE15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN1) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOE_PIN15)) | |||
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | |||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOE_PIN15)) | |||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOE_PIN15)) | |||
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN1) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOE_PIN15)) | |||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN7, 0U)) | |||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOE_PIN15, 0U)) | |||
/* | |||
* GPIOF setup: | |||
* | |||
* PF0 - OSC_IN (input floating). | |||
* PF1 - OSC_OUT (input floating). | |||
* PF2 - PIN2 (input pullup). | |||
* PF3 - PIN3 (input pullup). | |||
* PF4 - PIN4 (input pullup). | |||
* PF5 - PIN5 (input pullup). | |||
* PF6 - PIN6 (input pullup). | |||
* PF7 - PIN7 (input pullup). | |||
* PF8 - PIN8 (input pullup). | |||
* PF9 - PIN9 (input pullup). | |||
* PF10 - PIN10 (input pullup). | |||
* PF11 - PIN11 (input pullup). | |||
* PF12 - PIN12 (input pullup). | |||
* PF13 - PIN13 (input pullup). | |||
* PF14 - PIN14 (input pullup). | |||
* PF15 - PIN15 (input pullup). | |||
*/ | |||
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \ | |||
PIN_MODE_INPUT(GPIOF_OSC_OUT) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN2) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN3) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN4) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN5) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN6) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN7) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN8) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN9) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN10) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN11) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN12) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN13) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN14) | \ | |||
PIN_MODE_INPUT(GPIOF_PIN15)) | |||
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | |||
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | |||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ | |||
PIN_OSPEED_VERYLOW(GPIOF_PIN15)) | |||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \ | |||
PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | |||
PIN_PUPDR_PULLUP(GPIOF_PIN15)) | |||
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \ | |||
PIN_ODR_HIGH(GPIOF_OSC_OUT) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN2) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN3) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN4) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN5) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN6) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN7) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN8) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN9) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN10) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN11) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN12) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN13) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN14) | \ | |||
PIN_ODR_HIGH(GPIOF_PIN15)) | |||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN7, 0U)) | |||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | |||
PIN_AFIO_AF(GPIOF_PIN15, 0U)) | |||
#if !defined(_FROM_ASM_) | |||
#ifdef __cplusplus | |||
extern "C" { | |||
#endif | |||
void boardInit(void); | |||
#ifdef __cplusplus | |||
} | |||
#endif | |||
#endif /* _FROM_ASM_ */ | |||
#endif /* BOARD_H */ |
@ -0,0 +1,5 @@ | |||
# List of all the board related files. | |||
BOARDSRC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY/board.c | |||
# Required include directories | |||
BOARDINC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY |
@ -0,0 +1,703 @@ | |||
<?xml version="1.0" encoding="UTF-8"?> | |||
<!-- STM32F0xx board Template --> | |||
<board | |||
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | |||
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd"> | |||
<configuration_settings> | |||
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path> | |||
<output_path>..</output_path> | |||
<hal_version>3.0.x</hal_version> | |||
</configuration_settings> | |||
<board_name>ST STM32F072B-Discovery</board_name> | |||
<board_id>ST_STM32F072B_DISCOVERY</board_id> | |||
<board_functions></board_functions> | |||
<subtype>STM32F072xB</subtype> | |||
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0" | |||
LSEBypass="false" LSEDrive="3 High Drive (default)" /> | |||
<ports> | |||
<GPIOA> | |||
<pin0 | |||
ID="BUTTON" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="USB_DM" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="USB_DP" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="SWDIO" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="SWCLK" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullDown" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOA> | |||
<GPIOB> | |||
<pin0 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="SPI2_SCK" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="SPI2_MISO" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="SPI2_MOSI" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Alternate" | |||
Alternate="0" /> | |||
</GPIOB> | |||
<GPIOC> | |||
<pin0 | |||
ID="MEMS_CS" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="LED_RED" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="LED_BLUE" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="LED_ORANGE" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" ></pin8> | |||
<pin9 | |||
ID="LED_GREEN" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="Low" | |||
Mode="Output" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="OSC32_IN" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="OSC32_OUT" | |||
Type="PushPull" | |||
Speed="Maximum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOC> | |||
<GPIOD> | |||
<pin0 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOD> | |||
<GPIOE> | |||
<pin0 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin1 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin2 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin3 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin4 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin5 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin6 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin7 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin8 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin9 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin10 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin11 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin12 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin13 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin14 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
<pin15 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | |||
Level="High" Mode="Input" Alternate="0" /> | |||
</GPIOE> | |||
<GPIOF> | |||
<pin0 | |||
ID="OSC_IN" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin1 | |||
ID="OSC_OUT" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="Floating" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin2 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin3 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin4 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin5 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin6 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin7 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin8 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin9 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin10 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin11 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin12 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin13 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin14 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
<pin15 | |||
ID="" | |||
Type="PushPull" | |||
Speed="Minimum" | |||
Resistor="PullUp" | |||
Level="High" | |||
Mode="Input" | |||
Alternate="0" /> | |||
</GPIOF> | |||
</ports> | |||
</board> |
@ -0,0 +1,7 @@ | |||
/* Address for jumping to bootloader on STM32 chips. */ | |||
/* It is chip dependent, the correct number can be looked up here (page 175): | |||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | |||
* This also requires a patch to chibios: | |||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | |||
*/ | |||
#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800 |
@ -0,0 +1,524 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/** | |||
* @file templates/chconf.h | |||
* @brief Configuration file template. | |||
* @details A copy of this file must be placed in each project directory, it | |||
* contains the application specific kernel settings. | |||
* | |||
* @addtogroup config | |||
* @details Kernel related settings and hooks. | |||
* @{ | |||
*/ | |||
#ifndef CHCONF_H | |||
#define CHCONF_H | |||
#define _CHIBIOS_RT_CONF_ | |||
/*===========================================================================*/ | |||
/** | |||
* @name System timers settings | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief System time counter resolution. | |||
* @note Allowed values are 16 or 32 bits. | |||
*/ | |||
#define CH_CFG_ST_RESOLUTION 32 | |||
/** | |||
* @brief System tick frequency. | |||
* @details Frequency of the system timer that drives the system ticks. This | |||
* setting also defines the system tick time unit. | |||
*/ | |||
#define CH_CFG_ST_FREQUENCY 10000 | |||
/** | |||
* @brief Time delta constant for the tick-less mode. | |||
* @note If this value is zero then the system uses the classic | |||
* periodic tick. This value represents the minimum number | |||
* of ticks that is safe to specify in a timeout directive. | |||
* The value one is not valid, timeouts are rounded up to | |||
* this value. | |||
*/ | |||
#define CH_CFG_ST_TIMEDELTA 2 | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Kernel parameters and options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Round robin interval. | |||
* @details This constant is the number of system ticks allowed for the | |||
* threads before preemption occurs. Setting this value to zero | |||
* disables the preemption for threads with equal priority and the | |||
* round robin becomes cooperative. Note that higher priority | |||
* threads can still preempt, the kernel is always preemptive. | |||
* @note Disabling the round robin preemption makes the kernel more compact | |||
* and generally faster. | |||
* @note The round robin preemption is not supported in tickless mode and | |||
* must be set to zero in that case. | |||
*/ | |||
#define CH_CFG_TIME_QUANTUM 0 | |||
/** | |||
* @brief Managed RAM size. | |||
* @details Size of the RAM area to be managed by the OS. If set to zero | |||
* then the whole available RAM is used. The core memory is made | |||
* available to the heap allocator and/or can be used directly through | |||
* the simplified core memory allocator. | |||
* | |||
* @note In order to let the OS manage the whole RAM the linker script must | |||
* provide the @p __heap_base__ and @p __heap_end__ symbols. | |||
* @note Requires @p CH_CFG_USE_MEMCORE. | |||
*/ | |||
#define CH_CFG_MEMCORE_SIZE 0 | |||
/** | |||
* @brief Idle thread automatic spawn suppression. | |||
* @details When this option is activated the function @p chSysInit() | |||
* does not spawn the idle thread. The application @p main() | |||
* function becomes the idle thread and must implement an | |||
* infinite loop. | |||
*/ | |||
#define CH_CFG_NO_IDLE_THREAD FALSE | |||
/* Use __WFI in the idle thread for waiting. Does lower the power | |||
* consumption. */ | |||
#define CORTEX_ENABLE_WFI_IDLE TRUE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Performance options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief OS optimization. | |||
* @details If enabled then time efficient rather than space efficient code | |||
* is used when two possible implementations exist. | |||
* | |||
* @note This is not related to the compiler optimization options. | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_OPTIMIZE_SPEED FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Subsystem options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Time Measurement APIs. | |||
* @details If enabled then the time measurement APIs are included in | |||
* the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_TM FALSE | |||
/** | |||
* @brief Threads registry APIs. | |||
* @details If enabled then the registry APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_REGISTRY TRUE | |||
/** | |||
* @brief Threads synchronization APIs. | |||
* @details If enabled then the @p chThdWait() function is included in | |||
* the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_WAITEXIT TRUE | |||
/** | |||
* @brief Semaphores APIs. | |||
* @details If enabled then the Semaphores APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES TRUE | |||
/** | |||
* @brief Semaphores queuing mode. | |||
* @details If enabled then the threads are enqueued on semaphores by | |||
* priority rather than in FIFO order. | |||
* | |||
* @note The default is @p FALSE. Enable this if you have special | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | |||
/** | |||
* @brief Mutexes APIs. | |||
* @details If enabled then the mutexes APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MUTEXES TRUE | |||
/** | |||
* @brief Enables recursive behavior on mutexes. | |||
* @note Recursive mutexes are heavier and have an increased | |||
* memory footprint. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note Requires @p CH_CFG_USE_MUTEXES. | |||
*/ | |||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | |||
/** | |||
* @brief Conditional Variables APIs. | |||
* @details If enabled then the conditional variables APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_MUTEXES. | |||
*/ | |||
#define CH_CFG_USE_CONDVARS TRUE | |||
/** | |||
* @brief Conditional Variables APIs with timeout. | |||
* @details If enabled then the conditional variables APIs with timeout | |||
* specification are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_CONDVARS. | |||
*/ | |||
#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE | |||
/** | |||
* @brief Events Flags APIs. | |||
* @details If enabled then the event flags APIs are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_EVENTS TRUE | |||
/** | |||
* @brief Events Flags APIs with timeout. | |||
* @details If enabled then the events APIs with timeout specification | |||
* are included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_EVENTS. | |||
*/ | |||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE | |||
/** | |||
* @brief Synchronous Messages APIs. | |||
* @details If enabled then the synchronous messages APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MESSAGES TRUE | |||
/** | |||
* @brief Synchronous Messages queuing mode. | |||
* @details If enabled then messages are served by priority rather than in | |||
* FIFO order. | |||
* | |||
* @note The default is @p FALSE. Enable this if you have special | |||
* requirements. | |||
* @note Requires @p CH_CFG_USE_MESSAGES. | |||
*/ | |||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE | |||
/** | |||
* @brief Mailboxes APIs. | |||
* @details If enabled then the asynchronous messages (mailboxes) APIs are | |||
* included in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_SEMAPHORES. | |||
*/ | |||
#define CH_CFG_USE_MAILBOXES TRUE | |||
/** | |||
* @brief Core Memory Manager APIs. | |||
* @details If enabled then the core memory manager APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MEMCORE FALSE | |||
/** | |||
* @brief Heap Allocator APIs. | |||
* @details If enabled then the memory heap allocator APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or | |||
* @p CH_CFG_USE_SEMAPHORES. | |||
* @note Mutexes are recommended. | |||
*/ | |||
#define CH_CFG_USE_HEAP FALSE | |||
/** | |||
* @brief Memory Pools Allocator APIs. | |||
* @details If enabled then the memory pools allocator APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
*/ | |||
#define CH_CFG_USE_MEMPOOLS FALSE | |||
/** | |||
* @brief Dynamic Threads APIs. | |||
* @details If enabled then the dynamic threads creation APIs are included | |||
* in the kernel. | |||
* | |||
* @note The default is @p TRUE. | |||
* @note Requires @p CH_CFG_USE_WAITEXIT. | |||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | |||
*/ | |||
#define CH_CFG_USE_DYNAMIC FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Debug options | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Debug option, kernel statistics. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_STATISTICS FALSE | |||
/** | |||
* @brief Debug option, system state check. | |||
* @details If enabled the correct call protocol for system APIs is checked | |||
* at runtime. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE | |||
/** | |||
* @brief Debug option, parameters checks. | |||
* @details If enabled then the checks on the API functions input | |||
* parameters are activated. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_ENABLE_CHECKS FALSE | |||
/** | |||
* @brief Debug option, consistency checks. | |||
* @details If enabled then all the assertions in the kernel code are | |||
* activated. This includes consistency checks inside the kernel, | |||
* runtime anomalies and port-defined checks. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_ENABLE_ASSERTS FALSE | |||
/** | |||
* @brief Debug option, trace buffer. | |||
* @details If enabled then the trace buffer is activated. | |||
* | |||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | |||
/** | |||
* @brief Trace buffer entries. | |||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | |||
* different from @p CH_DBG_TRACE_MASK_DISABLED. | |||
*/ | |||
#define CH_DBG_TRACE_BUFFER_SIZE 128 | |||
/** | |||
* @brief Debug option, stack checks. | |||
* @details If enabled then a runtime stack check is performed. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note The stack check is performed in a architecture/port dependent way. | |||
* It may not be implemented or some ports. | |||
* @note The default failure mode is to halt the system with the global | |||
* @p panic_msg variable set to @p NULL. | |||
*/ | |||
#define CH_DBG_ENABLE_STACK_CHECK FALSE | |||
/** | |||
* @brief Debug option, stacks initialization. | |||
* @details If enabled then the threads working area is filled with a byte | |||
* value when a thread is created. This can be useful for the | |||
* runtime measurement of the used stack. | |||
* | |||
* @note The default is @p FALSE. | |||
*/ | |||
#define CH_DBG_FILL_THREADS FALSE | |||
/** | |||
* @brief Debug option, threads profiling. | |||
* @details If enabled then a field is added to the @p thread_t structure that | |||
* counts the system ticks occurred while executing the thread. | |||
* | |||
* @note The default is @p FALSE. | |||
* @note This debug option is not currently compatible with the | |||
* tickless mode. | |||
*/ | |||
#define CH_DBG_THREADS_PROFILING FALSE | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/** | |||
* @name Kernel hooks | |||
* @{ | |||
*/ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Threads descriptor structure extension. | |||
* @details User fields added to the end of the @p thread_t structure. | |||
*/ | |||
#define CH_CFG_THREAD_EXTRA_FIELDS \ | |||
/* Add threads custom fields here.*/ | |||
/** | |||
* @brief Threads initialization hook. | |||
* @details User initialization code added to the @p chThdInit() API. | |||
* | |||
* @note It is invoked from within @p chThdInit() and implicitly from all | |||
* the threads creation APIs. | |||
*/ | |||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \ | |||
/* Add threads initialization code here.*/ \ | |||
} | |||
/** | |||
* @brief Threads finalization hook. | |||
* @details User finalization code added to the @p chThdExit() API. | |||
*/ | |||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | |||
/* Add threads finalization code here.*/ \ | |||
} | |||
/** | |||
* @brief Context switch hook. | |||
* @details This hook is invoked just before switching between threads. | |||
*/ | |||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ | |||
/* Context switch code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR enter hook. | |||
*/ | |||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | |||
/* IRQ prologue code here.*/ \ | |||
} | |||
/** | |||
* @brief ISR exit hook. | |||
*/ | |||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | |||
/* IRQ epilogue code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread enter hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
* should be invoked from here. | |||
* @note This macro can be used to activate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_ENTER_HOOK() { \ | |||
/* Idle-enter code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle thread leave hook. | |||
* @note This hook is invoked within a critical zone, no OS functions | |||
* should be invoked from here. | |||
* @note This macro can be used to deactivate a power saving mode. | |||
*/ | |||
#define CH_CFG_IDLE_LEAVE_HOOK() { \ | |||
/* Idle-leave code here.*/ \ | |||
} | |||
/** | |||
* @brief Idle Loop hook. | |||
* @details This hook is continuously invoked by the idle thread loop. | |||
*/ | |||
#define CH_CFG_IDLE_LOOP_HOOK() { \ | |||
/* Idle loop code here.*/ \ | |||
} | |||
/** | |||
* @brief System tick event hook. | |||
* @details This hook is invoked in the system tick handler immediately | |||
* after processing the virtual timers queue. | |||
*/ | |||
#define CH_CFG_SYSTEM_TICK_HOOK() { \ | |||
/* System tick event code here.*/ \ | |||
} | |||
/** | |||
* @brief System halt hook. | |||
* @details This hook is invoked in case to a system halting error before | |||
* the system is halted. | |||
*/ | |||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ | |||
/* System halt code here.*/ \ | |||
} | |||
/** | |||
* @brief Trace hook. | |||
* @details This hook is invoked each time a new record is written in the | |||
* trace buffer. | |||
*/ | |||
#define CH_CFG_TRACE_HOOK(tep) { \ | |||
/* Trace code here.*/ \ | |||
} | |||
/** @} */ | |||
/*===========================================================================*/ | |||
/* Port-specific settings (override port settings defaulted in chcore.h). */ | |||
/*===========================================================================*/ | |||
#endif /* CHCONF_H */ | |||
/** @} */ |
@ -0,0 +1,97 @@ | |||
/* | |||
Copyright 2015 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#pragma once | |||
/* USB Device descriptor parameter */ | |||
#define VENDOR_ID 0xCA04 | |||
#define PRODUCT_ID 0x70F2 | |||
#define DEVICE_VER 0x0001 | |||
/* in python2: list(u"whatever".encode('utf-16-le')) */ | |||
/* at most 32 characters or the ugly hack in usb_main.c borks */ | |||
#define MANUFACTURER CannonKeys | |||
#define PRODUCT TMOv2 | |||
#define DESCRIPTION TMOv2 Keyboard | |||
/* key matrix size */ | |||
#define MATRIX_ROWS 4 | |||
#define MATRIX_COLS 15 | |||
#define MATRIX_COL_PINS { B14, A14, C13, C14, C15, F0, F1, B9, B8, B7, B6, B5, B4, B3, A15 } | |||
#define MATRIX_ROW_PINS { A10, A9, A8, B12 } | |||
#define DIODE_DIRECTION COL2ROW | |||
#define BACKLIGHT_LEVELS 6 | |||
#define BACKLIGHT_BREATHING | |||
#define BREATHING_PERIOD 6 | |||
/* define if matrix has ghost */ | |||
//#define MATRIX_HAS_GHOST | |||
/* Set 0 if debouncing isn't needed */ | |||
#define DEBOUNCE 5 | |||
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ | |||
#define LOCKING_SUPPORT_ENABLE | |||
/* Locking resynchronize hack */ | |||
#define LOCKING_RESYNC_ENABLE | |||
#define RGBLIGHT_ANIMATIONS | |||
#define WS2812_LED_N 22 | |||
#define RGBLED_NUM WS2812_LED_N | |||
#define PORT_WS2812 GPIOB | |||
#define PIN_WS2812 15 | |||
#define WS2812_SPI SPID2 | |||
// EEPROM usage | |||
// TODO: refactor with new user EEPROM code (coming soon) | |||
#define EEPROM_MAGIC 0x451F | |||
#define EEPROM_MAGIC_ADDR 40 | |||
// Bump this every time we change what we store | |||
// This will automatically reset the EEPROM with defaults | |||
// and avoid loading invalid data from the EEPROM | |||
#define EEPROM_VERSION 0x02 | |||
#define EEPROM_VERSION_ADDR 42 | |||
#define DYNAMIC_KEYMAP_LAYER_COUNT 4 | |||
// Dynamic macro starts after dynamic keymaps (43+(4*4*15*2)) = (43+480) = 523 | |||
// start + layer * rows * col * 2c | |||
#define DYNAMIC_KEYMAP_EEPROM_ADDR 43 | |||
#define EEPROM_CUSTOM_BACKLIGHT 523 | |||
#define DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR 524 | |||
#define DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE 200 | |||
#define DYNAMIC_KEYMAP_MACRO_COUNT 16 | |||
/* | |||
* Feature disable options | |||
* These options are also useful to firmware size reduction. | |||
*/ | |||
/* disable debug print */ | |||
//#define NO_DEBUG | |||
/* disable print */ | |||
//#define NO_PRINT | |||
/* disable action features */ | |||
//#define NO_ACTION_LAYER | |||
//#define NO_ACTION_TAPPING | |||
//#define NO_ACTION_ONESHOT | |||
//#define NO_ACTION_MACRO | |||
//#define NO_ACTION_FUNCTION |
@ -0,0 +1,354 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
/** | |||
* @file templates/halconf.h | |||
* @brief HAL configuration header. | |||
* @details HAL configuration file, this file allows to enable or disable the | |||
* various device drivers from your application. You may also use | |||
* this file in order to override the device drivers default settings. | |||
* | |||
* @addtogroup HAL_CONF | |||
* @{ | |||
*/ | |||
#ifndef _HALCONF_H_ | |||
#define _HALCONF_H_ | |||
#include "mcuconf.h" | |||
/** | |||
* @brief Enables the PAL subsystem. | |||
*/ | |||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | |||
#define HAL_USE_PAL TRUE | |||
#endif | |||
/** | |||
* @brief Enables the ADC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | |||
#define HAL_USE_ADC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the CAN subsystem. | |||
*/ | |||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | |||
#define HAL_USE_CAN FALSE | |||
#endif | |||
/** | |||
* @brief Enables the DAC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | |||
#define HAL_USE_DAC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the EXT subsystem. | |||
*/ | |||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) | |||
#define HAL_USE_EXT FALSE | |||
#endif | |||
/** | |||
* @brief Enables the GPT subsystem. | |||
*/ | |||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | |||
#define HAL_USE_GPT FALSE | |||
#endif | |||
/** | |||
* @brief Enables the I2C subsystem. | |||
*/ | |||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | |||
#define HAL_USE_I2C TRUE | |||
#endif | |||
/** | |||
* @brief Enables the I2S subsystem. | |||
*/ | |||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | |||
#define HAL_USE_I2S FALSE | |||
#endif | |||
/** | |||
* @brief Enables the ICU subsystem. | |||
*/ | |||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | |||
#define HAL_USE_ICU FALSE | |||
#endif | |||
/** | |||
* @brief Enables the MAC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | |||
#define HAL_USE_MAC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the MMC_SPI subsystem. | |||
*/ | |||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | |||
#define HAL_USE_MMC_SPI FALSE | |||
#endif | |||
/** | |||
* @brief Enables the PWM subsystem. | |||
*/ | |||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | |||
#define HAL_USE_PWM TRUE | |||
#endif | |||
/** | |||
* @brief Enables the RTC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | |||
#define HAL_USE_RTC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SDC subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | |||
#define HAL_USE_SDC FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SERIAL subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | |||
#define HAL_USE_SERIAL FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SERIAL over USB subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | |||
#define HAL_USE_SERIAL_USB FALSE | |||
#endif | |||
/** | |||
* @brief Enables the SPI subsystem. | |||
*/ | |||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | |||
#define HAL_USE_SPI TRUE | |||
#endif | |||
/** | |||
* @brief Enables the UART subsystem. | |||
*/ | |||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | |||
#define HAL_USE_UART FALSE | |||
#endif | |||
/** | |||
* @brief Enables the USB subsystem. | |||
*/ | |||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | |||
#define HAL_USE_USB TRUE | |||
#endif | |||
/** | |||
* @brief Enables the WDG subsystem. | |||
*/ | |||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | |||
#define HAL_USE_WDG FALSE | |||
#endif | |||
/*===========================================================================*/ | |||
/* ADC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | |||
#define ADC_USE_WAIT TRUE | |||
#endif | |||
/** | |||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define ADC_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* CAN driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Sleep mode related APIs inclusion switch. | |||
*/ | |||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | |||
#define CAN_USE_SLEEP_MODE TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* I2C driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables the mutual exclusion APIs on the I2C bus. | |||
*/ | |||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define I2C_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* MAC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables an event sources for incoming packets. | |||
*/ | |||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | |||
#define MAC_USE_ZERO_COPY FALSE | |||
#endif | |||
/** | |||
* @brief Enables an event sources for incoming packets. | |||
*/ | |||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | |||
#define MAC_USE_EVENTS TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* MMC_SPI driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Delays insertions. | |||
* @details If enabled this options inserts delays into the MMC waiting | |||
* routines releasing some extra CPU time for the threads with | |||
* lower priority, this may slow down the driver a bit however. | |||
* This option is recommended also if the SPI driver does not | |||
* use a DMA channel and heavily loads the CPU. | |||
*/ | |||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | |||
#define MMC_NICE_WAITING TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* SDC driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Number of initialization attempts before rejecting the card. | |||
* @note Attempts are performed at 10mS intervals. | |||
*/ | |||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | |||
#define SDC_INIT_RETRY 100 | |||
#endif | |||
/** | |||
* @brief Include support for MMC cards. | |||
* @note MMC support is not yet implemented so this option must be kept | |||
* at @p FALSE. | |||
*/ | |||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | |||
#define SDC_MMC_SUPPORT FALSE | |||
#endif | |||
/** | |||
* @brief Delays insertions. | |||
* @details If enabled this options inserts delays into the MMC waiting | |||
* routines releasing some extra CPU time for the threads with | |||
* lower priority, this may slow down the driver a bit however. | |||
*/ | |||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | |||
#define SDC_NICE_WAITING TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* SERIAL driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Default bit rate. | |||
* @details Configuration parameter, this is the baud rate selected for the | |||
* default configuration. | |||
*/ | |||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | |||
#define SERIAL_DEFAULT_BITRATE 38400 | |||
#endif | |||
/** | |||
* @brief Serial buffers size. | |||
* @details Configuration parameter, you can change the depth of the queue | |||
* buffers depending on the requirements of your application. | |||
* @note The default is 64 bytes for both the transmission and receive | |||
* buffers. | |||
*/ | |||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | |||
#define SERIAL_BUFFERS_SIZE 16 | |||
#endif | |||
/*===========================================================================*/ | |||
/* SERIAL_USB driver related setting. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Serial over USB buffers size. | |||
* @details Configuration parameter, the buffer size must be a multiple of | |||
* the USB data endpoint maximum packet size. | |||
* @note The default is 64 bytes for both the transmission and receive | |||
* buffers. | |||
*/ | |||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | |||
#define SERIAL_USB_BUFFERS_SIZE 1 | |||
#endif | |||
/*===========================================================================*/ | |||
/* SPI driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | |||
#define SPI_USE_WAIT TRUE | |||
#endif | |||
/** | |||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | |||
#define SPI_USE_MUTUAL_EXCLUSION TRUE | |||
#endif | |||
/*===========================================================================*/ | |||
/* USB driver related settings. */ | |||
/*===========================================================================*/ | |||
/** | |||
* @brief Enables synchronous APIs. | |||
* @note Disabling this option saves both code and data space. | |||
*/ | |||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | |||
#define USB_USE_WAIT TRUE | |||
#endif | |||
#endif /* _HALCONF_H_ */ | |||
/** @} */ |
@ -0,0 +1,12 @@ | |||
{ | |||
"keyboard_name": "TMOv2", | |||
"url": "https://cannonkeys.com", | |||
"maintainer": "awkannan", | |||
"width": 17, | |||
"height": 4, | |||
"layouts": { | |||
"LAYOUT_default": { | |||
"layout": [{"x":0, "y":0}, {"label":"Tab", "x":1.25, "y":0, "w":1.5}, {"label":"Q", "x":2.75, "y":0}, {"label":"W", "x":3.75, "y":0}, {"label":"E", "x":4.75, "y":0}, {"label":"R", "x":5.75, "y":0}, {"label":"T", "x":6.75, "y":0}, {"label":"Y", "x":7.75, "y":0}, {"label":"U", "x":8.75, "y":0}, {"label":"I", "x":9.75, "y":0}, {"label":"O", "x":10.75, "y":0}, {"label":"P", "x":11.75, "y":0}, {"label":"{", "x":12.75, "y":0}, {"label":"}", "x":13.75, "y":0}, {"label":"Backspace", "x":14.75, "y":0}, {"x":0, "y":1}, {"label":"Caps Lock", "x":1.25, "y":1, "w":1.75}, {"label":"A", "x":3, "y":1}, {"label":"S", "x":4, "y":1}, {"label":"D", "x":5, "y":1}, {"label":"F", "x":6, "y":1}, {"label":"G", "x":7, "y":1}, {"label":"H", "x":8, "y":1}, {"label":"J", "x":9, "y":1}, {"label":"K", "x":10, "y":1}, {"label":"L", "x":11, "y":1}, {"label":":", "x":12, "y":1}, {"label":"\"", "x":13, "y":1}, {"label":"Enter", "x":14, "y":1, "w":1.75}, {"x":0, "y":2}, {"label":"Shift", "x":1.25, "y":2, "w":2.25}, {"label":"Z", "x":3.5, "y":2}, {"label":"X", "x":4.5, "y":2}, {"label":"C", "x":5.5, "y":2}, {"label":"V", "x":6.5, "y":2}, {"label":"B", "x":7.5, "y":2}, {"label":"N", "x":8.5, "y":2}, {"label":"M", "x":9.5, "y":2}, {"label":"<", "x":10.5, "y":2}, {"label":">", "x":11.5, "y":2}, {"label":"?", "x":12.5, "y":2}, {"label":"Shift", "x":13.5, "y":2, "w":1.25}, {"x":14.75, "y":2}, {"x":0, "y":3}, {"label":"Win", "x":3.25, "y":3}, {"label":"Alt", "x":4.25, "y":3, "w":1.5}, {"x":5.75, "y":3, "w":2.25}, {"x":8, "y":3, "w":2.75}, {"label":"Alt", "x":10.75, "y":3, "w":1.5}, {"label":"Menu", "x":12.25, "y":3}] | |||
} | |||
} | |||
} |
@ -0,0 +1,60 @@ | |||
/* | |||
Copyright 2012,2013 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#include QMK_KEYBOARD_H | |||
// Each layer gets a name for readability, which is then used in the keymap matrix below. | |||
// The underscores don't mean anything - you can have a layer called STUFF or any other name. | |||
// Layer names don't all need to be of the same length, obviously, and you can also skip them | |||
// entirely and just use numbers. | |||
enum layer_names { | |||
_BASE, | |||
_FN1, | |||
_FN2, | |||
_FN3, | |||
}; | |||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { | |||
[_BASE] = LAYOUT_default( | |||
BL_INC, KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSPC, | |||
BL_DEC, KC_LCTL, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT, | |||
RGB_MOD, KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, MO(_FN2), | |||
RGB_TOG, KC_LALT, KC_LGUI, LT(_FN1, KC_SPC), KC_SPC, KC_RALT, MO(_FN3) | |||
), | |||
[_FN1] = LAYOUT_default( | |||
KC_TRNS, KC_ESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_DEL, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS | |||
), | |||
[_FN2] = LAYOUT_default( | |||
RGB_TOG, KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_TRNS, | |||
RGB_MOD, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
RGB_RMOD, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS | |||
), | |||
[_FN3] = LAYOUT_default( | |||
RESET, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS | |||
) | |||
}; |
@ -0,0 +1,60 @@ | |||
/* | |||
Copyright 2012,2013 Jun Wako <wakojun@gmail.com> | |||
This program is free software: you can redistribute it and/or modify | |||
it under the terms of the GNU General Public License as published by | |||
the Free Software Foundation, either version 2 of the License, or | |||
(at your option) any later version. | |||
This program is distributed in the hope that it will be useful, | |||
but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
GNU General Public License for more details. | |||
You should have received a copy of the GNU General Public License | |||
along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
*/ | |||
#include QMK_KEYBOARD_H | |||
// Each layer gets a name for readability, which is then used in the keymap matrix below. | |||
// The underscores don't mean anything - you can have a layer called STUFF or any other name. | |||
// Layer names don't all need to be of the same length, obviously, and you can also skip them | |||
// entirely and just use numbers. | |||
enum layer_names { | |||
_BASE, | |||
_FN1, | |||
_FN2, | |||
_FN3, | |||
}; | |||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { | |||
[_BASE] = LAYOUT_default( | |||
BL_INC, KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSPC, | |||
BL_DEC, KC_LCTL, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT, | |||
RGB_MOD, KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, MO(_FN2), | |||
RGB_TOG, KC_LALT, KC_LGUI, LT(_FN1, KC_SPC), KC_SPC, KC_RALT, MO(_FN3) | |||
), | |||
[_FN1] = LAYOUT_default( | |||
KC_TRNS, KC_ESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_DEL, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS | |||
), | |||
[_FN2] = LAYOUT_default( | |||
RGB_TOG, KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_TRNS, | |||
RGB_MOD, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
RGB_RMOD, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS | |||
), | |||
[_FN3] = LAYOUT_default( | |||
RESET, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, | |||
KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS | |||
) | |||
}; |
@ -0,0 +1,5 @@ | |||
# rules.mk overrides to enable VIA | |||
RAW_ENABLE = yes | |||
DYNAMIC_KEYMAP_ENABLE = yes | |||
@ -0,0 +1,176 @@ | |||
/* | |||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |||
Licensed under the Apache License, Version 2.0 (the "License"); | |||
you may not use this file except in compliance with the License. | |||
You may obtain a copy of the License at | |||
http://www.apache.org/licenses/LICENSE-2.0 | |||
Unless required by applicable law or agreed to in writing, software | |||
distributed under the License is distributed on an "AS IS" BASIS, | |||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |||
See the License for the specific language governing permissions and | |||
limitations under the License. | |||
*/ | |||
#ifndef _MCUCONF_H_ | |||
#define _MCUCONF_H_ | |||
/* | |||
* STM32F0xx drivers configuration. | |||
* The following settings override the default settings present in | |||
* the various device driver implementation headers. | |||
* Note that the settings for each driver only have effect if the whole | |||
* driver is enabled in halconf.h. | |||
* | |||
* IRQ priorities: | |||
* 3...0 Lowest...Highest. | |||
* | |||
* DMA priorities: | |||
* 0...3 Lowest...Highest. | |||
*/ | |||
#define STM32F0xx_MCUCONF | |||
// #define STM32F070xB | |||
/* | |||
* HAL driver system settings. | |||
*/ | |||
#define STM32_NO_INIT FALSE | |||
#define STM32_PVD_ENABLE FALSE | |||
#define STM32_PLS STM32_PLS_LEV0 | |||
#define STM32_HSI_ENABLED TRUE | |||
#define STM32_HSI14_ENABLED TRUE | |||
#define STM32_HSI48_ENABLED FALSE | |||
#define STM32_LSI_ENABLED TRUE | |||
#define STM32_HSE_ENABLED FALSE | |||
#define STM32_LSE_ENABLED FALSE | |||
#define STM32_SW STM32_SW_PLL | |||
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 | |||
#define STM32_PREDIV_VALUE 1 | |||
#define STM32_PLLMUL_VALUE 12 | |||
#define STM32_HPRE STM32_HPRE_DIV1 | |||
#define STM32_PPRE STM32_PPRE_DIV1 | |||
#define STM32_ADCSW STM32_ADCSW_HSI14 | |||
#define STM32_ADCPRE STM32_ADCPRE_DIV4 | |||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | |||
#define STM32_ADCPRE STM32_ADCPRE_DIV4 | |||
#define STM32_ADCSW STM32_ADCSW_HSI14 | |||
#define STM32_USBSW STM32_USBSW_HSI48 | |||
#define STM32_CECSW STM32_CECSW_HSI | |||
#define STM32_I2C1SW STM32_I2C1SW_HSI | |||
#define STM32_USART1SW STM32_USART1SW_PCLK | |||
#define STM32_RTCSEL STM32_RTCSEL_LSI | |||
/* | |||
* ADC driver system settings. | |||
*/ | |||
#define STM32_ADC_USE_ADC1 FALSE | |||
#define STM32_ADC_ADC1_DMA_PRIORITY 2 | |||
#define STM32_ADC_IRQ_PRIORITY 2 | |||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 | |||
/* | |||
* EXT driver system settings. | |||
*/ | |||
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 | |||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 | |||
/* | |||
* GPT driver system settings. | |||
*/ | |||
#define STM32_GPT_USE_TIM1 FALSE | |||
#define STM32_GPT_USE_TIM2 FALSE | |||
#define STM32_GPT_USE_TIM3 FALSE | |||
#define STM32_GPT_USE_TIM14 FALSE | |||
#define STM32_GPT_TIM1_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM2_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM3_IRQ_PRIORITY 2 | |||
#define STM32_GPT_TIM14_IRQ_PRIORITY 2 | |||
/* | |||
* I2C driver system settings. | |||
*/ | |||
#define STM32_I2C_USE_I2C1 TRUE | |||
#define STM32_I2C_USE_I2C2 FALSE | |||
#define STM32_I2C_BUSY_TIMEOUT 50 | |||
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 | |||
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 | |||
#define STM32_I2C_USE_DMA TRUE | |||
#define STM32_I2C_I2C1_DMA_PRIORITY 1 | |||
#define STM32_I2C_I2C2_DMA_PRIORITY 1 | |||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | |||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | |||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | |||
/* | |||
* ICU driver system settings. | |||
*/ | |||
#define STM32_ICU_USE_TIM1 FALSE | |||
#define STM32_ICU_USE_TIM2 FALSE | |||
#define STM32_ICU_USE_TIM3 FALSE | |||
#define STM32_ICU_TIM1_IRQ_PRIORITY 3 | |||
#define STM32_ICU_TIM2_IRQ_PRIORITY 3 | |||
#define STM32_ICU_TIM3_IRQ_PRIORITY 3 | |||
/* | |||
* PWM driver system settings. | |||
*/ | |||
#define STM32_PWM_USE_ADVANCED FALSE | |||
#define STM32_PWM_USE_TIM1 FALSE | |||
#define STM32_PWM_USE_TIM2 FALSE | |||
#define STM32_PWM_USE_TIM3 TRUE | |||
#define STM32_PWM_TIM1_IRQ_PRIORITY 3 | |||
#define STM32_PWM_TIM2_IRQ_PRIORITY 3 | |||
#define STM32_PWM_TIM3_IRQ_PRIORITY 3 | |||
/* | |||
* SERIAL driver system settings. | |||
*/ | |||
#define STM32_SERIAL_USE_USART1 FALSE | |||
#define STM32_SERIAL_USE_USART2 FALSE | |||
#define STM32_SERIAL_USART1_PRIORITY 3 | |||
#define STM32_SERIAL_USART2_PRIORITY 3 | |||
/* | |||
* SPI driver system settings. | |||
*/ | |||
#define STM32_SPI_USE_SPI1 FALSE | |||
#define STM32_SPI_USE_SPI2 TRUE | |||
#define STM32_SPI_SPI1_DMA_PRIORITY 1 | |||
#define STM32_SPI_SPI2_DMA_PRIORITY 1 | |||
#define STM32_SPI_SPI1_IRQ_PRIORITY 2 | |||
#define STM32_SPI_SPI2_IRQ_PRIORITY 2 | |||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | |||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | |||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | |||
/* | |||
* ST driver system settings. | |||
*/ | |||
#define STM32_ST_IRQ_PRIORITY 2 | |||
#define STM32_ST_USE_TIMER 2 | |||
/* | |||
* UART driver system settings. | |||
*/ | |||
#define STM32_UART_USE_USART1 FALSE | |||
#define STM32_UART_USE_USART2 FALSE | |||
#define STM32_UART_USART1_IRQ_PRIORITY 3 | |||
#define STM32_UART_USART2_IRQ_PRIORITY 3 | |||
#define STM32_UART_USART1_DMA_PRIORITY 0 | |||
#define STM32_UART_USART2_DMA_PRIORITY 0 | |||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | |||
/* | |||
* USB driver system settings. | |||
*/ | |||
#define STM32_USB_USE_USB1 TRUE | |||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | |||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 | |||
#endif /* _MCUCONF_H_ */ |
@ -0,0 +1,12 @@ | |||
# TMO V2 Keyboard | |||
TMO V2 Keyboard | |||
Keyboard Maintainer: [Andrew Kannan](https://github.com/awkannan) | |||
Hardware Supported: STM32F072CBT6 | |||
Make example for this keyboard (after setting up your build environment): | |||
make cannonkeys/tmov2:default | |||
See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs). |
@ -0,0 +1,64 @@ | |||
# project specific files | |||
# SRC = ssd1306.c | |||
## chip/board settings | |||
# the next two should match the directories in | |||
# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) | |||
MCU_FAMILY = STM32 | |||
MCU_SERIES = STM32F0xx | |||
# linker script to use | |||
# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ | |||
# or <this_dir>/ld/ | |||
MCU_LDSCRIPT = STM32F072xB | |||
# startup code to use | |||
# is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/ | |||
MCU_STARTUP = stm32f0xx | |||
# it should exist either in <chibios>/os/hal/boards/ | |||
# or <this_dir>/boards | |||
BOARD = ST_STM32F072B_DISCOVERY | |||
# Cortex version | |||
# Teensy LC is cortex-m0; Teensy 3.x are cortex-m4 | |||
MCU = cortex-m0 | |||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 | |||
ARMV = 6 | |||
# If you want to be able to jump to bootloader from firmware on STM32 MCUs, | |||
# set the correct BOOTLOADER_ADDRESS. Either set it here, or define it in | |||
# ./bootloader_defs.h or in ./boards/<FOO>/bootloader_defs.h (if you have | |||
# a custom board definition that you plan to reuse). | |||
# If you're not setting it here, leave it commented out. | |||
# It is chip dependent, the correct number can be looked up here (page 175): | |||
# http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | |||
# This also requires a patch to chibios: | |||
# <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | |||
#STM32_BOOTLOADER_ADDRESS = 0x1FFFC800 | |||
# Build Options | |||
# comment out to disable the options. | |||
# | |||
# Options to pass to dfu-util when flashing | |||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | |||
DFU_SUFFIX_ARGS = -p DF11 -v 0483 | |||
# Build Options | |||
# comment out to disable the options. | |||
# | |||
# project specific files | |||
VPATH += keyboards/cannonkeys/stm32f072 | |||
SRC = keyboard.c \ | |||
led.c | |||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | |||
DFU_SUFFIX_ARGS = -v 0483 -p DF11 | |||
BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration | |||
MOUSEKEY_ENABLE = yes # Mouse keys | |||
EXTRAKEY_ENABLE = yes # Audio control and System control | |||
CONSOLE_ENABLE = yes # Console for debug | |||
COMMAND_ENABLE = yes # Commands for debug and configuration | |||
SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend | |||
NKRO_ENABLE = yes # USB Nkey Rollover | |||
CUSTOM_MATRIX = no # Custom matrix file | |||
# BACKLIGHT_ENABLE = yes # This is broken on 072 right now | |||
RGBLIGHT_ENABLE = yes | |||
@ -0,0 +1 @@ | |||
#include "tmov2.h" |
@ -0,0 +1,15 @@ | |||
#pragma once | |||
#include "quantum.h" | |||
#define LAYOUT_default( \ | |||
K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, \ | |||
K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, \ | |||
K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, \ | |||
K300, K302, K303, K305, K307, K309, K310 \ | |||
) { \ | |||
{ K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014 }, \ | |||
{ K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, KC_NO}, \ | |||
{ K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, KC_NO}, \ | |||
{ K300, KC_NO, K302, K303, KC_NO, K305, KC_NO, K307, KC_NO, K309, K310, KC_NO, KC_NO, KC_NO} \ | |||
} |