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@ -17,12 +17,10 @@ |
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* along with this program. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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#include "wait.h" |
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#include "is31fl3741.h" |
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#include <string.h> |
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#include "i2c_master.h" |
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#include "progmem.h" |
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#include "wait.h" |
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// This is a 7-bit address, that gets left-shifted and bit 0 |
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// set to 0 for write, 1 for read (as per I2C protocol) |
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@ -34,50 +32,50 @@ |
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// ADDR1 represents A1:A0 of the 7-bit address. |
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// ADDR2 represents A3:A2 of the 7-bit address. |
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// The result is: 0b101(ADDR2)(ADDR1) |
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#define ISSI_ADDR_DEFAULT 0x60 |
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#define ISSI_COMMANDREGISTER 0xFD |
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#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE |
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#define ISSI_INTERRUPTMASKREGISTER 0xF0 |
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#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 |
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#define ISSI_IDREGISTER 0xFC |
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#define ISSI_PAGE_PWM0 0x00 // PG0 |
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#define ISSI_PAGE_PWM1 0x01 // PG1 |
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#define ISSI_PAGE_SCALING_0 0x02 // PG2 |
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#define ISSI_PAGE_SCALING_1 0x03 // PG3 |
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#define ISSI_PAGE_FUNCTION 0x04 // PG4 |
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#define ISSI_REG_CONFIGURATION 0x00 // PG4 |
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#define ISSI_REG_GLOBALCURRENT 0x01 // PG4 |
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#define ISSI_REG_PULLDOWNUP 0x02 // PG4 |
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#define ISSI_REG_RESET 0x3F // PG4 |
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#ifndef ISSI_TIMEOUT |
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# define ISSI_TIMEOUT 100 |
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#define IS31FL3741_I2C_ADDRESS_DEFAULT 0x60 |
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#define IS31FL3741_COMMANDREGISTER 0xFD |
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#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE |
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#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0 |
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#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1 |
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#define IS31FL3741_IDREGISTER 0xFC |
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#define IS31FL3741_PAGE_PWM0 0x00 // PG0 |
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#define IS31FL3741_PAGE_PWM1 0x01 // PG1 |
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#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2 |
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#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3 |
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#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4 |
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#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4 |
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#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4 |
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#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4 |
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#define IS31FL3741_REG_RESET 0x3F // PG4 |
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#ifndef IS31FL3741_I2C_TIMEOUT |
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# define IS31FL3741_I2C_TIMEOUT 100 |
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#endif |
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#ifndef ISSI_PERSISTENCE |
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# define ISSI_PERSISTENCE 0 |
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#ifndef IS31FL3741_I2C_PERSISTENCE |
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# define IS31FL3741_I2C_PERSISTENCE 0 |
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#endif |
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#ifndef ISSI_CONFIGURATION |
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# define ISSI_CONFIGURATION 0x01 |
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#ifndef IS31FL3741_CONFIGURATION |
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# define IS31FL3741_CONFIGURATION 0x01 |
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#endif |
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#ifndef ISSI_SWPULLUP |
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# define ISSI_SWPULLUP PUR_32KR |
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#ifndef IS31FL3741_SWPULLUP |
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# define IS31FL3741_SWPULLUP IS31FL3741_PUR_32KR |
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#endif |
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#ifndef ISSI_CSPULLUP |
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# define ISSI_CSPULLUP PUR_32KR |
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#ifndef IS31FL3741_CSPULLUP |
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# define IS31FL3741_CSPULLUP IS31FL3741_PUR_32KR |
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#endif |
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#ifndef ISSI_GLOBALCURRENT |
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# define ISSI_GLOBALCURRENT 0xFF |
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#ifndef IS31FL3741_GLOBALCURRENT |
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# define IS31FL3741_GLOBALCURRENT 0xFF |
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#endif |
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#define ISSI_MAX_LEDS 351 |
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#define IS31FL3741_MAX_LEDS 351 |
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// Transfer buffer for TWITransmitData() |
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uint8_t g_twi_transfer_buffer[20] = {0xFF}; |
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@ -88,22 +86,22 @@ uint8_t g_twi_transfer_buffer[20] = {0xFF}; |
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// We could optimize this and take out the unused registers from these |
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// buffers and the transfers in is31fl3741_write_pwm_buffer() but it's |
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// probably not worth the extra complexity. |
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uint8_t g_pwm_buffer[DRIVER_COUNT][ISSI_MAX_LEDS]; |
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bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; |
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bool g_scaling_registers_update_required[DRIVER_COUNT] = {false}; |
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uint8_t g_pwm_buffer[IS31FL3741_DRIVER_COUNT][IS31FL3741_MAX_LEDS]; |
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bool g_pwm_buffer_update_required[IS31FL3741_DRIVER_COUNT] = {false}; |
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bool g_scaling_registers_update_required[IS31FL3741_DRIVER_COUNT] = {false}; |
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uint8_t g_scaling_registers[DRIVER_COUNT][ISSI_MAX_LEDS]; |
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uint8_t g_scaling_registers[IS31FL3741_DRIVER_COUNT][IS31FL3741_MAX_LEDS]; |
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void is31fl3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) { |
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g_twi_transfer_buffer[0] = reg; |
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g_twi_transfer_buffer[1] = data; |
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#if ISSI_PERSISTENCE > 0 |
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; |
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#if IS31FL3741_I2C_PERSISTENCE > 0 |
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for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT) == 0) break; |
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} |
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#else |
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i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
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i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT); |
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#endif |
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} |
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@ -113,21 +111,21 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
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for (int i = 0; i < 342; i += 18) { |
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if (i == 180) { |
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// unlock the command register and select PG1 |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM1); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1); |
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} |
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g_twi_transfer_buffer[0] = i % 180; |
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memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 18); |
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#if ISSI_PERSISTENCE > 0 |
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) { |
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#if IS31FL3741_I2C_PERSISTENCE > 0 |
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for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { |
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return false; |
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} |
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} |
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#else |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { |
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return false; |
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} |
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#endif |
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@ -137,14 +135,14 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
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g_twi_transfer_buffer[0] = 162; |
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memcpy(g_twi_transfer_buffer + 1, pwm_buffer + 342, 9); |
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#if ISSI_PERSISTENCE > 0 |
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) { |
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#if IS31FL3741_I2C_PERSISTENCE > 0 |
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for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { |
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return false; |
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} |
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} |
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#else |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) { |
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { |
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return false; |
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} |
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#endif |
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@ -160,18 +158,18 @@ void is31fl3741_init(uint8_t addr) { |
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// Unlock the command register. |
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// Unlock the command register. |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); |
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// Select PG4 |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION); |
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// Set to Normal operation |
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is31fl3741_write_register(addr, ISSI_REG_CONFIGURATION, ISSI_CONFIGURATION); |
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is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION); |
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// Set Golbal Current Control Register |
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is31fl3741_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); |
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is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT); |
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// Set Pull up & Down for SWx CSy |
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is31fl3741_write_register(addr, ISSI_REG_PULLDOWNUP, ((ISSI_CSPULLUP << 4) | ISSI_SWPULLUP)); |
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is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CSPULLUP << 4) | IS31FL3741_SWPULLUP)); |
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// is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF); |
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@ -228,8 +226,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bo |
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void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { |
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if (g_pwm_buffer_update_required[index]) { |
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// unlock the command register and select PG2 |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0); |
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is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]); |
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} |
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@ -248,8 +246,8 @@ void is31fl3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, |
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void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { |
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if (g_scaling_registers_update_required[index]) { |
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// unlock the command register and select PG2 |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_0); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0); |
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// CS1_SW1 to CS30_SW6 are on PG2 |
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for (int i = CS1_SW1; i <= CS30_SW6; ++i) { |
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@ -257,8 +255,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { |
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} |
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// unlock the command register and select PG3 |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_1); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); |
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is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1); |
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// CS1_SW7 to CS39_SW9 are on PG3 |
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for (int i = CS1_SW7; i <= CS39_SW9; ++i) { |
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