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@ -1,5 +1,5 @@ |
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/* |
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio |
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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@ -57,13 +57,31 @@ |
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#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 |
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#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK |
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#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 |
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#define STM32_I2SSRC STM32_I2SSRC_PLLI2S |
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#define STM32_I2SSRC STM32_I2SSRC_CKIN |
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#define STM32_PLLI2SN_VALUE 192 |
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#define STM32_PLLI2SR_VALUE 2 |
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#define STM32_PLLI2SR_VALUE 5 |
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#define STM32_PVD_ENABLE FALSE |
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#define STM32_PLS STM32_PLS_LEV0 |
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#define STM32_BKPRAM_ENABLE FALSE |
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/* |
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* IRQ system settings. |
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*/ |
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#define STM32_IRQ_EXTI0_PRIORITY 6 |
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#define STM32_IRQ_EXTI1_PRIORITY 6 |
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#define STM32_IRQ_EXTI2_PRIORITY 6 |
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#define STM32_IRQ_EXTI3_PRIORITY 6 |
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#define STM32_IRQ_EXTI4_PRIORITY 6 |
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#define STM32_IRQ_EXTI5_9_PRIORITY 6 |
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#define STM32_IRQ_EXTI10_15_PRIORITY 6 |
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#define STM32_IRQ_EXTI16_PRIORITY 6 |
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#define STM32_IRQ_EXTI17_PRIORITY 15 |
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#define STM32_IRQ_EXTI18_PRIORITY 6 |
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#define STM32_IRQ_EXTI19_PRIORITY 6 |
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#define STM32_IRQ_EXTI20_PRIORITY 6 |
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#define STM32_IRQ_EXTI21_PRIORITY 15 |
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#define STM32_IRQ_EXTI22_PRIORITY 15 |
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/* |
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* ADC driver system settings. |
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*/ |
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@ -74,22 +92,6 @@ |
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#define STM32_ADC_IRQ_PRIORITY 6 |
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 |
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/* |
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* EXT driver system settings. |
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*/ |
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#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 |
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#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 |
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/* |
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* GPT driver system settings. |
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*/ |
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@ -164,9 +166,9 @@ |
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* PWM driver system settings. |
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*/ |
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#define STM32_PWM_USE_ADVANCED FALSE |
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#define STM32_PWM_USE_TIM1 TRUE |
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#define STM32_PWM_USE_TIM1 FALSE |
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#define STM32_PWM_USE_TIM2 FALSE |
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#define STM32_PWM_USE_TIM3 TRUE |
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#define STM32_PWM_USE_TIM3 FALSE |
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#define STM32_PWM_USE_TIM4 FALSE |
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#define STM32_PWM_USE_TIM5 FALSE |
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#define STM32_PWM_USE_TIM9 FALSE |
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@ -182,11 +184,9 @@ |
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*/ |
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#define STM32_SERIAL_USE_USART1 FALSE |
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#define STM32_SERIAL_USE_USART2 FALSE |
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#define STM32_SERIAL_USE_USART3 FALSE |
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#define STM32_SERIAL_USE_USART6 FALSE |
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#define STM32_SERIAL_USART1_PRIORITY 12 |
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#define STM32_SERIAL_USART2_PRIORITY 12 |
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#define STM32_SERIAL_USART3_PRIORITY 12 |
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#define STM32_SERIAL_USART6_PRIORITY 12 |
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/* |
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@ -195,28 +195,18 @@ |
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#define STM32_SPI_USE_SPI1 TRUE |
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#define STM32_SPI_USE_SPI2 FALSE |
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#define STM32_SPI_USE_SPI3 FALSE |
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#define STM32_SPI_USE_SPI4 FALSE |
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#define STM32_SPI_USE_SPI5 FALSE |
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#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) |
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#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) |
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#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) |
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#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) |
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#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) |
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#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) |
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#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) |
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#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) |
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#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) |
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#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) |
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#define STM32_SPI_SPI1_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI2_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI3_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI4_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI5_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10 |
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#define STM32_SPI_SPI4_IRQ_PRIORITY 10 |
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#define STM32_SPI_SPI5_IRQ_PRIORITY 10 |
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#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") |
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/* |
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@ -230,23 +220,18 @@ |
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*/ |
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#define STM32_UART_USE_USART1 FALSE |
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#define STM32_UART_USE_USART2 FALSE |
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#define STM32_UART_USE_USART3 FALSE |
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#define STM32_UART_USE_USART6 FALSE |
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#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) |
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#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) |
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#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) |
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#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) |
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#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) |
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#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) |
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#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) |
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#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) |
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#define STM32_UART_USART1_IRQ_PRIORITY 12 |
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#define STM32_UART_USART2_IRQ_PRIORITY 12 |
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#define STM32_UART_USART3_IRQ_PRIORITY 12 |
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#define STM32_UART_USART6_IRQ_PRIORITY 12 |
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#define STM32_UART_USART1_DMA_PRIORITY 0 |
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#define STM32_UART_USART2_DMA_PRIORITY 0 |
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#define STM32_UART_USART3_DMA_PRIORITY 0 |
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#define STM32_UART_USART6_DMA_PRIORITY 0 |
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#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") |
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