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182 lines
5.6 KiB
182 lines
5.6 KiB
/* UART Example for Teensy USB Development Board
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* http://www.pjrc.com/teensy/
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* Copyright (c) 2009 PJRC.COM, LLC
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// Version 1.0: Initial Release
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// Version 1.1: Add support for Teensy 2.0, minor optimizations
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include "uart.h"
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#if defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__)
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# define UDRn UDR1
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# define UBRRnL UBRR1L
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# define UCSRnA UCSR1A
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# define UCSRnB UCSR1B
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# define UCSRnC UCSR1C
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# define U2Xn U2X1
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# define RXENn RXEN1
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# define TXENn TXEN1
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# define RXCIEn RXCIE1
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# define UCSZn1 UCSZ11
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# define UCSZn0 UCSZ10
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# define UDRIEn UDRIE1
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# define USARTn_UDRE_vect USART1_UDRE_vect
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# define USARTn_RX_vect USART1_RX_vect
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#elif defined(__AVR_ATmega32A__)
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# define UDRn UDR
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# define UBRRnL UBRRL
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# define UCSRnA UCSRA
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# define UCSRnB UCSRB
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# define UCSRnC UCSRC
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# define U2Xn U2X
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# define RXENn RXEN
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# define TXENn TXEN
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# define RXCIEn RXCIE
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# define UCSZn1 UCSZ1
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# define UCSZn0 UCSZ0
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# define UDRIEn UDRIE
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# define USARTn_UDRE_vect USART_UDRE_vect
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# define USARTn_RX_vect USART_RX_vect
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#elif defined(__AVR_ATmega328__) || defined(__AVR_ATmega328P__)
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# define UDRn UDR0
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# define UBRRnL UBRR0L
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# define UCSRnA UCSR0A
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# define UCSRnB UCSR0B
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# define UCSRnC UCSR0C
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# define U2Xn U2X0
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# define RXENn RXEN0
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# define TXENn TXEN0
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# define RXCIEn RXCIE0
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# define UCSZn1 UCSZ01
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# define UCSZn0 UCSZ00
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# define UDRIEn UDRIE0
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# define USARTn_UDRE_vect USART_UDRE_vect
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# define USARTn_RX_vect USART_RX_vect
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#endif
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// These buffers may be any size from 2 to 256 bytes.
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#define RX_BUFFER_SIZE 64
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#define TX_BUFFER_SIZE 256
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static volatile uint8_t tx_buffer[TX_BUFFER_SIZE];
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static volatile uint8_t tx_buffer_head;
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static volatile uint8_t tx_buffer_tail;
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static volatile uint8_t rx_buffer[RX_BUFFER_SIZE];
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static volatile uint8_t rx_buffer_head;
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static volatile uint8_t rx_buffer_tail;
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// Initialize the UART
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void uart_init(uint32_t baud) {
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cli();
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UBRRnL = (F_CPU / 4 / baud - 1) / 2;
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UCSRnA = (1 << U2Xn);
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UCSRnB = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn);
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UCSRnC = (1 << UCSZn1) | (1 << UCSZn0);
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tx_buffer_head = tx_buffer_tail = 0;
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rx_buffer_head = rx_buffer_tail = 0;
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sei();
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}
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// Transmit a byte
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void uart_write(uint8_t data) {
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uint8_t i;
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i = tx_buffer_head + 1;
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if (i >= TX_BUFFER_SIZE) i = 0;
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// return immediately to avoid deadlock when interrupt is disabled(called from ISR)
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if (tx_buffer_tail == i && (SREG & (1 << SREG_I)) == 0) return;
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while (tx_buffer_tail == i)
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; // wait until space in buffer
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// cli();
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tx_buffer[i] = data;
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tx_buffer_head = i;
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UCSRnB = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn) | (1 << UDRIEn);
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// sei();
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}
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// Receive a byte
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uint8_t uart_read(void) {
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uint8_t data, i;
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while (rx_buffer_head == rx_buffer_tail)
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; // wait for character
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i = rx_buffer_tail + 1;
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if (i >= RX_BUFFER_SIZE) i = 0;
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data = rx_buffer[i];
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rx_buffer_tail = i;
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return data;
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}
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void uart_transmit(const uint8_t *data, uint16_t length) {
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for (uint16_t i = 0; i < length; i++) {
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uart_write(data[i]);
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}
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}
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void uart_receive(uint8_t *data, uint16_t length) {
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for (uint16_t i = 0; i < length; i++) {
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data[i] = uart_read();
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}
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}
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// Return whether the number of bytes waiting in the receive buffer is nonzero.
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// Call this before uart_read() to check if it will need
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// to wait for a byte to arrive.
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bool uart_available(void) {
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uint8_t head, tail;
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head = rx_buffer_head;
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tail = rx_buffer_tail;
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if (head >= tail) return (head - tail) > 0;
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return (RX_BUFFER_SIZE + head - tail) > 0;
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}
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// Transmit Interrupt
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ISR(USARTn_UDRE_vect) {
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uint8_t i;
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if (tx_buffer_head == tx_buffer_tail) {
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// buffer is empty, disable transmit interrupt
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UCSRnB = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn);
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} else {
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i = tx_buffer_tail + 1;
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if (i >= TX_BUFFER_SIZE) i = 0;
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UDRn = tx_buffer[i];
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tx_buffer_tail = i;
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}
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}
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// Receive Interrupt
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ISR(USARTn_RX_vect) {
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uint8_t c, i;
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c = UDRn;
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i = rx_buffer_head + 1;
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if (i >= RX_BUFFER_SIZE) i = 0;
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if (i != rx_buffer_tail) {
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rx_buffer[i] = c;
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rx_buffer_head = i;
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}
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}
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