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66 lines
2.0 KiB
66 lines
2.0 KiB
#pragma once
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#include "config_common.h"
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#define VENDOR_ID 0x1234
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#define PRODUCT_ID 0x5678
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#define DEVICE_VER 0x0001
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#define MANUFACTURER QMK
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#define PRODUCT 108Key-Trackpoint
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#define MATRIX_ROWS 8
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#define MATRIX_COLS 23
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#ifdef PS2_USE_USART
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 5
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
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/* set DDR of CLOCK as input to be slave */
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#define PS2_USART_INIT() do { \
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PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
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PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
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UCSR1C = ((1 << UMSEL10) | \
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(3 << UPM10) | \
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(0 << USBS1) | \
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(3 << UCSZ10) | \
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(0 << UCPOL1)); \
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UCSR1A = 0; \
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UBRR1H = 0; \
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UBRR1L = 0; \
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} while (0)
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#define PS2_USART_RX_INT_ON() do { \
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UCSR1B = ((1 << RXCIE1) | \
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(1 << RXEN1)); \
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} while (0)
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#define PS2_USART_RX_POLL_ON() do { \
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UCSR1B = (1 << RXEN1); \
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} while (0)
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#define PS2_USART_OFF() do { \
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UCSR1C = 0; \
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UCSR1B &= ~((1 << RXEN1) | \
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(1 << TXEN1)); \
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} while (0)
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#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
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#define PS2_USART_RX_DATA UDR1
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#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
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#define PS2_USART_RX_VECT USART1_RX_vect
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#endif
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#define MATRIX_ROW_PINS { B0, B1, B2, B3, B4, B5, B6, B7 }
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#define MATRIX_COL_PINS { C0, C1, C2, C3, C4, C5, C6, C7, D0, D1, F0, D3, D4, F1, D6, D7, E0, E1, E2, E3, E4, E5, E6 }
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#define UNUSED_PINS
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/* COL2ROW or ROW2COL */
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#define DIODE_DIRECTION COL2ROW
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#define DEBOUNCE 5
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#define LOCKING_SUPPORT_ENABLE
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#define LOCKING_RESYNC_ENABLE
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