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220 lines
6.6 KiB
220 lines
6.6 KiB
/* Copyright 2020 Nick Brassel (tzarc)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include <string.h>
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/*
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Note that the implementations of eeprom_XXXX_YYYY on AVR are normally
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provided by avr-libc. The same functions are reimplemented below and are
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rerouted to the external SPI equivalent.
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Seemingly, as this is compiled from within QMK, the object file generated
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during the build overrides the avr-libc implementation during the linking
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stage.
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On other platforms such as ARM, there are no provided implementations, so
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there is nothing to override during linkage.
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*/
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#include "wait.h"
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#include "spi_master.h"
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#include "eeprom.h"
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#include "eeprom_spi.h"
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#define CMD_WREN 6
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#define CMD_WRDI 4
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#define CMD_RDSR 5
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#define CMD_WRSR 1
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#define CMD_READ 3
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#define CMD_WRITE 2
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#define SR_WIP 0x01
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// #define DEBUG_EEPROM_OUTPUT
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#ifndef EXTERNAL_EEPROM_SPI_TIMEOUT
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# define EXTERNAL_EEPROM_SPI_TIMEOUT 100
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#endif
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT)
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# include "timer.h"
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# include "debug.h"
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#endif // CONSOLE_ENABLE
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static bool spi_eeprom_start(void) { return spi_start(EXTERNAL_EEPROM_SPI_SLAVE_SELECT_PIN, EXTERNAL_EEPROM_SPI_LSBFIRST, EXTERNAL_EEPROM_SPI_MODE, EXTERNAL_EEPROM_SPI_CLOCK_DIVISOR); }
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static spi_status_t spi_eeprom_wait_while_busy(int timeout) {
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uint32_t deadline = timer_read32() + timeout;
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spi_status_t response;
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do {
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spi_write(CMD_RDSR);
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response = spi_read();
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if (timer_read32() >= deadline) {
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return SPI_STATUS_TIMEOUT;
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}
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} while (response & SR_WIP);
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return SPI_STATUS_SUCCESS;
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}
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static void spi_eeprom_transmit_address(uintptr_t addr) {
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uint8_t buffer[EXTERNAL_EEPROM_ADDRESS_SIZE];
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for (int i = 0; i < EXTERNAL_EEPROM_ADDRESS_SIZE; ++i) {
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buffer[EXTERNAL_EEPROM_ADDRESS_SIZE - 1 - i] = addr & 0xFF;
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addr >>= 8;
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}
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spi_transmit(buffer, EXTERNAL_EEPROM_ADDRESS_SIZE);
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}
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//----------------------------------------------------------------------------------------------------------------------
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void eeprom_driver_init(void) { spi_init(); }
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void eeprom_driver_erase(void) {
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT)
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uint32_t start = timer_read32();
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#endif
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uint8_t buf[EXTERNAL_EEPROM_PAGE_SIZE];
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memset(buf, 0x00, EXTERNAL_EEPROM_PAGE_SIZE);
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for (uint32_t addr = 0; addr < EXTERNAL_EEPROM_BYTE_COUNT; addr += EXTERNAL_EEPROM_PAGE_SIZE) {
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eeprom_write_block(buf, (void *)(uintptr_t)addr, EXTERNAL_EEPROM_PAGE_SIZE);
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}
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT)
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dprintf("EEPROM erase took %ldms to complete\n", ((long)(timer_read32() - start)));
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#endif
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}
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void eeprom_read_block(void *buf, const void *addr, size_t len) {
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//-------------------------------------------------
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// Wait for the write-in-progress bit to be cleared
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bool res = spi_eeprom_start();
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if (!res) {
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dprint("failed to start SPI for WIP check\n");
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memset(buf, 0, len);
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return;
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}
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spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT);
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spi_stop();
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if (response == SPI_STATUS_TIMEOUT) {
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dprint("SPI timeout for WIP check\n");
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memset(buf, 0, len);
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return;
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}
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//-------------------------------------------------
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// Perform read
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res = spi_eeprom_start();
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if (!res) {
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dprint("failed to start SPI for read\n");
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memset(buf, 0, len);
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return;
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}
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spi_write(CMD_READ);
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spi_eeprom_transmit_address((uintptr_t)addr);
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spi_receive(buf, len);
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT)
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dprintf("[EEPROM R] 0x%08lX: ", ((uint32_t)(uintptr_t)addr));
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for (size_t i = 0; i < len; ++i) {
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dprintf(" %02X", (int)(((uint8_t *)buf)[i]));
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}
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dprintf("\n");
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#endif // DEBUG_EEPROM_OUTPUT
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spi_stop();
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}
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void eeprom_write_block(const void *buf, void *addr, size_t len) {
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bool res;
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uint8_t * read_buf = (uint8_t *)buf;
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uintptr_t target_addr = (uintptr_t)addr;
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while (len > 0) {
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uintptr_t page_offset = target_addr % EXTERNAL_EEPROM_PAGE_SIZE;
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int write_length = EXTERNAL_EEPROM_PAGE_SIZE - page_offset;
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if (write_length > len) {
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write_length = len;
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}
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//-------------------------------------------------
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// Wait for the write-in-progress bit to be cleared
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res = spi_eeprom_start();
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if (!res) {
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dprint("failed to start SPI for WIP check\n");
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return;
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}
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spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT);
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spi_stop();
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if (response == SPI_STATUS_TIMEOUT) {
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dprint("SPI timeout for WIP check\n");
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return;
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}
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//-------------------------------------------------
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// Enable writes
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res = spi_eeprom_start();
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if (!res) {
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dprint("failed to start SPI for write-enable\n");
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return;
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}
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spi_write(CMD_WREN);
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spi_stop();
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//-------------------------------------------------
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// Perform the write
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res = spi_eeprom_start();
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if (!res) {
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dprint("failed to start SPI for write\n");
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return;
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}
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT)
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dprintf("[EEPROM W] 0x%08lX: ", ((uint32_t)(uintptr_t)target_addr));
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for (size_t i = 0; i < write_length; i++) {
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dprintf(" %02X", (int)(uint8_t)(read_buf[i]));
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}
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dprintf("\n");
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#endif // DEBUG_EEPROM_OUTPUT
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spi_write(CMD_WRITE);
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spi_eeprom_transmit_address(target_addr);
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spi_transmit(read_buf, write_length);
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spi_stop();
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read_buf += write_length;
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target_addr += write_length;
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len -= write_length;
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}
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//-------------------------------------------------
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// Disable writes
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res = spi_eeprom_start();
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if (!res) {
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dprint("failed to start SPI for write-disable\n");
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return;
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}
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spi_write(CMD_WRDI);
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spi_stop();
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}
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