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  1. # Skulls - [Thinkpad X230](https://pcsupport.lenovo.com/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x230).
  2. ![seabios_bootmenu](front.jpg)
  3. ## Latest release (config overview and version info)
  4. * coreboot-x230 0.0.5 - see our [release page](https://github.com/merge/coreboot-x230/releases)
  5. * The only proprietary binary, the VGA BIOS is executed in "secure" mode ([PCI_OPTION_ROM_RUN_YABEL](https://www.coreboot.org/Coreboot_Options))
  6. ### coreboot
  7. * We simply take coreboot's current state in it's master branch at the time we build a release image.
  8. That's the preferred way to use coreboot. The git revision we use is always included in the release.
  9. ### Intel microcode
  10. * revision `1f` from 2018-02-07 (Intel package [20180312](https://downloadcenter.intel.com/download/27591) not yet in coreboot upstream) under [Intel's license](LICENSE.microcode)
  11. ### SeaBIOS
  12. * version [1.11.1](https://seabios.org/Releases) from 2018-03-19 (part of coreboot upstream)
  13. ## table of contents
  14. * [TL;DR](#tl-dr)
  15. * [Flashing for the first time](#flashing-for-the-first-time)
  16. * [How to update](#how-to-update)
  17. * [Why does this work](#why-does-this-work)
  18. ## TL;DR
  19. For first-time flashing, remove the keyboard and palmrest, and (using a
  20. Raspberry Pi with a SPI 8-pin chip clip connected), run
  21. `flashrom_rpi_bottom_unlock.sh` on the lower chip
  22. and `flashrom_rpi_top_write.sh` on the top chip of the two.
  23. For updating later, run `prepare_internal_flashing.sh` to get
  24. files and instructions about updating. No need to disassemble.
  25. And always use the latest [released](https://github.com/merge/coreboot-x230/releases)
  26. package. This will be tested. The git master
  27. branch is _not_ meant to be stable. Use it for testing only.
  28. ## Flashing for the first time
  29. * Especially for the first time, you must flash externally. See below for the details
  30. for using a Rapberry Pi, for example.
  31. * Make sure you have RAM that uses 1,5V, not 1,35V. Check the specification of
  32. your RAM module(s).
  33. ### flashrom chip config
  34. We (or our scripts) use [flashrom](https://flashrom.org/) for flashing. Run
  35. `flashrom -p <your_hardware>` (for [example](#how-to-flash)
  36. `flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128` for the
  37. Raspberry Pi) to let flashrom detect the chip.
  38. It will probably list a few you need to choose from when flashing
  39. (by adding `-c <chipname>`). Please review the chip model for your device.
  40. In case you are unsure what to specify, here's some examples we find out there:
  41. #### 4MB chip
  42. * `MX25L3206E` seems to mostly be in use
  43. #### 8MB chip
  44. * `MX25L6406E/MX25L6408E` is used in [this guide](https://github.com/mfc/flashing-docs/blob/master/walkthrough%20for%20flashing%20heads%20on%20an%20x230.md#neutering-me)
  45. * `MX25L3206E/MX25L3208E` is seen working with various X230 models.
  46. * `EN25QH64` is used sometimes
  47. ### EC firmware (optional)
  48. Enter Lenovo's BIOS with __F1__ and check the embedded controller (EC) version to be
  49. __1.14__ and upgrade using
  50. [the latest bootable CD](https://support.lenovo.com/at/en/downloads/ds029188)
  51. if it isn't. This updates BIOS and EC. The EC cannot be upgraded when coreboot
  52. is installed. (In case a newer version should ever be available (I doubt it),
  53. you could temporarily flash back the original Lenovo BIOS image from your
  54. backup)
  55. ### ifd unlock and me_cleaner: the 8MB chip
  56. The Intel Management Engine resides on the 8MB chip (at the bottom, closer to
  57. you). We don't need to touch it
  58. for coreboot-upgrades in the future, but to enable internal flashing, we need
  59. to unlock it once.
  60. We run [ifdtool](https://github.com/coreboot/coreboot/tree/master/util/ifdtool)
  61. and, while we are at it, [me_cleaner](https://github.com/corna/me_cleaner) on it:
  62. We support using a RPi, see below for the connection details.
  63. Move the release-tarball to the RPi (USB Stick or however) and unpack it
  64. (to the current directory and change into it):
  65. mkdir tarball_extracted
  66. tar -xf <tarball>.tar.xz -C tarball_extracted
  67. cd tarball_extracted
  68. And finally unlock the 8M chip by using the included script (be patient). Again,
  69. this doesn't replace much; it reads the original, unlocks and flashes back:
  70. sudo ./flashrom_rpi_bottom_unlock.sh -m -c <chipname> -k <backup.bin>
  71. That's it. Keep the backup safe.
  72. #### background (just so you know)
  73. * The `-m` option above also runs `me_cleaner -S` before flashing back.
  74. * The `-l` option will (re-)lock your flash ROM, in case you want to force
  75. yourself (and others) to hardware-flashing externally.
  76. * If you don't use a RPi, change the flashrom programmer to your needs.This
  77. is roughly what's going on:
  78. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L6406E/MX25L6408E" -r ifdmegbe.rom
  79. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L6406E/MX25L6408E" -r ifdmegbe2.rom
  80. diff ifdmegbe.rom ifdmegbe2.rom
  81. git clone https://github.com/corna/me_cleaner.git && cd me_cleaner
  82. ./me_cleaner.py -S -O ifdmegbe_meclean.rom ifdmegbe.rom
  83. ifdtool -u ifdmegbe_meclean.rom
  84. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L6406E/MX25L6408E" -w ifdmegbe_meclean.rom.new
  85. ### BIOS: the 4MB chip
  86. (internally, memory of the two chips is mapped together, the 8MB being the lower
  87. part, but we can essientially ignore that). Again, using a RPi is supported
  88. here. We assume you have the unpacked release tarball ready, see above. Use
  89. the following included script:
  90. sudo ./flashrom_rpi_top_write.sh -i x230_coreboot_seabios_<hash>_top.rom -c <chipname> -k <backup>
  91. That's it. Keep the backup safe.
  92. ## How to update
  93. When __upgrading__ to a new release, only the "upper" 4MB chip has to be written.
  94. Download the latest release image we provide and flash it:
  95. ### Example: internal
  96. CAUTION: THIS IS NOT ENCOURAGED
  97. * Only for _updating_! You have to have your 8MB chip flashed externally using
  98. our `flashrom_rpi_bottom_unlock.sh` script (`ifdtool -u`) before this, once
  99. * very convenient: just install flashrom on the X230 and software-update,
  100. but according to the
  101. [flashrom manpage](https://manpages.debian.org/stretch/flashrom/flashrom.8.en.html)
  102. this is very dangerous!
  103. * Boot Linux with the `iomem=relaxed` boot parameter (for example set in /etc/default/grub)
  104. * download the latest release tarball (4MB "top" BIOS image is included) and extract it
  105. * run `prepare_internal_flashing.sh` for generating all necessary files and printing all instructions
  106. * run the flashrom command you got from the script. That's it.
  107. ### Example: Raspberry Pi 3
  108. Here you'll flash externally, using a "Pomona 5250 8-pin SOIC test clip". You'll find
  109. one easily. This is how the X230's SPI connection looks on both chips:
  110. Screen (furthest from you)
  111. __
  112. MOSI 5 --| |-- 4 GND
  113. CLK 6 --| |-- 3 N/C
  114. N/C 7 --| |-- 2 MISO
  115. VCC 8 --|__|-- 1 CS
  116. Edge (closest to you)
  117. We run [Raspbian](https://www.raspberrypi.org/downloads/raspbian/)
  118. and have the following setup
  119. * [Serial connection](https://elinux.org/RPi_Serial_Connection) using a "USB to Serial" UART Adapter and picocom or minicom (yes, in this case you need a second PC connected to the RPi over UART)
  120. * in the SD Cards's `/boot/config.txt` file `enable_uart=1` and `dtparam=spi=on`
  121. * [For flashrom](https://www.flashrom.org/RaspberryPi) we put `spi_bcm2835` and `spidev` in /etc/modules
  122. * [Connect to a wifi](https://www.raspberrypi.org/documentation/configuration/wireless/wireless-cli.md) or to network over ethernet to `sudo apt-get install flashrom`
  123. * connect the Clip to the Raspberry Pi 3 (there are [prettier images](https://github.com/splitbrain/rpibplusleaf) too:
  124. Edge of pi (furthest from you)
  125. (UART)
  126. L GND TX RX CS
  127. E | | | |
  128. F +---------------------------------------------------------------------------------+
  129. T | x x x x x x x x x x x x x x x x x x x x |
  130. | x x x x x x x x x x x x x x x x x x x x |
  131. E +----------------------------------^---^---^---^-------------------------------^--+
  132. D | | | | |
  133. G 3.3V MOSIMISO| GND
  134. E (VCC) CLK
  135. Body of Pi (closest to you)
  136. Now copy our release tarball over to the Rasperry Pi.
  137. One way to copy, is convertig it to ascii using
  138. `uuencode` (part of Debian's sharutils package) described below. This is a
  139. direct, shady and slow way to transfer a file. Use a USB
  140. Stick or scp instead. :) (but you need even more hardware or a network).
  141. (convert)
  142. host$ uuencode <tarball> <tarball>.ascii > <tarball>.ascii
  143. (transfer)
  144. rpi$ cat > <tarball>.ascii
  145. host$ pv <tarball>.ascii > /dev/ttyUSBX
  146. (wait)
  147. rpi$ (CTRL-D)
  148. (convert back)
  149. rpi$ uudecode -o <tarball> <tarball>.ascii
  150. (verify)
  151. host$ sha1sum <tarball>
  152. rpi$ sha1sum <tarball>
  153. ![Raspberry Pi at work](rpi_clip.jpg)
  154. Now unpack it:
  155. mkdir tarball_extracted
  156. tar -xf <tarball> -C tarball_extracted
  157. cd tarball_extracted
  158. Connect the SPI clip to the "top" chip, and run:
  159. sudo ./flashrom_rpi_top_write.sh -i x230_coreboot_seabios_<hash>_top.rom -c <chipname>
  160. That's it.
  161. #### background (just so you know)
  162. * Connecting an ethernet cable as a power-source for SPI (instead of the VCC pin)
  163. is not necessary (some other flashing how-to guides mention this).
  164. Setting a fixed (and low) SPI speed for flashrom offeres the same stability.
  165. Our scripts do this for you.
  166. ## Why does this work?
  167. On the X230, there are 2 physical "BIOS" chips. The "upper" 4MB
  168. one holds the actual bios we can generate using coreboot, and the "lower" 8MB
  169. one holds the rest that you can [modify yourself once](#flashing-for-the-first-time),
  170. if you like, but strictly speaking, you
  171. [don't need to touch it at all](https://www.coreboot.org/Board:lenovo/x230#Building_Firmware).
  172. What's this "rest"?
  173. Mainly a tiny binary used by the Ethernet card and the Intel Management Engine.