Browse Source

x230: update to today's coreboot master state

pull/48/head
Martin Kepplinger 5 years ago
parent
commit
cc7f82a702
3 changed files with 8 additions and 4 deletions
  1. +1
    -1
      common/download_coreboot.sh
  2. +3
    -0
      x230/NEWS
  3. +4
    -3
      x230/config-717f4d5e14

+ 1
- 1
common/download_coreboot.sh View File

@ -32,7 +32,7 @@ function gitUpdate() {
cd "$DOCKER_COREBOOT_DIR/3rdparty/blobs/" || exit
git pull https://review.coreboot.org/blobs refs/changes/52/27352/5
cd "$DOCKER_COREBOOT_DIR" || exit
git pull https://review.coreboot.org/coreboot refs/changes/64/27864/3
git pull https://review.coreboot.org/coreboot refs/changes/64/27864/5
}
################################################################################


+ 3
- 0
x230/NEWS View File

@ -2,6 +2,9 @@
skulls-x230 0.0.12 - unreleased
----------------------------------------
This release includes the following changes:
* based on coreboot commit 717f4d5e14
(parent in master branch 3032d76778)
* updates SeaBIOS to version 1.12.0
* simplify unpacking the release archive by including a directory


x230/config-715cb40963 → x230/config-717f4d5e14 View File

@ -101,12 +101,14 @@ CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
CONFIG_DRAM_RESET_GATE_GPIO=10
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
CONFIG_DCACHE_RAM_BASE=0xfefe0000
CONFIG_DCACHE_RAM_SIZE=0x20000
CONFIG_MAX_REBOOT_CNT=3
CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_HAVE_INTEL_FIRMWARE=y
# CONFIG_DRIVERS_UART_8250IO is not set
@ -191,7 +193,6 @@ CONFIG_STACK_SIZE=0x1000
# CONFIG_SOC_CAVIUM_COMMON is not set
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
@ -402,10 +403,12 @@ CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_POSTCAR_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
@ -512,7 +515,6 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
CONFIG_TPM_INIT=y
# CONFIG_DRIVERS_UART is not set
CONFIG_NO_UART_ON_SUPERIO=y
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
@ -547,7 +549,6 @@ CONFIG_INTEL_GMA_ACPI=y
# CONFIG_INTEL_GMA_SWSMISCI is not set
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_CPU="Ivybridge"
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"

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