Martin Kepplinger b1812a3261 | 6 years ago | |
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.. | ||
sources | 6 years ago | |
util | 6 years ago | |
92263853ad.config | 6 years ago | |
LICENSE | 6 years ago | |
LICENSE.microcode | 6 years ago | |
NEWS | 6 years ago | |
README.md | 6 years ago | |
flashrom_rpi_bottom_unlock.sh | 6 years ago | |
flashrom_rpi_top_write.sh | 6 years ago | |
front.jpg | 6 years ago | |
pci8086,0166.rom | 6 years ago | |
prepare_internal_flashing.sh | 6 years ago | |
release.sh | 6 years ago | |
rpi_clip.jpg | 6 years ago |
1f
from 2018-02-07 (Intel package 20180312 not yet in coreboot upstream) under Intel's licenseFor first-time flashing, remove the keyboard and palmrest, and (using a
Raspberry Pi with a SPI 8-pin chip clip connected), run
flashrom_rpi_bottom_unlock.sh
on the lower chip
and flashrom_rpi_top_write.sh
on the top chip of the two.
For updating later, run prepare_internal_flashing.sh
. No need to disassemble.
And always use the latest released package. This will be tested. The git master branch is not meant to be stable. Use it for testing only.
Before flashing coreboot, consider doing one original Lenovo upgrade process in case you're not running the latest version. This is not supported anymore, once you're running coreboot (You'd have to manually flash back your backup images first, see later chapters).
Also, this updates the BIOS and Embedded Controller (EC) firmware. The EC is not updated anymore, when running coreboot. The latest EC version is 1.14 and that's unlikely to change.
In case you're not running the latest BIOS version, either
By default, only original Lenovo batteries are allowed. Thanks to this project we can use Lenovo's bootable upgrade image, change it and create a bootable USB image, with an EC update that allows us to use any 3rd party aftermarket battery:
sudo apt-get install build-essential git mtools libssl-dev
git clone https://github.com/hamishcoleman/thinkpad-ec && cd thinkpad-ec
make patch_disable_keyboard clean
make patch_enable_battery clean
make patched.x230.img
That's it. You can create a bootable USB stick: sudo dd if=patched.x230.img of=/dev/sdx
and boot from it. Alternatively, burn patched.x230.iso
to a CD. And make sure
you have "legacy" boot set, not "UEFI" boot.
We (or our scripts) use flashrom for flashing. Run
flashrom -p <your_hardware>
(for example
flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128
for the
Raspberry Pi) to let flashrom detect the chip.
It will probably list a few you need to choose from when flashing
(by adding -c <chipname>
). Please review the chip model for your device.
In case you are unsure what to specify, here's some examples we find out there:
MX25L3206E
seems to mostly be in useMX25L6406E/MX25L6408E
is used in this guideMX25L3206E/MX25L3208E
is seen working with various X230 models.EN25QH64
is used sometimesThe Intel Management Engine resides on the 8MB chip (at the bottom, closer to you). We don't need to touch it for coreboot-upgrades in the future, but to enable internal flashing, we need to unlock it once. We run ifdtool and, while we are at it, me_cleaner on it:
We support using a RPi, see below for the connection details. Move the release-tarball to the RPi (USB Stick or however) and unpack it (to the current directory and change into it):
mkdir tarball_extracted
tar -xf <tarball>.tar.xz -C tarball_extracted
cd tarball_extracted
And finally unlock the 8M chip by using the included script (be patient). Again, this doesn't replace much; it reads the original, unlocks and flashes back:
sudo ./flashrom_rpi_bottom_unlock.sh -m -c <chipname> -k <backup.bin>
That's it. Keep the backup safe.
The -m
option above also runs me_cleaner -S
before flashing back.
The -l
option will (re-)lock your flash ROM, in case you want to force
yourself (and others) to hardware-flashing externally.
If you don't use a RPi, change the flashrom programmer to your needs.This is roughly what's going on:
flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L6406E/MX25L6408E" -r ifdmegbe.rom
flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L6406E/MX25L6408E" -r ifdmegbe2.rom
diff ifdmegbe.rom ifdmegbe2.rom
git clone https://github.com/corna/me_cleaner.git && cd me_cleaner
./me_cleaner.py -S -O ifdmegbe_meclean.rom ifdmegbe.rom
ifdtool -u ifdmegbe_meclean.rom
flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L6406E/MX25L6408E" -w ifdmegbe_meclean.rom.new
(internally, memory of the two chips is mapped together, the 8MB being the lower part, but we can essientially ignore that). Again, using a RPi is supported here. We assume you have the unpacked release tarball ready, see above. Use the following included script:
sudo ./flashrom_rpi_top_write.sh -i x230_coreboot_seabios_<hash>_top.rom -c <chipname> -k <backup>
That's it. Keep the backup safe.
When upgrading to a new release, only the "upper" 4MB chip has to be written and any of the following examples are possible. Otherwise you cannot use "internal" flashing and please read flashing for the first time.
flashrom_rpi_bottom_unlock.sh
script (ifdtool -u
) before this, onceiomem=relaxed
boot parameter (for example set in /etc/default/grub)prepare_internal_flashing.sh
for generating all necessary files and instructionsHere you'll flash externally, using a "Pomona 5250 8-pin SOIC test clip". You'll find one easily. Remove the 7 screws to remove the keyboard (by pushing it towards the screen before lifting) and the palmrest. You'll find the chips using the photo below. This is how the SPI connection looks on both chips:
Screen (furthest from you)
__
MOSI 5 --| |-- 4 GND
CLK 6 --| |-- 3 N/C
N/C 7 --| |-- 2 MISO
VCC 8 --|__|-- 1 CS
Edge (closest to you)
We run Raspbian and have the following setup
Serial connection using a "USB to Serial" UART Adapter and picocom or minicom (yes, in this case you need a second PC connected to the RPi over UART)
in the SD Cards's /boot/config.txt
file enable_uart=1
and dtparam=spi=on
For flashrom we put spi_bcm2835
and spidev
in /etc/modules
Connect to a wifi
or ethernet to sudo apt-get install flashrom
connect the Clip to the Raspberry Pi 3 (there are prettier images too:
Edge of pi (furthest from you)
(UART)
L GND TX RX CS
E | | | |
F +---------------------------------------------------------------------------------+
T | x x x x x x x x x x x x x x x x x x x x |
| x x x x x x x x x x x x x x x x x x x x |
E +----------------------------------^---^---^---^-------------------------------^--+
D | | | | |
G 3.3V MOSIMISO| GND
E (VCC) CLK
Body of Pi (closest to you)
Now copy our release tarball over to the Rasperry Pi.
One way to copy, is convertig it to ascii using
uuencode
(part of Debian's sharutils package) described below. This is a
direct, shady and slow way to transfer a file. Use a USB
Stick or scp instead. :) (but you need even more hardware or a network).
(convert)
host$ uuencode <tarball> <tarball>.ascii > <tarball>.ascii
(transfer)
rpi$ cat > <tarball>.ascii
host$ pv <tarball>.ascii > /dev/ttyUSBX
(wait)
rpi$ (CTRL-D)
(convert back)
rpi$ uudecode -o <tarball> <tarball>.ascii
(verify)
host$ sha1sum <tarball>
rpi$ sha1sum <tarball>
Unpack it:
mkdir tarball_extracted
tar -xf <tarball> -C tarball_extracted
cd tarball_extracted
Connect the SPI clip to the "top" chip, and run:
sudo ./flashrom_rpi_top_write.sh -i x230_coreboot_seabios_<hash>_top.rom -c <chipname>
That's it.
On the X230, there are 2 physical "BIOS" chips. The "upper" 4MB one holds the actual bios we can generate using coreboot, and the "lower" 8MB one holds the rest that you can modify yourself once, if you like, but strictly speaking, you don't need to touch it at all. What's this "rest"? Mainly a tiny binary used by the Ethernet card and the Intel Management Engine.