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  1. # Skulls - [Thinkpad X230](https://pcsupport.lenovo.com/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x230).
  2. ![seabios_bootmenu](front.jpg)
  3. ## Latest release (config overview and version info)
  4. * Get it from our [release page](https://github.com/merge/coreboot-x230/releases)
  5. * The only proprietary binary, the VGA BIOS is executed in "secure" mode ([PCI_OPTION_ROM_RUN_YABEL](https://www.coreboot.org/Coreboot_Options))
  6. ### coreboot
  7. * We simply take coreboot's current state in it's master branch at the time we build a release image.
  8. That's the preferred way to use coreboot. The git revision we use is always included in the release.
  9. ### Intel microcode
  10. * revision `1f` from 2018-02-07 see package [20180312](https://downloadcenter.intel.com/download/27591) under [Intel's license](LICENSE.microcode)
  11. ### SeaBIOS
  12. * version [1.11.1](https://seabios.org/Releases) from 2018-03-19
  13. ## table of contents
  14. * [TL;DR](#tldr)
  15. * [Flashing for the first time](#flashing-for-the-first-time)
  16. * [How to flash](#how-to-flash)
  17. * [Why does this work](#why-does-this-work)
  18. ## TL;DR
  19. For first-time flashing, remove the keyboard and palmrest, and (using a
  20. Raspberry Pi with a SPI 8-pin chip clip connected), run
  21. `external_install_bottom.sh` on the lower chip
  22. and `external_install_top.sh` on the top chip of the two.
  23. For updating later, run `x230_update.sh`. No need to disassemble.
  24. And always use the latest [released](https://github.com/merge/coreboot-x230/releases)
  25. package. This will be tested. The git master
  26. branch is _not_ meant to be stable. Use it for testing only.
  27. ## Flashing for the first time
  28. * Before doing anything, run Linux, install `dmidecode` and run `x230_before_first_install.sh`
  29. It simply prints valuable system information.
  30. * Make sure you have RAM that uses 1,5V, not 1,35V. Check the specification of
  31. your RAM module(s).
  32. * Especially for the first time, you must flash externally. See below for the details
  33. for using a Rapberry Pi, for example.
  34. ### before you begin: original update / EC firmware (optional)
  35. Before flashing coreboot, consider doing one original Lenovo upgrade process
  36. in case you're not running the latest version. This is not supported anymore,
  37. once you're running coreboot (You'd have to manually flash back your backup
  38. images first, see later chapters).
  39. Also, this updates the BIOS _and_ Embedded Controller (EC) firmware. The EC
  40. is not updated anymore, when running coreboot. The latest EC version is 1.14
  41. and that's unlikely to change.
  42. In case you're not running the latest BIOS version, either
  43. * use [the latest original CD](https://support.lenovo.com/at/en/downloads/ds029188) and burn it, or
  44. * use the same, only with a patched EC firmware that allows using any battery:
  45. #### Disable the battery validation check
  46. By default, only original Lenovo batteries are allowed.
  47. Thanks to [this](http://zmatt.net/unlocking-my-lenovo-laptop-part-3/)
  48. [project](https://github.com/eigenmatt/mec-tools) we can use Lenovo's bootable
  49. upgrade image, change it and create a bootable _USB_ image, with an EC update
  50. that allows us to use any 3rd party aftermarket battery:
  51. sudo apt-get install build-essential git mtools libssl-dev
  52. git clone https://github.com/hamishcoleman/thinkpad-ec && cd thinkpad-ec
  53. make patch_disable_keyboard clean
  54. make patch_enable_battery clean
  55. make patched.x230.img
  56. That's it. You can create a bootable USB stick: `sudo dd if=patched.x230.img of=/dev/sdx`
  57. and boot from it. Alternatively, burn `patched.x230.iso` to a CD. And make sure
  58. you have "legacy" boot set, not "UEFI" boot.
  59. ### preparation: required hardware
  60. * An 8 Pin SOIC Clip, for example from
  61. [Pomona electronics](https://www.pomonaelectronics.com/products/test-clips/soic-clip-8-pin)
  62. or alternatively hooks, for example from
  63. [E-Z-Hook](http://catalog.e-z-hook.com/viewitems/test-hooks/e-z-micro-hooks-single-hook-style)
  64. * 6 [female](https://electronics.stackexchange.com/questions/37783/how-can-i-create-a-female-jumper-wire-connector)
  65. [jumper wires](https://en.wikipedia.org/wiki/Jump_wire) to connect the clip to
  66. a hardware flasher
  67. * a hardware flasher
  68. [supported by flashrom](https://www.flashrom.org/Flashrom/0.9.9/Supported_Hardware#USB_Devices)
  69. but we currently only support using a Raspberry Pi
  70. ### ifd unlock and me_cleaner: the 8MB chip
  71. The Intel Management Engine resides on the 8MB chip (at the bottom, closer to
  72. you). We don't need to touch it
  73. for coreboot-upgrades in the future, but to enable internal flashing, we need
  74. to unlock it once.
  75. We run [ifdtool](https://github.com/coreboot/coreboot/tree/master/util/ifdtool)
  76. and, while we are at it, [me_cleaner](https://github.com/corna/me_cleaner) on it:
  77. We support using a RPi, see below for the connection details.
  78. Move the release-tarball to the RPi (USB Stick or however) and unpack it
  79. (to the current directory and change into it):
  80. mkdir tarball_extracted
  81. tar -xf <tarball>.tar.xz -C tarball_extracted
  82. cd tarball_extracted
  83. And finally unlock the 8M chip by using the included script (be patient). Again,
  84. this doesn't replace much; it reads the original, unlocks and flashes back:
  85. sudo ./external_install_bottom.sh -m -k <backup.bin>
  86. That's it. Keep the backup safe.
  87. #### background (just so you know)
  88. * The `-m` option above also runs `me_cleaner -S` before flashing back.
  89. * The `-l` option will (re-)lock your flash ROM, in case you want to force
  90. yourself (and others) to hardware-flashing externally.
  91. * If you don't use a RPi, change the flashrom programmer to your needs.This
  92. is roughly what's going on:
  93. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -r ifdmegbe.rom
  94. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -r ifdmegbe2.rom
  95. diff ifdmegbe.rom ifdmegbe2.rom
  96. git clone https://github.com/corna/me_cleaner.git && cd me_cleaner
  97. ./me_cleaner.py -S -O ifdmegbe_meclean.rom ifdmegbe.rom
  98. ifdtool -u ifdmegbe_meclean.rom
  99. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -w ifdmegbe_meclean.rom.new
  100. * We (or our scripts) use [flashrom](https://flashrom.org/) for flashing. If our
  101. scripts don't detect the chip automatically, connect
  102. the programmer to the chip and run
  103. `flashrom -p <your_hardware>` (for [example](#how-to-flash)
  104. `flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128` for the
  105. Raspberry Pi) to let flashrom detect the chip. If `-c` is omitted, the scripts
  106. will run this for you. It will probably list a few you need to choose from when flashing
  107. (by adding `-c <chipname>`).
  108. In case you are unsure what to specify, here's some examples we find out there:
  109. * 4MB chip
  110. * `MX25L3206E` seems to mostly be in use
  111. * 8MB chip
  112. * `MX25L6406E/MX25L6408E` is used in [this guide](https://github.com/mfc/flashing-docs/blob/master/walkthrough%20for%20flashing%20heads%20on%20an%20x230.md#neutering-me)
  113. * `MX25L3206E/MX25L3208E` is seen working with various X230 models.
  114. * `EN25QH64` is used sometimes
  115. ### BIOS: the 4MB chip
  116. (internally, memory of the two chips is mapped together, the 8MB being the lower
  117. part, but we can essientially ignore that). Again, using a RPi is supported
  118. here. We assume you have the unpacked release tarball ready, see above. Use
  119. the following included script:
  120. sudo ./external_install_top.sh -i x230_coreboot_seabios_<hash>_top.rom -k <backup>
  121. That's it. Keep the backup safe.
  122. ## How to flash
  123. When __upgrading__ to a new release, only the "upper" 4MB chip has to be written
  124. and any of the following examples are possible. Otherwise you cannot use
  125. "internal" flashing and please read
  126. [flashing for the first time](#flashing-for-the-first-time).
  127. ### Example: internal
  128. * Only for _updating_! You have to have your 8MB chip flashed externally using
  129. our `external_install_bottom.sh` script (`ifdtool -u`) before this, once
  130. * very convenient: just install flashrom on your X230 but according to the
  131. [flashrom manpage](https://manpages.debian.org/stretch/flashrom/flashrom.8.en.html)
  132. this is very dangerous!
  133. * Boot Linux with the `iomem=relaxed` boot parameter (for example set in /etc/default/grub)
  134. * download the latest release tarball (4MB "top" BIOS image is included) and extract it
  135. * run `x230_update.sh` for generating all necessary files and instructions
  136. ### Example: Raspberry Pi 3
  137. Here you'll flash externally, using a test clip or hooks, see [required hardware](#preparation-required-hardware).
  138. Remove the 7 screws to remove the keyboard (by pushing it towards the
  139. screen before lifting) and the palmrest. You'll find the chips using the photo
  140. below. This is how the SPI connection looks on both chips:
  141. Screen (furthest from you)
  142. __
  143. MOSI 5 --| |-- 4 GND
  144. CLK 6 --| |-- 3 N/C
  145. N/C 7 --| |-- 2 MISO
  146. VCC 8 --|__|-- 1 CS
  147. Edge (closest to you)
  148. We run [Raspbian](https://www.raspberrypi.org/downloads/raspbian/)
  149. and have the following setup
  150. * [Serial connection](https://elinux.org/RPi_Serial_Connection) using a
  151. "USB to Serial" UART Adapter and picocom or minicom (yes, in this case you
  152. need a second PC connected to the RPi over UART)
  153. * in the SD Cards's `/boot/config.txt` file `enable_uart=1` and `dtparam=spi=on`
  154. * [For flashrom](https://www.flashrom.org/RaspberryPi) we put `spi_bcm2835`
  155. and `spidev` in /etc/modules
  156. * [Connect to a wifi](https://www.raspberrypi.org/documentation/configuration/wireless/wireless-cli.md)
  157. or ethernet to `sudo apt-get install flashrom`
  158. * connect the Clip to the Raspberry Pi 3 (there are
  159. [prettier images](https://github.com/splitbrain/rpibplusleaf) too):
  160. Edge of pi (furthest from you)
  161. (UART)
  162. L GND TX RX CS
  163. E | | | |
  164. F +---------------------------------------------------------------------------------+
  165. T | x x x x x x x x x x x x x x x x x x x x |
  166. | x x x x x x x x x x x x x x x x x x x x |
  167. E +----------------------------------^---^---^---^-------------------------------^--+
  168. D | | | | |
  169. G 3.3V MOSIMISO| GND
  170. E (VCC) CLK
  171. Body of Pi (closest to you)
  172. Now copy our release tarball over to the Rasperry Pi.
  173. One way to copy, is convertig it to ascii using
  174. `uuencode` (part of Debian's sharutils package) described below. This is a
  175. direct, shady and slow way to transfer a file. Use a USB
  176. Stick or scp instead. :) (but you need even more hardware or a network).
  177. (convert)
  178. host$ uuencode <tarball> <tarball>.ascii > <tarball>.ascii
  179. (transfer)
  180. rpi$ cat > <tarball>.ascii
  181. host$ pv <tarball>.ascii > /dev/ttyUSBX
  182. (wait)
  183. rpi$ (CTRL-D)
  184. (convert back)
  185. rpi$ uudecode -o <tarball> <tarball>.ascii
  186. (verify)
  187. host$ sha1sum <tarball>
  188. rpi$ sha1sum <tarball>
  189. Unpack it:
  190. mkdir tarball_extracted
  191. tar -xf <tarball> -C tarball_extracted
  192. cd tarball_extracted
  193. ![Raspberry Pi at work](rpi_clip.jpg)
  194. Connect the SPI clip to the "top" chip, and run:
  195. sudo ./external_install_top.sh -f rpi -i x230_coreboot_seabios_<hash>_top.rom
  196. That's it.
  197. #### background (just so you know)
  198. * Connecting an ethernet cable as a power-source for SPI (instead of the VCC pin)
  199. is not necessary (some other flashing how-to guides mention this).
  200. Setting a fixed (and low) SPI speed for flashrom offeres the same stability.
  201. Our scripts do this for you.
  202. ## Why does this work?
  203. On the X230, there are 2 physical "BIOS" chips. The "upper" 4MB
  204. one holds the actual bios we can generate using coreboot, and the "lower" 8MB
  205. one holds the rest that you can [modify yourself once](#flashing-for-the-first-time),
  206. if you like, but strictly speaking, you
  207. [don't need to touch it at all](https://www.coreboot.org/Board:lenovo/x230#Building_Firmware).
  208. What's this "rest"?
  209. Mainly a tiny binary used by the Ethernet card and the Intel Management Engine.