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  1. # coreboot-x230
  2. pre-built coreboot images and documentation on how to flash them for the Thinkpad X230
  3. These images:
  4. * only support Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz
  5. * include Lenovo's proprietary VGA BIOS ROM. (if it might not be needed anymore, I'm happy for hints)
  6. * include Intel's proprietary microcode update binary.
  7. * include [SeaBIOS](https://seabios.org/SeaBIOS) as coreboot payload, for maximum compatibility.
  8. * are meant to be [flashed externally](#how-to-flash)
  9. * are compatible with Windows and Linux
  10. ## Latest build
  11. See our [releases](https://github.com/merge/coreboot-x230/releases)
  12. ### Intel microcode version from 2018-01-08
  13. * [20180108](https://downloadmirror.intel.com/27431/eng/microcode-20180108.tgz) (md5 871df55f0ab010ee384dabfc424f2c12)
  14. * 06-3a-09 for Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz
  15. ### SeaBIOS version from 2017-11-10
  16. * [1.11.0](https://seabios.org/Releases#SeaBIOS_1.11.0)
  17. ### When do we do a release?
  18. Either when
  19. * There is a new SeaBIOS release,
  20. * There is a new Intel microcode release, or
  21. * There is a coreboot issue that affects us (unlikely)
  22. ## Flashing for the first time
  23. ### EC firmware
  24. Enter Lenovo's BIOS with __F1__ and check the embedded controller (EC) version to be
  25. __1.14__ and upgrade using [the latest bootable CD](https://support.lenovo.com/at/en/downloads/ds029188)
  26. if it isn't. The EC cannot be upgraded when coreboot is installed. (In case a newer
  27. version should ever be available (I doubt it), you could temporarily flash back your
  28. original Lenovo BIOS image)
  29. ### me_cleaner
  30. The Intel Management Engine resides on the 8MB chip. We don't need to touch it
  31. for coreboot-upgrades in the future, but while opening up the Thinkpad anyways,
  32. we can save it and run [ifdtool](https://github.com/coreboot/coreboot/tree/master/util/ifdtool)
  33. and [me_cleaner](https://github.com/corna/me_cleaner) on it:
  34. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L3206E/MX25L3208E" -r ifdmegbe.rom
  35. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L3206E/MX25L3208E" -r ifdmegbe2.rom
  36. diff ifdmegbe.rom ifdmegbe2.rom
  37. git clone https://github.com/corna/me_cleaner.git && cd me_cleaner
  38. ./me_cleaner.py -O ifdmegbe_meclean.rom ifdmegbe.rom
  39. ifdtool -u ifdmegbe_meclean.rom
  40. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -c "MX25L3206E/MX25L3208E" -w ifdmegbe_meclean.rom.new
  41. ### save the 4MB chip
  42. (internally, memory of the two chips is mapped together, the 8MB being the lower
  43. part, but we can essientially ignore that)
  44. For the first time, we have to save the original image, just like we did with
  45. the 8MB chip above:
  46. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -r top1.rom
  47. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -r top2.rom
  48. diff top1.rom top2.rom
  49. ## Flashing the coreboot / SeaBIOS image
  50. When __upgrading__ to a new version, for example when a new [SeaBIOS](https://seabios.org/Releases)
  51. version is available, only this has to be done.
  52. Download the latest release image we provide here and flash it:
  53. flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128 -w x230_coreboot_seabios_example_top.rom
  54. ## How to flash
  55. We flash externally, using a "Pomona 5250 8-pin SOIC test clip". You'll find
  56. one easily.
  57. We connect it to a Raspberry Pi 3, running [Raspbian](https://www.raspberrypi.org/downloads/raspbian/)
  58. and the following setup
  59. * [Serial connection](https://elinux.org/RPi_Serial_Connection) using a "USB to Serial" Adapter and picocom or minicom
  60. * in the SD Cards's `/boot/config.txt` file `enable_uart=1` and `dtparam=spi=on`
  61. * [For flashrom](https://www.flashrom.org/RaspberryPi) we put `spi_bcm2835` and `spidev` in /etc/modules
  62. * [Connect to a wifi](https://www.raspberrypi.org/documentation/configuration/wireless/wireless-cli.md) or to network over ethernet.
  63. * install `flashrom`
  64. * connect the Clip to the Raspberry Pi 3:
  65. Edge of pi (furthest from you)
  66. L CS
  67. E |
  68. F +---------------------------------------------------------------------------------+
  69. T | x x x x x x x x x x x x x x x x x x x x |
  70. | x x x x x x x x x x x x x x x x x x x x |
  71. E +----------------------------------^---^---^---^-------------------------------^--+
  72. D | | | | |
  73. G 3.3V MOSIMISO| GND
  74. E (VCC) CLK
  75. Body of Pi (closest to you)
  76. and to your X230:
  77. Screen (furthest from you)
  78. __
  79. MOSI 5 --| |-- 4 GND
  80. CLK 6 --| |-- 3 N/C
  81. N/C 7 --| |-- 2 MISO
  82. VCC 8 --|__|-- 1 CS
  83. Edge (closest to you)
  84. Now you should be able to run the above mentioned `flashrom` commands.
  85. ## How we build
  86. Everything necessary to build coreboot is included in this project and building
  87. coreboot is not hard at all. Please refer to [coreboot's own documentation](https://www.coreboot.org/Build_HOWTO).
  88. When building, testing and doing a release here, we always try to upload our
  89. result to coreboot's [board status project](https://www.coreboot.org/Supported_Motherboards).